Signed-off-by: NSergei Poselenov <sposelenov@emcraft.com>

This is a re-write of the NAND FSL UPM driver using the more universal
hwcontrol callback (instead of the cmdfunc callback). Here is a brief
list of furher modifications:

- For the time being, the UPM setup writing the UPM array has been
  removed from the driver and must now be done by the board specific
  code.

- The bus width definition in "struct fsl_upm_nand" is now in bits to
  comply with the corresponding Linux driver and 8, 16 and 32 bit
  accesses are supported.

- chip->dev_read is only set if fun->dev_ready != NULL, which is
  required for boards not connecting the R/B pin.

- A few issue have been fixed with MxMR bit manipulation like in the
  corresponding Linux driver.

Note: I think the "io_addr" field of "struct fsl_upm" could be removed
      as well, because the address is already determined by
      "nand->IO_ADDR_[RW]", but I'm not 100% sure.

This patch has been tested on a TQM8548 modules with the NAND chip
Micron MT29F8G08FABWP.

This patch is based on the following patches posted to this list a few
minutes ago:

  PPC: add accessor macros to clear and set bits in one shot
  83xx/85xx/86xx: add more MxMR local bus definitions
Signed-off-by: NWolfgang Grandegger <wg@grandegger.com>
Acked-by: NAnton Vorontsov <avorontsov@ru.mvista.com>

This adds a new SPI flash subsystem.

Currently, only AT45 DataFlash in non-power-of-two mode is supported,
but some preliminary support for other flash types is in place as
well.
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

* The cfi_flash.c memset fix actual allows the board to boot so there is
  a bit more going on here than just resolving warnings associated with
  uninitialized variables.

* include/asm/bitops.h:302: warning: '__swab32p' is static but used in
  inline function 'ext2_find_next_zero_bit' which is not static
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

For NAND erase sizes smaller than one NAND erase block, erase
percentage output becomes grater than 100% e.g.

-- cut --
  > nand info
Device 0: NAND 64MiB 1,8V 8-bit, sector size 16 KiB
  > nand erase 0x100000 0x2000
NAND erase: device 0 offset 0x100000, size 0x2000
Erasing at 0x100000 -- 200% complete.
OK
  >
-- cut --

Correct this and give user a warning that more is erased than specified:

-- cut --
  > nand erase 0x100000 0x2000
NAND erase: device 0 offset 0x100000, size 0x2000
Warning: Erase size 0x00002000 smaller than one erase block 0x00004000
           Erasing 0x00004000 instead
Erasing at 0x100000 -- 100% complete.
OK
  >
-- cut --
Signed-off-by: NDirk Behme <dirk.behme@gmail.com>

This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).

Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.
Signed-off-by: NWolfgang Denk <wd@denx.de>

Onenand needs a version of memcpy() which performs 16 bit accesses
only; make sure the name does not conflict with the standard
function.
Signed-off-by: NWolfgang Denk <wd@denx.de>

This patch adds a configurable flash auto protection list that can be used
to make U-Boot protect flash regions in flash_init().

The idea has been discussed on the u-boot mailing list starting
on Nov 18th, 2007.

Even this patch brings a new feature it is used as a bugfix for 4xx
platforms where flash_init() does not completely protect the
monitor's flash range in all situations.

U-Boot protects the flash range from CFG_MONITOR_BASE to
(CFG_MONITOR_BASE + monitor_flash_len  - 1) by default. This does not
include the reset vector at 0xfffffffc.

Example:
#define CFG_FLASH_AUTOPROTECT_LIST {{0xfff80000, 0x80000}}

This config option will auto protect the last 512k of flash that
contains the bootloader on board like APC405 and PMC405.
Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>

This patch correctly sets the oobavail variable
and fixes a bug where the oob data was not valid when
there where multiple groups in oobfree.

First segment fixes a typo
Second segment fixes a bug where oob data may be copied incorrectly.
Third segment adds an error message when exiting due to write protect.
Forth segment fixes a bug where oobavail may be set incorrectly.
Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com>

This patch removes the board dependent parts from
"drivers/mtd/dataflash.c".
Each board relying on this, will have the appropriate
code in a new file, "partition.c" in the board directory.
board Makefiles updated to use the file.

The dataflash partitions are aligned on sector/page boundaries.

The CONFIG_NEW_DF_PARTITION was used to create named partitions
This is now the default operation, and the CONFIG variable is removed.
Signed-off-by: NUlf Samuelsson <ulf@atmel.com>

There are two NAND entries with ID 0xDC and this obviously causes problems.
In the kernel, they punted the first entry, so we should do the same.

See this upstream e-mail for more info:
http://lists.infradead.org/pipermail/linux-mtd/2007-July/018795.htmlSigned-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

It should access with 16-bit instead of 8-bit

Now it uses the generic memcpy with 8-bit access. It means it reads wrong data from OneNAND.
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>

Some NOR flash chip from Spansion, for example, the s29ws-n MirrorBit
series require different addresses for buffered write commands. Define a
configuration option to support buffered writes on those chips. A more
elegant solution would be to automatically detect those chips by parsing
their CFI records, but that would require introduction of a fixup table
into the cfi_flash driver.
Signed-off-by: NGuennadi Liakhovetski <lg@denx.de>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

DataFlash partition information has become a mess. This patch
defines a single partition scheme for Atmel DataFlashes. This partition
scheme will be used by all AT91CAP9 and AT91SAM9 boards.
Signed-off-by: NStelian Pop <stelian@popies.net>

SPARC has implemented __raw_readq, it reads 64-bit from any 32-bit address.
SPARC CPUs implement flash_read64 which calls __raw_readq.

For current SPARC architectures (LEON2 and LEON3) each read from the
FLASH must lead to a cache miss. This is because FLASH can not be set
non-cacheable since program code resides there, and alternatively disabling
cache is poor from performance view, or doing a cache flush between each
read is even poorer.

Forcing a cache miss on a SPARC is done by a special instruction "lda" -
load alternative space, the alternative space number (ASI) is processor
implementation spcific and can be found by including <asm/processor.h>.
Signed-off-by: NDaniel Hellstrom <daniel@gaisler.com>

Add entry for 512Kx16 AMD flash to jedec_table.
Read out 16bit device id if chipwidth is 16bit.
Fixed coding style after Stefans feedback
Signed-off-by: NTor Krill <tor@excito.com>

Flex-OneNAND is a monolithic integrated circuit with a NAND Flash array
using a NOR Flash interface. This on-chip integration enables system designers
to reduce external system logic and use high-density NAND Flash
in applications that would otherwise have to use more NOR components.

Flex-OneNAND enables users to configure to partition it into SLC and MLC areas
in more flexible way. While MLC area of Flex-OneNAND can be used to store data
that require low reliability and high density, SLC area of Flex-OneNAND
to store data that need high reliability and high performance. Flex-OneNAND
can let users take advantage of storing these two different types of data
into one chip, which is making Flex-OneNAND more cost- and space-effective.
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>

With this patch we don't need that many #ifdef's in the code. It moves
the subtraction into the macro and defines a NOP-macro when
CONFIG_FLASH_SHOW_PROGRESS is not defined.
Signed-off-by: NStefan Roese <sr@denx.de>
Acked-by: NGerald Van Baren <vanbaren@cideas.com>

Signed-off-by: NGerald Van Baren <vanbaren@cideas.com>

Do not use uninitialized cmd_reset; issue both AMD and Intel reset
commands instead

From a short test, it looks like AMD-style flash roms treat *any* unknown
command write as a reset, at least when in CFI Query mode, so issuing the
Intel reset command to AMD-style flashs seems safe (from the small sample I
have), plus the 3-cycle magic sequence should kick the state machine into
the right state even without a reset command. Since the AMD-style flashs
require the unlock sequence for real operation, I chose to try the AMD reset
command first, so that Intel flashs do no see an invalid command prior to
the CFI query.

I have tested the patch on AM29LV320-style flashs from Fujitsu and Macronix,
plus Intel StrataFlash.
Signed-off-by: NMichael Schwingen <michael@schwingen.org>
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NStelian Pop <stelian@popies.net>

Use a structure instead of the error prone unnamed array to
define the possible dataflash banks.
Signed-off-by: NStelian Pop <stelian@popies.net>

Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NStelian Pop <stelian@popies.net>

Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>

OneNAND: Separate U-Boot dependent code from OneNAND
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>

Signed-off-by: NMichael Schwingen <michael@schwingen.org>
Acked-by: NStefan Roese <sr@denx.de>

Signed-off-by: NMarcel Ziswiler <marcel@ziswiler.com>

This bug was detected on the LWMON5 target which has 2 Intel 16bit wide
flash chips connected to a 32bit wide port.
Signed-off-by: NStefan Roese <sr@denx.de>

This bug was detected on the LWMON5 target which has 2 Intel 16bit wide
flash chips connected to a 32bit wide port.
Signed-off-by: NStefan Roese <sr@denx.de>

The check for an sufficiently erased destination was missing in the
buffered write function of the cfi flash driver (when
CFG_FLASH_USE_BUFFER_WRITE is defined). This patch adds this check to that
writing to such a region will fail with the currect error message.
Signed-off-by: NStefan Roese <sr@denx.de>

Run fixups based on the JEDEC manufacturer ID independent of the
command set ID.

This changes current behaviour: Previously, geometry reversal for AMD
chips were done based on the command set ID, while they are now done
based on the JEDEC manufacturer and device ID.

Also add fixup for top-boot Atmel chips. A fixup is needed for
AT49BV6416(T) too, but since u-boot currently only reads the low byte
of the device ID, there's no way to tell it apart from AT49BV642D,
which should not have this fixup. Since AT49BV642D support is
necessary to get ATNGW100 board support into mainline, I've commented
out the fixup for now.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Move things like reading JEDEC IDs and fixing up geometry reversal
into separate functions. The geometry reversal fixup is now performed
by altering the qry structure directly, which makes the sector init
code slightly cleaner.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Read out the whole CFI Standard Query structure after successful cfi
identification. This allows subsequent code to access this information
directly without having to go through flash_read_uchar() and friends.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Use map_physmem() and unmap_physmem() to convert from physical to
virtual addresses. This gives the arch a chance to provide an uncached
mapping for flash accesses.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Introduce flash_read{8,16,32,64) and flash_write{8,16,32,64} and use
them to access the flash memory. This makes it clearer when the flash
is actually being accessed; merely dereferencing a volatile pointer
looks just like any other kind of access.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Reorder the functions in cfi_flash.c so that each function only uses
functions that have been defined before it. This allows the static
prototype declarations near the top to be eliminated and might allow
gcc to do a better job inlining functions.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Make functions not declared in any header file static.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

This patch tries to keep all lines in the cfi_flash driver below 80
columns. There are a few lines left which don't fit this requirement
because I couldn't find any trivial way to break them (i.e. it would
take some restructuring, which I intend to do in a later patch.)
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>