Add clock property for uart1 node.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>

With gcc-6 we see a warning that sysclk_tbl is defined but unused, so
remove it.

Cc: York Sun <york.sun@nxp.com>
Signed-off-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

- Remove "probe" function from sandbox wdt driver
- Fix include order

Fixes: 0753bc2d ("dm: Simple Watchdog uclass")
Signed-off-by: NMaxim Sloyko <maxims@google.com>
[trini: Create as the delta between v1 (applied) and v2 (should have
 applied)].
Signed-off-by: NTom Rini <trini@konsulko.com>

One some keystone2 platforms like K2G ICE, there is an option
to switch between 24MHz or 25MHz as sysclk. But the existing
driver assumes it is always 24MHz. Add support for getting
all reference clocks dynamically by reading boot pins.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

K2G supports various sysclk frequencies which can be
determined using sysboot pins. PLLs should be configured
based on this sysclock frequency. Add PLL configurations
for all supported sysclk frequencies.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Enable TI_COMMON_CMD_OPTIONS on all keystone2 platforms.
Also sync with savedefconfig.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Enable TI_COMMON_CMD_OPTIONS on all dra7xx platforms.
Also sync with savedefconfig.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Enable TI_COMMON_CMD_OPTIONS on all am57xx platforms.
Also sync with savedefconfig
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Enable TI_COMMON_CMD_OPTIONS on all am43xx platforms.
Also sync with savedefconfig.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Enable TI_COMMON_CMD_OPTIONS on all am335x platforms.
Also sync with savedefconfig.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
[trini: Re-sync, add in boneblack*, evm_hs_{norboot,spiboot,usbspl} configs]
Signed-off-by: NTom Rini <trini@konsulko.com>

Instead of defining command options in every defconfig,
define a common Kconfig symbol that consolidates all command
options that are supported by any TI platform. Also use imply
keyword so that that specific option can be disabled if
not required.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

ARM errata 852421 and 852423 applies to r1p0, r1p1 and r1p2
revisions of Cortex-A17 processors. These workarounds
exist in Linux kernel and I thought it would be better
to add them in to U-Boot.
Signed-off-by: NNisal Menuka <nisalmenuka23@gmail.com>

Remove unnecessary apb and ahb nodes and just override necessary
nodes/values.
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Refactor SCU header to use consistent Mask & Shift values.
Now, consistently, to read value from SCU register, mask needs
to be applied before shift.
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add support for clocks needed by MACs to ast2500 clock driver.
The clocks are D2-PLL, which is used by both MACs and PCLK_MAC1 and
PCLK_MAC2 for MAC1 and MAC2 respectively.

The rate of D2-PLL is hardcoded to 250MHz -- the value used in Aspeed
SDK. It is not entirely clear from the datasheet how this clock is used
by MACs, so not clear if the rate would ever need to be different. So,
for now, hardcoding it is probably safer.

The rate of PCLK_MAC{1,2} is chosen based on MAC speed selected through
hardware strapping.

So, the network driver would only need to enable these clocks, no need
to configure the rate.
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Enable I2C driver in ast2500 Eval Board defconfig.
Also enable i2c command.
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add Device Model based I2C driver for ast2500/ast2400 SoCs.
The driver is very limited, it only supports master mode and
synchronous byte-by-byte reads/writes, no DMA or Pool Buffers.
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NHeiko Schocher <hs@denx.de>

Add P-Bus Clock support to ast2500 clock driver.
This is the clock used by I2C devices.
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Enable Pinctrl Driver in AST2500 Eval Board's defconfig
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This driver uses Generic Pinctrl framework and is compatible with
the Linux driver for ast2500: it uses the same device tree
configuration.

Not all pins are supported by the driver at the moment, so it actually
compatible with ast2400. In general, however, there are differences that
in the future would be easier to maintain separately.
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This change switches all existing users of ast2500 Watchdog to Driver
Model based Watchdog driver.

To perform system reset Sysreset Driver uses first Watchdog device found
via uclass_first_device call. Since the system is going to be reset
anyway it does not make much difference which watchdog is used.

Instead of using Watchdog to reset itself, SDRAM driver now uses Reset
driver to do that.

These were the only users of the old Watchdog API, so that API is
removed.

This all is done in one change to avoid having to maintain dual API for
watchdog in between.
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add Reset Driver configuration to ast2500 SoC Device Tree and bindings
for various reset signals
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add Reset Driver for ast2500 SoC. This driver uses Watchdog Timer to
perform resets and thus depends on it. The actual Watchdog device used
needs to be configured in Device Tree using "aspeed,wdt" property, which
must be WDT phandle, for example:

rst: reset-controller {
    compatible = "aspeed,ast2500-reset";
    aspeed,wdt = <&wdt1>;
}
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Make functions for locking and unlocking SCU part of SCU API.
Many drivers need to modify settings in SCU and thus need to unlock it
first. This change makes it possible.
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This driver supports ast2500 and ast2400 SoCs.
Only ast2500 supports reset_mask and thus the option of resettting
individual peripherals using WDT.
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This is a simple uclass for Watchdog Timers. It has four operations:
start, restart, reset, stop. Drivers must implement start, restart and
stop operations, while implementing reset is optional: It's default
implementation expires watchdog timer in one clock tick.
Signed-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Pull in the Device Tree for ast2500 from the mainline Linux kernel.
The file is copied from
https://raw.githubusercontent.com/torvalds/linux/34ea5c9d/arch/arm/boot/dts/aspeed-g5.dtsiSigned-off-by: NMaxim Sloyko <maxims@google.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This patch is required for correct SPL device tree creation by fdtgrep
as fdtgrep looks for u-boot,dm-pre-reloc property of the node to include
it in the spl device tree.

Not adding it in these subnodes ignores the pin muxing of peripherals
which is almost always in the subnodes.
Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

CONFIG_CMD_DATE was recently moved to Kconfig. Remove the now duplicate
description of the option.
Signed-off-by: NChris Packham <judge.packham@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

The Kconfig description replaces the description in the README file so
as options are migrated they can be removed from the README.
Signed-off-by: NChris Packham <judge.packham@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

After moving to KConfig and removing from all headers options should be
removed from config_whitelist.txt so the build starts complaining if
someone adds them back.
Acked-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NChris Packham <judge.packham@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Avoid repetitive code dealing with asking the user for confirmation.
Signed-off-by: NChris Packham <judge.packham@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add an implementation of the ds1307 driver that uses the driver model
i2c APIs.
Signed-off-by: NChris Packham <judge.packham@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

netboot allows to boot an external image using TFTP and NFS protocols
Signed-off-by: NPau Pajuelo <ppajuelo@iseebcn.com>
Signed-off-by: NLadislav Michl <ladis@linux-mips.org>
Tested-by: NPau Pajuelo <ppajuel@gmail.com>

The IGEP SMARC AM335x is an industrial processor module with
following highlights:

  o AM3352 TI processor (Up to AM3359)
  o Cortex-A8 ARM CPU
  o SMARC form factor module
  o Up to 512 MB DDR3 SDRAM / 512 MB FLASH
  o WiFi a/b/g/n and Bluetooth v4.0 on-board
  o Ethernet 10/100/1000 Mbps and 10/100 Mbps controller on-board
  o JTAG debug connector available
  o Designed for industrial range purposes
Signed-off-by: NPau Pajuelo <ppajuelo@iseebcn.com>
Signed-off-by: NLadislav Michl <ladis@linux-mips.org>
Tested-by: NPau Pajuelo <ppajuel@gmail.com>

Convert IGEP board to use UBI volumes for U-Boot, its environment and
kernel. With exception of first four sectors read by SoC BootROM whole
NAND is UBI managed.
Signed-off-by: NLadislav Michl <ladis@linux-mips.org>
Reviewed-by: Heiko Schocher<hs@denx.de>
Tested-by: NPau Pajuelo <ppajuel@gmail.com>

Rename igep0033 to igep003x as IGEP SMARC AM335x module (igep0034)
can use the same source files.
Signed-off-by: NLadislav Michl <ladis@linux-mips.org>
Tested-by: NPau Pajuelo <ppajuel@gmail.com>

nand_spl_load_image implementation was copied over into three
different drivers and now with nand_spl_read_block used for
ubispl situation gets even worse. For now use least intrusive
solution and #include the same implementation to nand drivers.
Signed-off-by: NLadislav Michl <ladis@linux-mips.org>
Tested-by: NPau Pajuelo <ppajuel@gmail.com>