- 18 5月, 2021 9 次提交
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由 Ilias Apalodimas 提交于
Up to now we are stopping the EFI subsystem if a TPMv2 exists but the protocol fails to install. Now that we've switched the config to 'default y' the sandbox TPM fails, since it doesn't support all the required capabilities of the protocol. Not installing the protocol is not catastrophic. If the protocol fails to install the PCRs will never be extended to the expected values, so some other entity later in the boot flow will eventually figure it out and take the necessary actions. While at it fix a corner case were the user can see an invalid error message when the protocol failed to install. We do have a tcg2_uninit() which we call when the protocol installation fails. There are cases though that this might be called before the configuration table is installed (e.g probing the TPM for capabilities failed). In that case the user will see "Failed to delete final events config table". So stop printing it since it's not an actual failure , simply because the config table was never installed in the first place. In order to stop printing it make efi_init_event_log() and create_final_event() cleanup themselves and only call tcg2_uninit() when the protocol installation fails. Signed-off-by: NIlias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Ilias Apalodimas 提交于
Instead of just failing, clean up the installed config table and EventLog memory if logging an s-crtm event fails during the protocol installation Signed-off-by: NIlias Apalodimas <ilias.apalodimas@linaro.org> Eliminate label 'out:' by using return. Reviewed-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Ilias Apalodimas 提交于
efi_init_event_log() calls tcg2_uninit() in case of failure. We can skip that since the function is called on efi_tcg2_register() which also cleans up if an error occurs Signed-off-by: NIlias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Peng Fan 提交于
This is same issue as https://bugzilla.redhat.com/show_bug.cgi?id=1733817, but that fix was wrongly partial reverted. When reading a directory, EFI_BUFFER_TOO_SMALL should be returned when the supplied buffer is too small, so a use-case is to call EFI_FILE_PROTOCOL.Read() with *buffer_size=0 and buffer=NULL to obtain the needed size before doing the actual read. So remove the check only for directory reading, file reading already do the check by itself. Fixes: db12f518("efi_loader: implement non-blocking file services") Signed-off-by: NPeng Fan <peng.fan@nxp.com> Cc: Stefan Sørensen <stefan.sorensen@spectralink.com> Tested-by: NPeter Robinson <pbrobinson@gmail.com> Reviewed-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Sughosh Ganu 提交于
The current capsule authentication code checks if the environment variable capsule_authentication_enabled is set, for authenticating the capsule. This is in addition to the check for the config symbol CONFIG_EFI_CAPSULE_AUTHENTICATE. Remove the check for the environment variable. The capsule will now be authenticated if the config symbol is set. Signed-off-by: NSughosh Ganu <sughosh.ganu@linaro.org> Reviwed-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Heinrich Schuchardt 提交于
Commit a479f103 ("hash: Allow for SHA512 hardware implementations") defined function definitions for hardware accelerated SHA384 and SHA512. If CONFIG_SHA_HW_ACCEL=y, these functions are used. We already have boards using CONFIG_SHA_HW_ACCEL=y but none implements the new functions hw_sha384() and hw_sha512(). For implementing the EFI TCG2 protocol we need SHA384 and SHA512. The missing hardware acceleration functions lead to build errors on boards like peach-pi_defconfig. Introduce a new Kconfig symbol CONFIG_SHA512_HW_ACCEL to control if the functions hw_sha384() and hw_sha512() shall be used to implement the SHA384 and SHA512 algorithms. Fixes: a479f103 ("hash: Allow for SHA512 hardware implementations") Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Heinrich Schuchardt 提交于
Building 32bit boards with the TCG2 protocol enabled leads to a build warning due to a missing conversion. lib/efi_loader/efi_tcg2.c:774:27: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast] 774 | ret = tcg2_create_digest((u8 *)data_to_hash, data_to_hash_len, | ^ Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: NIlias Apalodimas <ilias.apalodimas@linaro.org>
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由 Heinrich Schuchardt 提交于
'make htmldocs' results in a build warning checking consistency... doc/usage/extension.rst: WARNING: document isn't included in any toctree Add the document to the index. Fixes: 2f84e9cf ("cmd: add support for a new "extension" command") Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Heinrich Schuchardt 提交于
Provide a man-page for the size command. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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- 17 5月, 2021 4 次提交
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https://source.denx.de/u-boot/custodians/u-boot-marvell由 Tom Rini 提交于
- Add base support for Marvell OcteonTX2 CN9130 DB (mostly done by Kostya) - Sync Armada 8k MMU setup with Marvell version (misc Marvell authors) - spi: kirkwood: Some fixes especially for baudrate generation (misc Marvell authors) - mvebu: x530: Reduce SPL image size (Stefan) - Rename "rx_training" to "mvebu_comphy_rx_training" (Stefan)
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由 Kunihiko Hayashi 提交于
Even if only USB gadget is defined, dwc3 generic driver enables a definition and probe/remove functions for host driver. This enables the definition if USB_HOST is enabled only. Signed-off-by: NKunihiko Hayashi <hayashi.kunihiko@socionext.com>
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由 Andre Przywara 提交于
All newer Allwinner SoCs (since about 2013) miss the CONFIGDATA register in their MUSB implementation, so they need a quirk to hardcode this. Currently this quirk depends on listing the SoCs affected in musb_reg.h, which means that this list needs to grow with every new chip. Move the quirk feature into Kconfig, next to PIO_ONLY, and change the default to y (for Allwinner builds), while listing the early implementations as exceptions. This fixes USB peripheral operation on some newer SoCs, which were not explicitly listed before. Tested on H6, H616, R40 (which were broken before), and also on the H5 and A20, for regressions. Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
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- 16 5月, 2021 12 次提交
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由 Konstantin Porotchkin 提交于
This patch adds the base support for the Marvell Octeon TX2 CN913x DB. Only one defconfig is added with this patch. Other board variants are available (NAND, MMC booting) and images for these boards can be generated by following the documentation added in the included README. Signed-off-by: NKonstantin Porotchkin <kostap@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Konstantin Porotchkin 提交于
This patch adds the dtsi/dts files needed to support the Marvell Octeon TX2 CN913x DB. This is only the base port with not all interfaces supported fully. Signed-off-by: NKonstantin Porotchkin <kostap@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
Rename the misleading cmd "rx_training" to "mvebu_comphy_rx_training" to avoid confusion and mixup with DDR3/4 training. This makes it clear, that this command is platform specific and handles the COMPHY RX training. Also depend this cmd on ARMADA_8K and not TARGET_MVEBU_ARMADA_8K to make is available for OcteonTX2 CN913x. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Pali Rohár <pali@kernel.org> Cc: Marek Behun <marek.behun@nic.cz> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Acked-by: NMarek Behún <marek.behun@nic.cz> Acked-by: NPali Rohár <pali@kernel.org>
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由 Marcin Wojtas 提交于
The pcie_dw_mvebu configure ATU regions for memory, configuration and IO space types. However the latter is not obligatory and when not specified in the device tree, causes wrong ATU configuration. Fix that by adding a dependency on the detected PCIE regions count. Signed-off-by: NMarcin Wojtas <mw@semihalf.com> Reviewed-on: https://sj1git1.cavium.com/18136Reviewed-by: NKostya Porotchkin <kostap@marvell.com> Tested-by: NKostya Porotchkin <kostap@marvell.com>
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由 Grzegorz Jaszczyk 提交于
Some of the setups including cn9130 opens mmio window starting from 0xc0000000, reflect it in the u-boot code. Signed-off-by: NGrzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: NKostya Porotchkin <kostap@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Grzegorz Jaszczyk 提交于
Signed-off-by: NGrzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Grzegorz Jaszczyk 提交于
There is region left by ATF, which needs to remain in memory to provide RT services. To prevent overwriting it by u-boot, do not provide any mapping for this memory region, so any attempt to access it will trigger synchronous exception. Update sr 2021-04-12: Don't update armada3700/cpu.c mmu table, as this has specific changes included in mainline. Signed-off-by: NGrzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 jinghua 提交于
1. RAM: base address 0x0 size 2Gbytes 2. MMIO: base address 0xf0000000 size 1Gbytes Signed-off-by: NOfir Fedida <ofedida@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Grzegorz Jaszczyk 提交于
After commit 1fe929ed497bcc8975be8d37383ebafd22b99dd2 ("spi: kirkwood: prevent configuring speed exceeding max controller freq") the spi frequency could be set to 0 on platform where spi-max-frequency is not defined (e.g. on armada-388-gp). Prevent limiting speed in mentioned cases. Signed-off-by: NGrzegorz Jaszczyk <jaz@semihalf.com> Tested-by: NKostya Porotchkin <kostap@marvell.com> Reviewed-by: NMarcin Wojtas <marcin@marvell.com> Reviewed-by: NKostya Porotchkin <kostap@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Marcin Wojtas 提交于
This patch adds a limitation in the kirkwood_spi driver set_speed hook, which prevents setting too high transfer speed. Signed-off-by: NMarcin Wojtas <mw@semihalf.com> Reviewed-by: NKostya Porotchkin <kostap@marvell.com> Tested-by: NKostya Porotchkin <kostap@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Ken Ma 提交于
The Armada SoC family implementation of this SPI hardware module has extended the configuration register to allow for a wider range of SPI clock rates. Specifically the Serial Baud Rate Pre-selection bits in the SPI Interface Configuration Register now also use bits 6 and 7 as well. Modify the baud rate calculation to handle these differences for the Armada case. Potentially a baud rate can be setup using a number of different pre-scalar and scalar combinations. This code tries all possible pre-scalar divisors (8 in total) to try and find the most accurate set. Signed-off-by: NKen Ma <make@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
Currently, building U-Boot for x530 fails since the SPL image is too big. This patch reduces the SPL size by changing the following Kconfig options: Enable CONFIG_SPL_TINY_MEMSET Disable CONFIG_SPI_FLASH_BAR By disabling CONFIG_SPI_FLASH_BAR, the tiny SPI NOR framework can be used. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Chris Packham <chris.packham@alliedtelesis.co.nz> Cc: Pratyush Yadav <p.yadav@ti.com> Cc: Tom Rini <trini@konsulko.com> Tested-by: NChris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: NPratyush Yadav <p.yadav@ti.com>
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- 15 5月, 2021 4 次提交
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由 Tom Rini 提交于
Rsync all defconfig files using moveconfig.py Signed-off-by: NTom Rini <trini@konsulko.com>
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https://source.denx.de/u-boot/custodians/u-boot-amlogic由 Tom Rini 提交于
- dts: add missing -u-boot.dtsi to enable HDMI on Beelink GTKing/King-Pro - usb: dwc3-meson-g12a: skip phy on -ENODATA aswell - net: dwmac_meson8b: do not set TX delay in TXID & RXID - net: designware: meson8b: add g12a compatible
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- 14 5月, 2021 11 次提交
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由 Neil Armstrong 提交于
Add support for the Meson G12A dwmac glue compatible needed after Linux 5.12 sync. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
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由 Neil Armstrong 提交于
When the PHY interface is set as TXID & RXID, the delays should be taken from DT, but first they should not be hardcoded since the PHY driver will set them. Fixes: 798424e8 ("net: designware: add Amlogic Meson8b & later glue driver") Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Reviewed-by: NRamon Fried <rfried.dev@gmail.com>
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由 Neil Armstrong 提交于
If the PHY isn't specified in the DT, -ENODATA means it should be skipped, handle it like -ENOENT. With that, devices without USB3 supported can have USB working (Odroid-HC4). Fixes: adb049ab ("usb: dwc3: Add Meson G12A USB Glue") Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
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由 Neil Armstrong 提交于
This lacks the right u-boot specific DT include to make HDMI work. Reported-by: NB1oHazard <ty3uk@mail.ua> Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
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由 Bin Meng 提交于
This reverts commit bc8bbb77. This commit breaks U-Boot booting on SiFive Unleashed board, as there is no such CSR on U54 core. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NLeo Yu-Chi Liang <ycliang@andestech.com>
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由 Vincent Chen 提交于
The pwm_sifive_set_config() and pwm_sifive_set_enable() cannot work properly due to the wrong implementations. It will cause the u-boot PWM command to not work as expected. The bugs will be resolved in this patch. Signed-off-by: NVincent Chen <vincent.chen@sifive.com> Reviewed-by: NRick Chen <rick@andestech.com>
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由 Sean Anderson 提交于
It is no longer necessary to disallow ai ram, since it is enabled by the sram driver. Signed-off-by: NSean Anderson <seanga2@gmail.com>
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由 Sean Anderson 提交于
Testing showed that disabling AI while leaving PLL1 enabled disabled the aisram. This suggests that AI is a more appropriate clock for that ram bank. Signed-off-by: NSean Anderson <seanga2@gmail.com>
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由 Sean Anderson 提交于
This is more consistent with the naming of other ram banks, and matches what Linux is doing. Reported-by: NDamien Le Moal <Damien.LeMoal@wdc.com> Signed-off-by: NSean Anderson <seanga2@gmail.com>
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由 Sean Anderson 提交于
We just need to initialize all the clocks pre-reloc. The clock driver creates a bunch of devices, so we need to increase the pre-reloc malloc arena. Signed-off-by: NSean Anderson <seanga2@gmail.com>
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由 Sean Anderson 提交于
These devices are necessary for the clock driver, which is required by the sram driver, to run pre-relocation. Signed-off-by: NSean Anderson <seanga2@gmail.com>
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