- 16 1月, 2018 21 次提交
-
-
由 Zhao Qiang 提交于
Signed-off-by: NZhao Qiang <qiang.zhao@nxp.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Nobuhiro Iwamatsu 提交于
This adds SH_ETHER to drivers/net/Kconfig and convert to Kconfig. Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Nobuhiro Iwamatsu 提交于
When we using network on board using sh-eth, it prints a lot of "CACHE: Misaligned operation at range" messages. This commit fixes this problem. Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Nobuhiro Iwamatsu 提交于
This changes Change structure used in sh_eth_read and sh_eth_write function from struct sh_eth_dev to struct sh_eth_info. This is necessary to convert to Driver Model. Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Nobuhiro Iwamatsu 提交于
bd_t is not used in sh_eth_config(). This deletes bd_t from sh_eth_config() Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Nobuhiro Iwamatsu 提交于
This fixes the chord style checked by checkpatch.pl. Details of change details are as follows: - Fix typo Change from alligned to aligned. - Remove whitespace before ',' - Add spaces preferred around that '|' - Fix missing a blank line after declarations - Remove space after a cast declaration - Fix format of block comments - Add a blank line after function/struct/union/enum declarations Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Joe Hershberger 提交于
This change allows the "MAY_FAIL" DHCP option to still attempt to contact a DHCP server on each adapter and only give up once each adapter has failed once. To get the existing behavior, set the already-existing ethrotate=no variable. Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com> Cc: Keng Soon Cheah <keng.soon.cheah@ni.com> Cc: Chen Yee Chew <chen.yee.chew@ni.com>
-
由 Florian Fainelli 提交于
Enable CONFIG_B53_SWITCH, define the CPU/management port number (8) and enable all 5 ports of the switch to be usable. Reviewed-by: NStefan Roese <sr@denx.de> Acked-by: NJoe Hershberger <joe.hershberger@ni.com> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
-
由 Florian Fainelli 提交于
Add a b53_reg read/write command which allows inspecting the switch registers. Because the Broadcom BCM53xx registers have different sizes, we need to split the accesses in 8, 16, 32, 48 or 64 bits to obtain expected results. Reviewed-by: NStefan Roese <sr@denx.de> Acked-by: NJoe Hershberger <joe.hershberger@ni.com> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
-
由 Florian Fainelli 提交于
Make sure that we pad small packets to a minimum length of 60 bytes (without FCS). This is necessary to interface with Ethernet switches that will reject RUNT frames unless padded correctly. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
-
由 Florian Fainelli 提交于
Add a minimalistic Broadcom BCM53xx (roboswitch) switch driver similar to the Marvell MV88E617x. This takes care of configuring the minimum amount out of the switch hardware such that each user visible port (configurable) and the CPU port can forward packets between each other while preserving isolation with other ports. This is useful for e.g: the Lamobo R1 board featuring a Broadcom BCM53125 switch. Reviewed-by: NStefan Roese <sr@denx.de> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
-
由 Patrice Chotard 提交于
This implementation manages several clocks, disable and free all of them in case of error during probe and in remove callback. Signed-off-by: NPatrice Chotard <patrice.chotard@st.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Patrice Chotard 提交于
Add missing dev_count_phandle_with_args() to avoid compilation issue. Signed-off-by: NPatrice Chotard <patrice.chotard@st.com> Reviewed-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Jason Brown 提交于
This patch fixes a problem in the mvneta driver where if more than one packet arrives between calls to mvneta_recv(), the additional descriptors will be marked as free even though only one descriptor has been read and processed from the receive queue. This causes the additional packet(s) to be delayed until the next packet arrives. >From this point on all packets will be delayed because the receive queue will contain unprocessed packets but the hardware shows no busy descriptors. Signed-off-by: NJason Brown <jason.brown@apcon.com> Reviewed-by: NStefan Roese <sr@denx.de> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Chris Brandt 提交于
Since the return value is a signed int, if the leading MSB of rdreg is a 1, it will get signed extended and will return a negative value which is an error even though we read the correct value. Fixes: dfcc496e ("net: mii: Changes not made by spatch") Signed-off-by: NChris Brandt <chris.brandt@renesas.com> Acked-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Chris Brandt 提交于
First, this table could never be included in the build anyway because SH_ETH_TYPE_RZ is not defined until later in the file. Second, the register PIR was missing, so PHY MDIO never worked. Third, after adding the PIR register, the table is EXACTLY the same as sh_eth_offset_gigabit, so there is no value to it. Therefore, just delete it use the gigabit one. Signed-off-by: NChris Brandt <chris.brandt@renesas.com> Acked-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Chris Brandt 提交于
The macros inl and outl maybe already be defined from file arch/arm/include/asm/io.h so there may be no reason to define them. And if you do try defined them here, you get a redefined complier warning. Signed-off-by: NChris Brandt <chris.brandt@renesas.com> Acked-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Lukasz Majewski 提交于
This commit allows extended Marvell registers to be read with: foo > mdio rx FEC 3.10 Reading from bus FEC PHY at address 0: 3.16 - 0x1063 foo > mdio wx FEC 3.10 0x1011 The above code changes the way ETH connector LEDs blink. Signed-off-by: NLukasz Majewski <lukma@denx.de> Reviewed-by: NYork Sun <york.sun@nxp.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Joe Hershberger 提交于
Nothing from this header is used there, so remove it. Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Joe Hershberger 提交于
Need to not access the byte after the input_buffer. Reported-by: Coverity (CID: 144423) Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Wilson Lee 提交于
Although Xilinx Zynq SoC was using MACB similar hardware. However, U-boot MACB driver was not supporting Xilinx Zynq SoC. This patch is to add support for the Xilinx Zynq SoC to the existing MACB network driver. This patch is to add Zynq GEM DMA Config, provide callback function for different linkspeed for case of using Xilinx Zynq Programmable Logic as GMII to RGMII converter. This patch convert the return value to use error codes. Signed-off-by: NWilson Lee <wilson.lee@ni.com> Cc: Chen Yee Chew <chen.yee.chew@ni.com> Cc: Keng Soon Cheah <keng.soon.cheah@ni.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
-
- 15 1月, 2018 1 次提交
-
-
- 13 1月, 2018 15 次提交
-
-
-
由 Stephen Warren 提交于
With CONFIG_SYS_INIT_SP_BSS_OFFSET enabled, the initial (pre-relocation) stack is placed some distance after bss_start. The control DTB is appended to the U-Boot binary at bss_start. If the DTB is too large, or the SP BSS offset too small, then the initial stack could corrupt the DTB. Enhance the Makefile to check whether this is likely to occur. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Stephen Warren 提交于
Request that all environment variables containing hard-coded address be calculated at boot time instead. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Stephen Warren 提交于
In the presence of potentially fragemented memory, we cannot hard-code addresses into environment variables such as kernel_addr_r. Instead, we must calculate those addresses at run-time based on available memory locations. Implement the code to perform such runtime calculation, based on requirements described in environment variables, to allow the user full control over the allocation. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Stephen Warren 提交于
Tegra186 currently restricts its DRAM usage to entries in the /memory node in the DTB passed to it. However, the MMU configuration always maps the entire first 2GB of RAM. This could allow the CPU to speculatively access RAM that isn't part of the in-use banks. This patch switches to runtime construction of the table that's used to construct the MMU translation tables, and thus prevents access to RAM that's not part of a valid bank. Note: This patch is intended to prevent access to RAM regions which U-Boot does not need to access, with the primary purpose of avoiding theoretical speculative access to physical regions for which the HW will throw errors (e.g. carve-outs that the CPU has no permission to access at a bus level, bad ECC pages, etc.). In particular, this patch is not deliberately related to the speculation-related security issues that were recently announced. The apparent similarity is a coincidence. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Stephen Warren 提交于
On this platform, there may be up to 1024 unusable chunks of memory. Increase CONFIG_NR_DRAM_BANKS so that U-Boot can remember all the banks required to represent such fragmented memory. Signed-off-by: NStephen Warren <swarren@nvidia.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Stephen Warren 提交于
In the future, the list of DRAM regions passed to U-Boot in the DTB may be quite long and fragmented. Due to this, U-Boot must search through the regions to find the best region to relocate into, rather than relying on the current assumption that the top of bank 0 is a reasonable relocation target. This change implements such searching. Signed-off-by: NStephen Warren <swarren@nvidia.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Stephen Warren 提交于
arch_lmb_reserve() currently assumes that the stack pointer is within DRAM bank 0. This is not necessarily true. Enhance the code to search through DRAM banks until the bank that does contain SP is found, and then reserve the tail of that bank. Fixes: 2d1916e4 ("ARM: add flat device tree support") Signed-off-by: NStephen Warren <swarren@nvidia.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Stephen Warren 提交于
Apply a few small fixes for the DTB /memory node parsing from NVIDIA's downstream U-Boot: - Allow arbitrary number of DRAM banks. - Correctly calculate the number of DRAM banks. - Clip PCIe memory in the same way as U-Boot CPU memory use. Signed-off-by: NStephen Warren <swarren@nvidia.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Stephen Warren 提交于
Enable CONFIG_LINUX_KERNEL_IMAGE_HEADER for all 64-bit Tegra boards. cboot (the boot SW that runs before U-Boot) will eventually use this information. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Stephen Warren 提交于
Allow placing a Linux kernel image header at the start of the U-Boot binary. This is useful since the image header reports the amount of memory (BSS and similar) that U-Boot needs to use, but that isn't part of the binary size. This can be used by the code that loads U-Boot into memory to determine where to load U-Boot, based on other users of memory. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Stephen Warren 提交于
Enable CONFIG_SYS_INIT_SP_BSS_OFFSET for all 64-bit Tegra boards. Place the stack/... 512KiB from the end of the U-Boot binary. This should be plenty to accommodate the current DTBs (max 64 KiB), early malloc region (6KiB), stack usage, and plenty of slack, while still not placing it too far away from the U-Boot binary. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Stephen Warren 提交于
U-Boot typically uses a hard-coded value for the stack pointer before relocation. Implement option SYS_INIT_SP_BSS_OFFSET to instead calculate the initial SP at run-time. This is useful to avoid hard-coding addresses into U-Boot, so that can be loaded and executed at arbitrary addresses and thus avoid using arbitrary addresses at runtime. This option's value is the offset added to &_bss_start in order to calculate the stack pointer. This offset should be large enough so that the early malloc region, global data (gd), and early stack usage do not overlap any appended DTB. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Stephen Warren 提交于
No 64-bit Tegra uses SPL. Remove various unused definitions from config headers. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Stephen Warren 提交于
64-bit Tegra don't use SPL, and soon won't define CONFIG_SPL_TEXT_BASE when building. Fix the binman .dts file so that it doesn't use undefined values. Signed-off-by: NStephen Warren <swarren@nvidia.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
- 12 1月, 2018 3 次提交
-
-
由 Peng Fan 提交于
Current USDHC driver will reset VSELECT to 0 (3.3v) during mmc init, then set to 1 for 1.8v eMMC I/O. When booting from eMMC, since ROM has already set VSELECT to 1.8v before running the u-boot. This reset in USDHC driver causes a short 2.2v pulse on CMD pin. Fix this issue by not reset VSELECT to 0 when 1.8v flag is set. Signed-off-by: NYe Li <ye.li@nxp.com> Signed-off-by: NPeng Fan <peng.fan@nxp.com>
-
由 Tom Rini 提交于
In order to discard this code when unused in SPL we need to guard the command with a check for CONFIG_SPL_BUILD and we rearrange the code slightly to make this cleaner. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NTom Rini <trini@konsulko.com>
-
由 Rick Chen 提交于
Enable travis-ci support with a link having built. Signed-off-by: NChih-Mao Chen <cmchen@andestech.com> Signed-off-by: NRick Chen <rick@andestech.com> Signed-off-by: NRick Chen <rickchen36@gmail.com> Signed-off-by: NGreentime Hu <green.hu@gmail.com>
-