This converts the following to Kconfig:
   CONFIG_ARCH_CPU_INIT
Signed-off-by: NAdam Ford <aford173@gmail.com>
Acked-by: NChris Packham <chris.packham@alliedtelesis.co.nz>
Tested-by: NFelix Brack <fb@ltec.ch>

Rsync all defconfig files using moveconfig.py
Signed-off-by: NTom Rini <trini@konsulko.com>

- remove rk3288 fennec board
- remove SPL raw image support for Rockchip SoCs
- add common misc_init_r() for ethaddr from cpuid
- enable USB HOST support for rk3328
- unify code for finding a valid gpt in part driver

- Migrate CONFIG_MX_CYCLIC, CONFIG_FSL_USDHC and CONFIG_MXS_GPIO to
  Kconfig
- Fix some SPL/TPL and ARM64 dependencies

This converts the following to Kconfig:
   CONFIG_MX_CYCLIC
Signed-off-by: NAdam Ford <aford173@gmail.com>
Acked-by: NDavid Lechner <david@lechnology.com>

This converts the following to Kconfig:
   CONFIG_FSL_USDHC
Signed-off-by: NAdam Ford <aford173@gmail.com>
[trini: Add IMX8M, TARGET_S32V234EVB to FSL_USDHC list]
Signed-off-by: NTom Rini <trini@konsulko.com>

Several options are presenting themselves on a various boards
where the options are clearly not used.  (ie, arm64 options on
arm9, or SPL/TPL options when SPL or TPL are not defined)

This patch is not attempting to be a complete list of items, but
more like low hanging fruit.

This patch attempts to reduce some of the menuconfig noise
by defining dependencies so they don't appear when not used.
Signed-off-by: NAdam Ford <aford173@gmail.com>

This converts the following to Kconfig:
   CONFIG_MXS_GPIO

Travis-CI: https://travis-ci.org/lmajewski/u-boot-dfu/builds/571260789Signed-off-by: NLukasz Majewski <lukma@denx.de>
Acked-by: NPeng Fan <peng.fan@nxp.com>
Acked-by: NJagan Teki <jagan@amarulasolutions.com>

This was changed to 1 in commit 0717dde0, but a few months later,
commit 5f9411af swapped the order of eMMC and SD card by assigning
indexed aliases to `&sdhci` and `&sdmmc`.
Signed-off-by: NMax Kellermann <max.kellermann@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
(Add signature)
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

Some ChromeOS devices (atleast veyron speedy) have the first 8MiB of
the eMMC write protected and equipped with a dummy 'IGNOREME' GPT
header - instead of spewing error messages about it, just silently
try the backup GPT.

Note: this does not touch the gpt cmd writing/verifying functions,
those will still complain.
Signed-off-by: NUrja Rannikko <urjaman@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

There were 3 copies of the same sequence, make it into a function.
Signed-off-by: NUrja Rannikko <urjaman@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

We should use the shared helpers to setup the necessary parts
Signed-off-by: NRohan Garg <rohan.garg@collabora.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

This enables us to set a static MAC address
Signed-off-by: NRohan Garg <rohan.garg@collabora.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Generate a MAC address based on the cpuid available in the efuse
block: Use the first 6 byte of the cpuid's SHA256 hash and set the
locally administered bits. Also ensure that the multicast bit is
cleared.

The MAC address is only generated and set if there is no ethaddr
present in the saved environment.

This is based off of Klaus Goger's work in 8adc9d
Signed-off-by: NRohan Garg <rohan.garg@collabora.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Since there is no one using this board, remove it.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

RK3399 SPL only support FIT image for ATF bl31.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

RK3368 SPL only support FIT image for ATF bl31.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

RK3328 SPL only support FIT image for ATF bl31.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

According to rock64 schemetic, both VCC_HOST1_5V and VCC_HOST_5V are
controlled by USB20_HOST_DRV(GPIO0A2), fix it so that we can get correct
power supply for USB HOST ports.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

Move all the nodes only shown in u-boot to -u-boot.dtsi to make
rk3328.dtsi clean.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

Rock64 has a USB3.0 port, enable the controller so that we can use it.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

Required to successfully probe the ehci generic driver
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

We need to store all the ram related cap/map info back to register
for each channel after all the init has been done in case some of register
was reset during the process.
Signed-off-by: NYouMin Chen <cym@rock-chips.com>
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

- i2c dm model support of lx2160a, ls1088a, lx2088a, ls1028a
- icid setup for ls1028a, ls1088a
- other small fixes

Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, edma, qdma, gpu, display and sec.
Signed-off-by: NLaurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: NHoria Geantă <horia.geanta@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, sec. The ICID macros for SEC needed to be adapted because
the format of the registers is different.
Signed-off-by: NLaurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: NHoria Geantă <horia.geanta@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

The current implementation assumes that the registers holding the ICIDs
are universally big endian. That's no longer the case on newer
platforms so update the code to take into account the endianness of
each register.
Signed-off-by: NLaurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: NHoria Geantă <horia.geanta@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Add CCSR base addresses for ESDHC2, EDMA QDMA, DISPLAY and GPU devices.
Signed-off-by: NLaurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Add defines for all the SEC job rings base addresses.
Signed-off-by: NLaurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: NHoria Geantă <horia.geanta@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

By default, i2c input clock is platform clk / 2, but some of the
platform of i2c clock divider does not meet this kind of circumstance,
so alone to set default values for these platforms.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

BRDCFG4[USBOSC] and BRDCFG5[SPR] register field of Qixis device is used
to control SPI and other IP signal routing.

USBOSC:
0= SPI_CLK used as external USB REFCLK input driven with 24.000 MHz.
SPI devices are unusable in this mode.
1= SPI_CLK used as SPI clock.
SPI devices are usable in this mode. USB block is clocked from
internal sources

SPR[3:2]:
SPI_CS / SDHC_DAT4:7 Routing (schematic net CFG_SPI_ROUTE[3:2]):
00= SDHC/eMMC 8-bit
01= SD Card Rev 2.0/3.0
10= SPI on-board memory
11= TDM Riser / SPI off-board connector.
The default value is 00 if an SDCard/eMMC card is selected as the boot
device.

SPR[1:0]:
SPI_SIN/SOUT/SCK Routing (schematic net CFG_SPI_ROUTE[1:0]):
00= SDHC Sync loop
01= TDM Riser / SPI off-board connector.
10= SPI on-board memory.
11= SPI off-board connector.

By default, the SPI feature is not available, so we need to configure
the above register fields to select the route to the SPI feature.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Define ARCH_MISC_INIT for LS1028AQDS platform to handle board
related mux.
Signed-off-by: NPankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Defines CONFIG_ENV_ADDR for QSPI Boot which specifies the start
address of the flash sector containing the environment. It fixes
the issue that bootcmd is always set as default at bootup.
Signed-off-by: NAlison Wang <alison.wang@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Flexcan in LX2160ARDB is controlled by FPGA register boardcfg4
bit 5. enable this bit so that flexcan is enabled in LX2160ARDB.
Signed-off-by: NPankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Enable related configs on all ls1088aqds boards to support pcf2127
rtc DM function.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Add the pcf2127-rtc node under the i2c0->i2c-mux@77->i2c@3 for ls1088aqds boards.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Udate ls1088aqds board init code to support DM_I2C.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

This patch adds some slave nodes to support the i2c dm on the device
side under the i2c0 controller.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>