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  1. 08 8月, 2009 1 次提交
  3. 05 8月, 2009 1 次提交
  5. 03 8月, 2009 1 次提交
  7. 01 8月, 2009 2 次提交
  9. 30 7月, 2009 7 次提交
  11. 29 7月, 2009 11 次提交
  13. 28 7月, 2009 11 次提交
    • T
      TWL4030 Add power reset button · cd782635
      由 Tom Rix 提交于 
      The Zoom2 power reset button is on the top right side of the
main board.  Press and hold for about to 8 seconds to completely
reset the board.

Some of the beta boards have a hardware problem that prevents
using this feature.  If is difficult to further characterize the
boards that fail.  So disable resetting for all beta boards.

The Zoom1 reset button is the red circle on the top right,
front of the board.  Press and hold the button for 8 seconds to
completely reset the board.

After analyzing beagle, it was determined that other boards
that use the twl4030 for power managment can also make use
this function.

The resetting is done by the power management part of the twl4030.
Since there is no existing drivers/power, add one.

The compilation of power/twl4030.h is controlled by the config
variable CONFIG_TWL4030_POWER
Signed-off-by: NTom Rix <Tom.Rix@windriver.com>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NHeiko Schocher <hs@denx.de>
      cd782635
    • T
      TWL4030 Add initial support · 8966eb4c
      由 Tom Rix 提交于 
      The TWL4030 supplies many peripherals for OMAP3 boards. These include
power management, usb and, keyboard.

The product description is found here:

http://focus.ti.com/docs/prod/folders/print/tps65950.html

Product reference document, tps65950.pdf, is found here:

http://www.ti.com/lit/gpn/tps65950Signed-off-by: NTom Rix <Tom.Rix@windriver.com>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NHeiko Schocher <hs@denx.de>
      8966eb4c
    • T
      OMAP I2C Fix the sampling clock. · 7f79dfb4
      由 Tom Rix 提交于 
      This problem is seen on Zoom1 and Zoom2 in the startup and
when i2c probe is used

Before :

In:    serial
Out:   serial
Err:   serial
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_pin: I2C_STAT=1000
I2C read: I/O error
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
Die ID #327c00020000000004013ddd05026013
Hit any key to stop autoboot:  0
OMAP3 Zoom1# i2c probe
Valid chip addresses:timed out in wait_for_bb: I2C_STAT=1000
 02 03 04 05 06 07 08 09 0A 0B 0C 0D <snip>

After :

In:    serial
Out:   serial
Err:   serial
Die ID #327c00020000000004013ddd05026013
Hit any key to stop autoboot:  0
OMAP3 Zoom1# i2c probe
Valid chip addresses: 48 49 4A 4B

The addresses are for the twl4030.

The prescalar that converts the function clock to the sampling
clock is hardcoded to 0.  The reference manual recommends 7
if the function clock is 96MHz.

Instead of just changing the hardcoded values, the prescalar
is calculated from the value I2C_IP_CLK.

The i2c #defines are in kHz.  The speed passed into the
i2c init routine is in Hz.  To be consistent, change the
defines to be in Hz.

The timing calculations are based on what is done in the
linux 2.6.30 kernel in drivers/i2c/buses/i2c_omap.c as
apposed to what is done in TRM.

The major variables in the timing caculations are
specified as #defines that can be overriden as required.

The variables and their defaults are

I2C_IP_CLK				SYSTEM_CLOCK_96
I2C_INTERNAL_SAMPLING_CLK		19200000
I2C_FASTSPEED_SCLL_TRIM			6
I2C_FASTSPEED_SCLH_TRIM			6
I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM	I2C_FASTSPEED_SCLL_TRIM
I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM	I2C_FASTSPEED_SCLH_TRIM
I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM	I2C_FASTSPEED_SCLL_TRIM
I2C_HIGHSPEED_PHASE_TWO_SCLH		I2C_FASTSPEED_SCLH_TRIM

This was runtime verified on Zoom1, Zoom2, Beagle and Overo.
The 400kHz and 3.4M cases were verifed on test Zoom1,
Zoom2, Beagle and Overo configurations.

Testing for omap2 will be done in a second step as Nishanth
and Jean-Christophe commented.
Signed-off-by: NTom Rix <Tom.Rix@windriver.com>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NHeiko Schocher <hs@denx.de>
      7f79dfb4
    • H
      arm, i2c: added support for the TWSI I2C Interface · 4ce5a728
      由 Heiko Schocher 提交于 
      Signed-off-by: NHeiko Schocher <hs@denx.de>
      4ce5a728
    • S
      ppc4xx: Fix problem with NOR range assignment in Canyonlands ft_board_setup · 042d01c7
      由 Stefan Roese 提交于 
      This patch fixes the problem, that the current fdt board fixup code only
set's one range, the one for NOR. By this it's overwriting the already
correctly configured values done in __ft_board_setup(). Just remove this
now unneeded NOR fixup and all the ranges are correctly defined.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Felix Radensky <felix@embedded-sol.com>
      042d01c7
    • S
      ppc4xx: Add some NAND-booting bootstrap entries to Kilauea chip_config cmd · 11a1604f
      由 Stefan Roese 提交于 
      This patch adds some I2C bootstrap setting for NAND booting to the Kilauea
chip_config command ("533-nand" and "600-nand").

Additionally some incorrectly indented lines are fixed.
Signed-off-by: NStefan Roese <sr@denx.de>
      11a1604f
    • S
      ppc4xx: Kilauea: Fix SDRAM init in NAND booting version · 5b34691f
      由 Stefan Roese 提交于 
      DDR2 Auto-calibration needs to be disabled on the NAND booting PPC4xx
targets. Otherwise the configured fixed init values for some DDR2
controller registers (e.g. RQDC) are not initialized at all resulting
in a non working SDRAM.
Signed-off-by: NStefan Roese <sr@denx.de>
      5b34691f
    • S
      ppc4xx: Fix Arches DDR2 initialization · f3ed3c9b
      由 Stefan Roese 提交于 
      Testing on AMCC Arches with the latest U-Boot version yielded that DDR2
initialization is currently broken. U-Boot hangs upon relocation to SDRAM
or crashes with random traps. This patch fixes this problem. Arches now
uses a different WRDTR and CLKTR default setting than Canyonlands/Glacier.
Signed-off-by: NStefan Roese <sr@denx.de>
      f3ed3c9b
    • D
      ppc4xx: Add GDsys CompactCenter board support. · ab4c62c1
      由 Dirk Eibach 提交于 
      Board support for the Guntermann & Drunck CompactCenter and
DevCon-Center.
Based on the AMCC Canyonlands board support by Stefan Roese.
Signed-off-by: NDirk Eibach <eibach@gdsys.de>
Signed-off-by: NStefan Roese <sr@denx.de>
      ab4c62c1
    • R
      mpc83xx: Add esd VME8349 board support · c2e49f70
      由 Reinhard Arlt 提交于 
      This patch adds support for the esd VME8349 board equipped with the
MPC8349. It's a VME PMC carrier board equipped with the Tundra
TSI148 VME-bridge.
Signed-off-by: NReinhard Arlt <reinhard.arlt@esd-electronics.com>
Signed-off-by: NStefan Roese <sr@denx.de>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
      c2e49f70
    • P
      sbc8349: combine HRCW flash and u-boot image flash · fe613cdd
      由 Paul Gortmaker 提交于 
      Up to this point in time, the sbc8349 board was storing the u-boot
image in flash 2x.  One for the HRCW value at the beginning of
flash (0xff80_0000), and once close to the end of flash (0xfff8_0000)
for the actual image that got executed.

This moves the TEXT_BASE to be the beginning of flash, which makes
the second copy of the image redundant, and frees up the flash
from the end of the environment storage to the end of the flash
device itself.
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
      fe613cdd
  15. 27 7月, 2009 6 次提交