Currently, the UniPhier pinctrl driver itself is a syscon, but it
turned out much more reasonable to make it a child node of a syscon
because our syscon node consists of a bunch of system configuration
registers, not only pinctrl, but also phy, and misc registers.
It is difficult to split the node.  This commit allows to migrate to
the new DT structure.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Make function/array names match the file names for consistency.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The core part of the UniPhier pinctrl driver needs to support a new
capability for upcoming UniPhier ARMv8 SoCs.  This sometimes happens
because pinctrl drivers include really SoC-specific stuff.

This commit intends to tidy up SoC-specific parameters of the existing
drivers before adding new ones.  Having flags would be better than
adding new members every time a new SoC-specific capability comes up.

At this time, there is one flag, UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE.
This capability (I'd say rather quirk) was added for PH1-Pro4 and
PH1-Pro5 as requirement from our customer.  For those SoCs, one pin-mux
setting is controlled by the combination of two separate registers; the
LSB bits at register offset (8 * N) and the MSB bits at (8 * N + 4).
Because it is impossible to update two separate registers atomically,
the LOAD_PINCTRL register should be set in order to make the pin-mux
settings really effective.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The current CONFIG names like "CONFIG_ARCH_UNIPHIER_PH1_PRO4" is too
long.  It would not hurt to drop "PH1_" because "UNIPHIER_" already
well specifies the SoC family.  Also, rename files for consistency.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Add pin configuration and pinmux support for UniPhier PH1-Pro4 SoC.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>