- 26 2月, 2015 3 次提交
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由 gaurav rana 提交于
Currently only normal hashing is supported using hardware acceleration. Added support for progressive hashing using hardware. Signed-off-by: NRuchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: NGaurav Rana <gaurav.rana@freescale.com> CC: Simon Glass <sjg@chromium.org> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 gaurav rana 提交于
This patch does the following: 1. The function names for encapsulation and decapsulation were inconsitent in freescale's implementation and cmd_blob file. This patch corrects the issues. 2. The function protopye is also modified to change the length parameter from u8 to u32 to allow encapsulation and decapsulation of larger images. 3. Modified the description of km paramter in the command usage for better readability. Signed-off-by: NGaurav Rana <gaurav.rana@freescale.com> Reviewed-by: NRuchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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- 25 2月, 2015 37 次提交
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由 Fabio Estevam 提交于
Boards need to select CONFIG_SYS_GENERIC_BOARD in order to prevent removal from the project. Cc: Matthias Weisser <weisserm@arcor.de> Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
Boards need to select CONFIG_SYS_GENERIC_BOARD in order to prevent removal from the project. Acked-by: NAnatolij Gustschin <agust@denx.de> Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
Boards need to select CONFIG_SYS_GENERIC_BOARD in order to prevent removal from the project. Acked-by: NAnatolij Gustschin <agust@denx.de> Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Masahiro Yamada 提交于
This is still a non-generic board. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: NSughosh Ganu <urwithsughosh@gmail.com> Cc: Syed Mohammed Khasim <sm.khasim@gmail.com> Acked-by: NMarek Vasut <marex@denx.de>
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由 Masahiro Yamada 提交于
This is still a non-generic board. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Cc: Chan-Taek Park <c-park@ti.com> Acked-by: NMarek Vasut <marex@denx.de>
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由 Masahiro Yamada 提交于
This is still a non-generic board. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Cc: Po-Yu Chuang <ratbert@faraday-tech.com> Acked-by: NMarek Vasut <marex@denx.de>
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由 Masahiro Yamada 提交于
These are still non-generic boards. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Cc: Greg Ungerer <greg.ungerer@opengear.com> Acked-by: NMarek Vasut <marex@denx.de>
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由 Masahiro Yamada 提交于
This is still a non-generic board. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Cc: Lei Wen <leiwen@marvell.com> Acked-by: NMarek Vasut <marex@denx.de>
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由 Masahiro Yamada 提交于
This is still a non-generic board. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Cc: Matthias Weisser <weisserm@arcor.de> Acked-by: NMarek Vasut <marex@denx.de>
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由 Masahiro Yamada 提交于
Now CONFIG_SPL_BUILD is not defined in Kconfig, so "!depends on SPL_BUILD" and "if !SPL_BUILD" are redundant. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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由 Masahiro Yamada 提交于
When Kconfig for U-boot was examined, one of the biggest issues was how to support multiple images (Normal, SPL, TPL). There were actually two options, "single .config" and "multiple .config". After some discussions and thought experiments, I chose the latter, i.e. to create ".config", "spl/.config", "tpl/.config" for Normal, SPL, TPL, respectively. It is true that the "multiple .config" strategy provided us the maximum flexibility and helped to avoid duplicating CONFIGs among Normal, SPL, TPL, but I have noticed some fatal problems: [1] It is impossible to share CONFIG options across the images. If you change the configuration of Main image, you often have to adjust some SPL configurations correspondingly. Currently, we cannot handle the dependencies between them. It means one of the biggest advantages of Kconfig is lost. [2] It is too painful to change both ".config" and "spl/.config". Sunxi guys started to work around this problem by creating a new configuration target. Commit cbdd9a97 (sunxi: kconfig: Add %_felconfig rule to enable FEL build of sunxi platforms.) added "make *_felconfig" to enable CONFIG_SPL_FEL on both images. Changing the configuration of multiple images in one command is a generic demand. The current implementation cannot propose any good solution about this. [3] Kconfig files are getting ugly and difficult to understand. Commit b724bd7d (dm: Kconfig: Move CONFIG_SYS_MALLOC_F_LEN to Kconfig) has sprinkled "if !SPL_BUILD" over the Kconfig files. [4] The build system got more complicated than it should be. To adjust Linux-originated Kconfig to U-Boot, the helper script "scripts/multiconfig.sh" was introduced. Writing a complicated text processor is a shell script sometimes caused problems. Now I believe the "single .config" will serve us better. With it, all the problems above would go away. Instead, we will have to add some CONFIG_SPL_* (and CONFIG_TPL_*) options such as CONFIG_SPL_DM, but we will not have much. Anyway, this is what we do now in scripts/Makefile.spl. I admit my mistake with my apology and this commit switches to the single .config configuration. It is not so difficult to do that: - Remove unnecessary processings from scripts/multiconfig.sh This file will remain for a while to support the current defconfig format. It will be removed after more cleanups are done. - Adjust some makefiles and Kconfigs - Add some entries to include/config_uncmd_spl.h and the new file scripts/Makefile.uncmd_spl. Some CONFIG options that are not supported on SPL must be disabled because one .config is shared between SPL and U-Boot proper going forward. I know this is not a beautiful solution and I think we can do better, but let's see how much we will have to describe them. - update doc/README.kconfig More cleaning up patches will follow this. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
At present defaults in arch-specific Kconfig files are ignored if the top-level item comes ahead of it in include order. This means that it is not possible to have a U-Boot default that architectures and boards can override. This does not seem very useful. Move the include earlier to support this. Signed-off-by: NSimon Glass <sjg@chromium.org> Reported-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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由 Masahiro Yamada 提交于
It is true that malloc is necessary for Driver Model before relocation, but there is no good reason to reserve the malloc space more than enough. The default value 0x400 works well. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Enric Balletbo i Serra 提交于
Commit referenced in subject breaks IGEP0032 build with the following error: drivers/misc/status_led.c:30:7: error: 'RED_LED_GPIO' undeclared here (not in a function) scripts/Makefile.build:275: recipe for target 'drivers/misc/status_led.o' failed make[2]: *** [drivers/misc/status_led.o] Error 1 scripts/Makefile.build:420: recipe for target 'drivers/misc' failed make[1]: *** [drivers/misc] Error 2 Makefile:1093: recipe for target 'drivers' failed make: *** [drivers] Error 2 Fix this by skipping the status led on IGEP0032 machine as is not available and throw an error for future machines if the status led is not configured to avoid build breakage. Reported-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: NEnric Balletbo i Serra <enric.balletbo@collabora.com>
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由 Volodymyr Riazantsev 提交于
Add support of the DDR mode for eSDHC driver. Enable it for i.MX6 SoC family only. Signed-off-by: NVolodymyr Riazantsev <volodymyr.riazantsev@globallogic.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Alison Wang 提交于
There 4 JRs, 4 RTICs and 8 DECOs, and set them the same stream id for using the same SMMU3 on LS1021A. Signed-off-by: NXiubo Li <Li.Xiubo@freescale.com> Signed-off-by: NAlison Wang <alison.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 chenhui zhao 提交于
The RCPM FSM may not be reset after power-on, for example, in the cases of cold boot and wakeup from deep sleep. It causes cache coherency problem and may block deep sleep. Therefore, reset them if they are not be reset. Signed-off-by: NChenhui Zhao <chenhui.zhao@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Minghuan Lian 提交于
The patch adds Freescale Layerscape PCIe driver and provides up to 4 controllers support. Signed-off-by: NMinghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Minghuan Lian 提交于
The patch enables and adds PCIe settings for boards LS1021AQDS and LS1021ATWR. Signed-off-by: NMinghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Minghuan Lian 提交于
Signed-off-by: NMinghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Minghuan Lian 提交于
LS1021A's PCIe1 region begins 0x40_00000000; PCIe2 begins 0x48_00000000. In order to access PCIe device, we must create TLB to map the 40bit physical address to 32bit virtual address. This patch will enable MMU after DDR is available and creates MMU table in DRAM to map all 4G space; then, re-use the reserved space to map PCIe region. The following the mapping layout. VA mapping: ------- <---- 0GB | | | | |-------| <---- 0x24000000 |///////| ===> 192MB VA map for PCIe1 with offset 0x40_0000_0000 |-------| <---- 0x300000000 | | |-------| <---- 0x34000000 |///////| ===> 192MB VA map for PCIe2 with offset 0x48_0000_0000 |-------| <---- 0x40000000 | | |-------| <---- 0x80000000 DDR0 space start |\\\\\\\| |\\\\\\\| ===> 2GB VA map for 2GB DDR0 Memory space |\\\\\\\| ------- <---- 4GB DDR0 space end Signed-off-by: NMinghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Alison Wang 提交于
This patch is to define default values for some CCSR macros to make header files cleaner. Signed-off-by: NAlison Wang <alison.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 J. German Rivera 提交于
Upgrade Manage Complex (MC) flib API to 0.5.2. Rename directory fsl_mc to fsl-mc. Change the fsl-mc node in Linux device tree from "fsl,dprcr" to "fsl-mc". Print MC version info when appropriate. Signed-off-by: NJ. German Rivera <German.Rivera@freescale.com> Signed-off-by: NLijun Pan <Lijun.Pan@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
Enable sync of DDR refresh for LS2085a platform. GPP DDR controllers stay in sync. DP-DDR has only one controller so it does no harm. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
Erratum A008514 appleis to ls2085a. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
Erratum A008336 applied to LS2085A. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 Bhupesh Sharma 提交于
This patch enusres that right banners are printed for LS2085A emulator and simulator platforms. Signed-off-by: NBhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Stuart Yoder 提交于
Move the load address of the kernel image to get it away from the region of the uncompressed kernel. Signed-off-by: NStuart Yoder <stuart.yoder@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Arnab Basu 提交于
Since Linux v3.16-rc1 earlyprintk has been removed for arm64. Switch to using earlycon. Signed-off-by: NArnab Basu <arnab.basu@freescale.com> Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
Add sync of refresh for multiple DDR controllers. DDRC initialization needs to complete first. Code is re-ordered to keep refresh close. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
Set system clock to 100MHz and DDR clock to 133MHz. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 Kuldip Giroh 提交于
LS NADK memory manager by default works on HugeTLB. Hence bootargs must include parameters default_hugepagesz (default hugepagesize, hugepagesz (hugepage size) and hugepages (number of hugepages to be reserved in kernel for the given size). Signed-off-by: NKuldip Giroh <kuldip.giroh@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
wwt_bg should match rrt_bg. It was a typo in driver. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
DP-DDR benefits from auto precharge because of its specific application. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
Controller number is passed for function calls to support individual DDR clock, depending on SoC implementation. It is backward compatible with exising platforms. Multiple clocks have been verifyed on LS2085A emulator. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
FSL-LSCH3 platforms can have multiple DDR clocks. LS2085A has one clock for general DDR controlers, and another clock for DP-DDR. DDR driver needs to change to support multiple clocks. Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 York Sun 提交于
Erratum A008514 workround requires writing register eddrtqcr1 with value 0x63b20002. Signed-off-by: NYork Sun <yorksun@freescale.com>
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