- 18 6月, 2018 1 次提交
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由 Lukasz Majewski 提交于
When BOOT_FROM = FACTORY, then the LEG's factory setup is performed. This code relies on boot_nfs u-boot command, so it shall be adjusted appropriately (e.g. provide proper fitImage file). Signed-off-by: NLukasz Majewski <lukma@denx.de>
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- 16 6月, 2018 1 次提交
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- 15 6月, 2018 21 次提交
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git://git.denx.de/u-boot-arc由 Tom Rini 提交于
Here we just add a tool for HSDK flashable images preparation together with extensive documentation for HSDK board. This will help real-life users to update U-Boot on the board.
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git://git.denx.de/u-boot-microblaze由 Tom Rini 提交于
Xilinx fixes for v2018.07-rc2 Zynq: - Fix missing watchdog header - DT fixes ZynqMP: - emmc configuration split - Enable SPD - Fix PMUFW_INIT_FILE logic - Coverity fixes in SoC code timer - Add timer_get_boot_us mmc: - Fix MMC HS200 tuning command serial: - Fix scrabled chars with OF_LIVE
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由 Alexey Brodkin 提交于
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Eugeniy Paltsev 提交于
HSDK board has preloader that reads SPI flash pages and searches for a special image header to fetch and load binary. Add tool, make target (bsp-generate) to generate update script and u-boot binary image with header for preloader. Also add script to default environment to apply updates. Signed-off-by: NEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Michal Simek 提交于
This function is used only inside this driver that's why should be static. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Michal Simek 提交于
This issue was found when OF_LIVE was enabled that there are scrambled chars on the console like this: Chip ID: zu3eg Watchdog: Started��j� sdhci@ff160000: 0, sdhci@ff170000: 1 In: serial@ff010000 I found a solution for this problem exactly the same as I found later in serial_msm fixed by: "serial: serial_msm: initialize uart only before relocation" (sha1: 7e5ad796) What it is happening is that output TX fifo still contains chars to be sent and _uart_zynq_serial_init() resets TX fifo even in the middle of transfer. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Michal Simek 提交于
Change logic and put char to fifo till there is a space in output fifo. Origin logic was that output fifo needs to be empty. It means only one char was in output queue. Also remove unused ZYNQ_UART_SR_TXEMPTY macro. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Michal Simek 提交于
Coding style is checking to use BIT macros instead of shifts. The patch is also fixing the rest of macros which should be BITs instead of hex numbers. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Michal Simek 提交于
Use u32 instead of int for max_bank, bank_min and bank_max. These values can't be negative that's why no reason to use signed type. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
There should be return value check from zynqmp_mmio_read() in zynqmp_mmio_rawwrite() to make sure that errors are propagated properly. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
calloc() can fail and return NULL. The patch is checking return value and return in case of error. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Code around tuning_loop_counter variable expects to go below zero. That's why this variable can't use unsigned type. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
There is no reason to check that unsigned type that is >= 0. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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This patch fixes the mmc tuning command failures when tuning pattern data needs to read back for comparision against the expected bit pattern. Reported-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Tested-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Luca Ceresoli 提交于
The value of PMUFW_INIT_FILE is prefixed with "$(srctree)/", thus forcing it to be a relative path inside the U-Boot source tree. Since the PMUFW is a binary file generated outside of U-Boot, the PMUFW binary must be copied inside the U-Boot source tree before the build. This generates a few problems: * if the source tree is shared among different out-of-tree builds, they will pollute (and potentially corrupt) each other * the source tree cannot be read-only * any buildsystem must add a command to copy the PMUFW binary * putting an externally-generated binary in the source tree is ugly as hell Avoid these problems by accepting an absolute path for PMUFW_INIT_FILE. This would be as simple as removing the "$(srctree)/" prefix, but in order to keep backward compatibility we rather use the shell and readlink to get the absolute path even when starting from a relative path. Since 'readlink -f' produces an empty string if the file does not exist, we also add a check to ensure the file configured in PMUFW_INIT_FILE exists. Otherwise the build would exit successfully, but produce a boot.bin without PMUFW as if PMUFW_INIT_FILE were empty. Tested in the 12 possible combinations of: - PMUFW_INIT_FILE empty, relative, absolute, non-existing - building in-tree, in subdir, in other directory Signed-off-by: NLuca Ceresoli <luca@lucaceresoli.net> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Simon Glass <sjg@chromium.org> Cc: Emmanuel Vadot <manu@bidouilliste.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
zcu102 contains DIMM with SPD on it at 0x51 address. For example: i2c dev 13 i2c sdram 51 Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
This function is required for adding bootstage support. Also enable it directly for ZynqMP R5 configuration. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
dtc is showing some warnings and this change was also done in the Linux kernel as "Input: gpio-keys - clean up device tree binding example" with this fragment in commit message "Drop #address-cells and #size-cells, which are not required by the gpio-keys binding documentation, as button sub-nodes are not devices." Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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This patch splits the current mini emmc configuration into emmc0 and emmc1 configurations because emmc is probed at boot time and on systems which have only one interface mini configuration is failing on unused interface. This patch also adds required clock node in dts and enables CONFIG_MMC_SDHCI_ZYNQ through defconfig. Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Add missing header detected by sparse. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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git://github.com/agraf/u-boot由 Tom Rini 提交于
Patch queue for efi - 2018-06-14 A few minor fixes for the release: - Compile fixes - HI20 relocations for RISC-V - Fix bootefi without load path - Fix Runtime Services with certain compilers
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- 14 6月, 2018 17 次提交
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由 Vasily Khoruzhick 提交于
struct sunxi_ccm_reg doesn't have ahb_reset0_cfg on sun4i and sun5i, thus compilation fails with: drivers/usb/host/ohci-sunxi.c:96:26: error: 'struct sunxi_ccm_reg' has no member named 'ahb_reset0_cfg' Access this reg using its offset to fix this issue. Fixes commit 1ed9c111 ("usb: sunxi: ehci: get rid of ifdefs") and commit 56830cee ("usb: sunxi: ohci: get rid of ifdefs") Signed-off-by: NVasily Khoruzhick <anarsoul@gmail.com>
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由 Alexander Graf 提交于
When we boot using memdp (bootefi on an address without previous load that populates the device path) then the memory device path we pass in is not backed by any handle. That can result in weird effects. For example grub gets very grumpy about this inside the efi_net module and just loops endlessly. So let's expose a simple handle that the memory device path is backed on. That way any code that looks for the device the dp is on, finds one. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Heinrich Schuchardt 提交于
When U-Boot is built with 'make -j' there is not guarantee that targets in directory arch/ are built before targets in directory lib/. The current build instruction for EFI binaries in lib/ rely on dependencies in arch/. If $(EFI_CRT0) or $(EFI_RELOC) is not yet built before trying to build %.efi an error *** No rule to make target '%.efi' occurs. With the patch separate copies of $(EFI_CRT0) and $(EFI_RELOC) named efi_crt0.o and efi_reloc.o are built in lib/efi_loader and lib/efi_selftest. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Heinrich Schuchardt 提交于
When building with -pedantic the current definition of EFI_GUID() causes an error 'initializer element is not constant'. Currently EFI_GUID() is used both as an anonymous constant and as an intializer. A conversion to efi_guid_t is not allowable when using EFI_GUID() as an initializer. But it is needed when using it as an anonymous constant. We should not use EFI_GUID() for anything but an initializer. So let's introduce a variable where needed and remove the conversion. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Simon Glass 提交于
These constants are defined in arch-specific code but redefined here. Add a TODO to clean this up. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
We currently handle the UEFI runtime reset / power off case handling via a switch statement. Compilers (gcc in my case) may opt to handle these via jump tables which they may conveniently put into .rodata which is not part of the runtime section, so it will be unreachable when executed. Fix this by just converting the switch statement into an if/else statement. It produces smaller code that is faster and also correct because we no longer refer .rodata from efi runtime code. Reported-by: NAndreas Färber <aferber@suse.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
The PE standard allows for HI20/LOW12 relocations. Within the efi_loader target we always know that our relocation target is 4k aligned, so we don't need to worry about the LOW12 part. This patch adds support for the respective relocations. With this and a few grub patches I have cooking in parallel I'm able to run grub on RISC-V. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Michal Simek 提交于
Functions can return NULL in case of error that's why checking return value is needed. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Michal Simek 提交于
In case of phyread()/phy_setup_op() timeout code is working with uninitialized phyreg variable. Initialize this variable to make sure that code it not working with random value. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Michal Simek 提交于
wait_for_bit_le32 returns negative value on failure. Fix phy...() to handle these failures properly. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Chris Packham 提交于
Combine repeated code from smi_reg_read/smi_reg_write into a common function smi_wait_ready. Reviewed-by: NStefan Roese <sr@denx.de> Signed-off-by: NChris Packham <judge.packham@gmail.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Quentin Schulz 提交于
On the SPEAr600 SoC, which has the dwmac1000 variant of the IP block, the DMA reset never succeeds when a MII PHY is used (no problem with a GMII PHY). The designware_eth_init() function sets the DMAMAC_SRST bit in the DMA_BUS_MODE register, and then polls until this bit clears. When a MII PHY is used, with the current driver, this bit never clears and the driver therefore doesn't work. The reason is that the PS bit of the GMAC_CONTROL register should be correctly configured for the DMA reset to work. When the PS bit is 0, it tells the MAC we have a GMII PHY, when the PS bit is 1, it tells the MAC we have a MII PHY. Doing a DMA reset clears all registers, so the PS bit is cleared as well. This makes the DMA reset work fine with a GMII PHY. However, with MII PHY, the PS bit should be set. We have identified this issue thanks to two SPEAr600 platform: - One equipped with a GMII PHY, with which the existing driver was working fine. - One equipped with a MII PHY, where the current driver fails because the DMA reset times out. Note: Taken from https://www.spinics.net/lists/netdev/msg432578.htmlSigned-off-by: NQuentin Schulz <quentin.schulz@bootlin.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Chris Packham 提交于
When connecting to from a CPU direct to a 88e6097 typically RGMII is used. In order for traffic to actually pass we need to force the link up so the CPU MAC on the other end will see the link. Signed-off-by: NChris Packham <judge.packham@gmail.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Jon Nettleton 提交于
This makes sure the DMA buffers are properly aligned for the hardware. Reviewed-by: NStefan Roese <sr@denx.de> Signed-off-by: NJon Nettleton <jon@solid-run.com> Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Kunihiko Hayashi 提交于
Add driver for Socionext AVE ethernet controller that includes MAC and MDIO bus supporting RGMII/RMII modes. The driver behaves the ethernet driver model (DM_ETH) with devicetree. Signed-off-by: NKunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Kunihiko Hayashi 提交于
Add the new mode to indicate a built-in PHY. This will be used by UniPhier AVE ethernet driver. Signed-off-by: NKunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by: NMarek Vasut <marek.vasut@gmail.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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