- 20 6月, 2019 14 次提交
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由 Bin Meng 提交于
Update all git repo links with the new gitlab ones. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Acked-by: NWolfgang Denk <wd@denx.de>
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由 Marek Vasut 提交于
Add myself as an SH maintainer. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Tom Rini <trini@konsulko.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx由 Tom Rini 提交于
- PCIe driver change to support DM model - T2080QDS migrated to use PCIe DM model
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https://gitlab.denx.de/u-boot/custodians/u-boot-stm由 Tom Rini 提交于
- Update STM32MP entry in MAINTAINERS - Handle correctly binding for g-tx-fifo-size for USB DWC2 driver - Fix trusted STM32MP1 defconfig with correct ethernet driver
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由 Hou Zhiqiang 提交于
Enable the DM PCIe driver in T2080QDS defconfig. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Hou Zhiqiang 提交于
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Hou Zhiqiang 提交于
Add PCIe DM driver for Freescale PowerPC PCIe controllers. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Hou Zhiqiang 提交于
T2080 integrated 4 PCIe controllers, which is compatible with the PCI Express™ Base Specification, Revision 3.0, and this patch is to add DT node for each PCIe controller. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Hou Zhiqiang 提交于
Compile the legacy PCIe initialization reoutines only when DM_PCI is not enabled. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Hou Zhiqiang 提交于
Compile the routines of mpc85xx/pci.c when both FSL_PCI_INIT and DM_PCI are not enabled. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Hou Zhiqiang 提交于
Use the Kconfig option to select the PCIe reset errata. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Hou Zhiqiang 提交于
Use the Kconfig option to select the PCIe ASPM errata. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq由 Tom Rini 提交于
- LS1046AFRWY support - USB errata fix and secure boot defconfig support for LS1028A - Enabled SDHC and SATA for LX2160 - LS1046A serdes fixes - other minor fixes
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- 19 6月, 2019 26 次提交
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由 Patrick Delaunay 提交于
Allow device mode in DWC2 driver when device tree select the dr_mode "peripheral" or "otg". The device mode is not allowed when dr_mode = "host" in device tree. Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com> Reviewed-by: NMarek Vasut <marex@denx.de>
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由 Patrick Delaunay 提交于
Remove the override for usbotg_hs on g-tx-fifo-size as the correct binding, used in the kernel device tree, is now supported in dwc2 device driver. Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
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由 Patrick Delaunay 提交于
Manage g-tx-fifo-size as a array as specify in the binding. Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com> Reviewed-by: NMarek Vasut <marex@denx.de>
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由 Udit Agarwal 提交于
Uboot prompt must not be available while running secure boot. TO ensure this bootdelay must be set to -2. Signed-off-by: NUdit Agarwal <udit.agarwal@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Vabhav Sharma 提交于
LS1046AFRWY board supports LS1046A family SoCs. This patch add base support for this board. Board support's 4GB ddr memory, i2c, micro-click module,microSD card, serial console,qspi nor flash,ifc nand flash,qsgmii network interface, usb 3.0 and serdes interface to support two x1gen3 pcie interface. Signed-off-by: NCamelia Groza <camelia.groza@nxp.com> Signed-off-by: NMadalin Bucur <madalin.bucur@nxp.com> Signed-off-by: NPankit Garg <pankit.garg@nxp.com> Signed-off-by: NPramod Kumar <pramod.kumar_1@nxp.com> Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: NVabhav Sharma <vabhav.sharma@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Wasim Khan 提交于
During SD boot, MC firmware and DPC are copied from SD card to DDR. Size reserved between MC and DPC firmware on DDR is 1MB. If the size of MC firmware(load address 0x80000000) is more than 1 MB then part of MC firmware will be overwritten by DPC firmware (load address 0x80100000). Fix: Update the MC/DPL/DPC firmware's DDR address as per their respective addresses in SD card. Signed-off-by: NWasim Khan <wasim.khan@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Wasim Khan 提交于
During SD boot, MC firmware and DPC are copied from SD card to DDR. Size reserved between MC and DPC firmware on DDR is 1MB. If the size of MC firmware(load address 0x80000000) is more than 1 MB then part of MC firmware will be overwritten by DPC firmware (load address 0x80100000). Fix: Update the MC/DPL/DPC firmware's DDR address as per their respective addresses in SD card. Signed-off-by: NWasim Khan <wasim.khan@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Wasim Khan 提交于
Add bootcmd for IFC NOR boot and SD boot. Signed-off-by: NWasim Khan <wasim.khan@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Alex Marginean 提交于
LS1028A includes an integrated PCI bus with 11 PCI functions residing on bus 0. ECAM plus the device register space takes up 256MB of address space. Signed-off-by: NAlex Marginean <alexm.osslist@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Yinbo Zhu 提交于
Layerscape began to use two eSDHC controllers, for example, LS1012A. They are same IP block with same reference clock. This patch is to add clock support for the second eSDHC. Signed-off-by: NYinbo Zhu <yinbo.zhu@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Maciej Pijanowski 提交于
With this setting enabled, the on-board QSPI cannot be properly flashed. There are no error messages, but the simple write / read / compare tests fail. This is already disabled in the qspi and tfa defconfigs for the LS1046ARDB platform. Signed-off-by: NMaciej Pijanowski <maciej.pijanowski@3mdeb.com> Cc: piotr.krol@3mdeb.com Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Maciej Pijanowski 提交于
Signed-off-by: NMaciej Pijanowski <maciej.pijanowski@3mdeb.com> Cc: piotr.krol@3mdeb.com Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Maciej Pijanowski 提交于
As per LS1046A hardware manual, SGMII.9 and SGMII.10 present on lane D and lane C respectively for 0x3363 protocol. So fix serdes1 settings for ls1046a. Signed-off-by: NMaciej Pijanowski <maciej.pijanowski@3mdeb.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Ashish Kumar 提交于
Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Alex Marginean 提交于
Fixes a link error on layerscape platform, linking fails with CONFIG_PCI set and CONFIG_PCI_LAYERSCAPE unset. Signed-off-by: NAlex Marginean <alexm.osslist@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Pankit Garg 提交于
Change bootcmd update logic when CONFIG_ENV_ADDR is not defined Signed-off-by: NPankit Garg <pankit.garg@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Pankit Garg 提交于
Signed-off-by: NPankit Garg <pankit.garg@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Pankit Garg 提交于
Update qspi clock configuration in TFABOOT in case of all boot sources except qspi boot source. Signed-off-by: NPankit Garg <pankit.garg@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Peng Ma 提交于
This patch is to fixed the reg read to "0" for armv7 architecture. Signed-off-by: NPeng Ma <peng.ma@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Meenakshi Aggarwal 提交于
Flushing L3 cache may need variable time depending upon cache line allocation. Coming up with a proper timeout value would be best handled by simulations under multiple scenarios in your actual system. >From the purely HN-F point of view, the flush would take ~15 cycles for a clean line, and ~22 cycles for a dirty line. For the dirty line case, there are many variables outside the HN-F that will increase the duration per line. For example, a *DBIDResp from the SN-F/SBSX, memory controller latency, SN-F/SBSX RetryAck responses, CCN ring congestion, CCN ring hops, etc, etc. The worst-case timeout would have to factor in all of these variables plus the HN-F cycles for every line in the L3, and assuming all lines are dirty In case if L3 is not flushed properly, system behaviour will be erratic, so remove timeout and add loop to check status of L3 cache. System will stuck in while loop if there is some issue in L3 cache flushing. Signed-off-by: NUdit Kumar <udit.kumar@nxp.com> Signed-off-by: NMeenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Yinbo Zhu 提交于
This patch is to enable esdhc controllers for lx2160aqds Signed-off-by: NYinbo Zhu <yinbo.zhu@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Yuantian Tang 提交于
Add secure boot defconfig for ls1028aqds and ls1028ardb boards. Signed-off-by: NYuantian Tang <andy.tang@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Mian Yousaf Kaukab 提交于
Default environment variable is more complete. Also scans for efi binaries for example. Signed-off-by: NMian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Mian Yousaf Kaukab 提交于
fsl-mc lazyapply command applies dpl from efi_exit_boot_services(). Status of fsl-mc node in working fdt is updated at this stage. However, an efi application like grub may already have copied the fdt. So the updates to fdt done at efi_exit_boot_services() may not be visible to the OS. Fix it by updating fdt earlier if fsl-mc lazyapply command is used. Signed-off-by: NMian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Peng Ma 提交于
Move the ecc addr from driver to dts Signed-off-by: NPeng Ma <peng.ma@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Yangbo Lu 提交于
u-boot is trying to make CONFIG_BLK as a hard requirement for DM_MMC. But now it's still not. config BLK bool "Support block devices" depends on DM default y if DM_MMC When fsl_esdhc driver was reworked for DM_MMC support, DM_MMC without CONFIG_BLK enabled wasn't considered. This patch is to fix probe issue without CONFIG_BLK enabled. Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com> Signed-off-by: NYinbo Zhu <yinbo.zhu@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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