Change the axp_gpio_foo function prototypes to match the gpio uclass op
prototypes, this is a preparation patch for moving the axp gpio code to
a separate driver-model gpio driver.

Note that the ugly calls with a NULL udev pointer in drivers/gpio/sunxi_gpio.c
this adds are removed in a later patch.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

When doing a driver-model enabled build we still need sunxi_name_to_gpio_bank
(for now) for the mmc pinmux code in board/sunxi/board.c, so build it for
driver-model enabled builds too.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

We want to use driver-model/fdt with other model SoCs too, so add
compatible strings for the other SoCs to the dm sunxi gpio code.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Until sunxi moves to device tree (e.g. for USB) we need to convert named
GPIOs to numbers. Add a function to do this.

This fixes the USB / EHCI support not working on the LinkSprite pcDuino3
(which uses devicemodel).
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

By convention, sunxi GPIOs are named PA1, PA2 instead of A1, A2. Change
the driver model GPIO driver for sunxi to use these names.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

i2c_init_board() gets called before the driver-model (gpio) code is
initialized, so move the setup of the soft-i2c pins out of i2c_init_board()
and into board_init(), at which time the driver-model setup has been done.

Also add proper error checking and properly request the gpios as that is
mandatory with the driver-model.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

The driver-model gpio functions may return another value then -1 as error,
make the sunxi display code properly handle this.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

The driver-model gpio functions may return another value then -1 as error,
make the sunxi usbc properly handle this.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

The driver-model gpio functions may return another value then -1 as error,
make the sunxi mmc code properly handle this.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

This fixes the following errors being printed during boot:

Error, wrong i2c adapter 0 max 0 possible
Error, wrong i2c adapter 0 max 0 possible
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Add a defconfig for generic 7" tablets using the Ippo q8h v1.2 pcb,
with an A33 SoC (the pcb can take an A23 or an A33), and a 1024x600 LCD.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

The Astar MID756 is a 7" tablet using the A33 SoC with a 800x480 LCD screen,
512M RAM, 8G ROM and integrated sdio wifi.

Also see: http://linux-sunxi.org/Softwinner_astar-rdaSigned-off-by: NVishnu Patekar <vishnupatekar0510@gmail.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Enable full support for the A33 SoC including display, otg-usb, etc.
Signed-off-by: NVishnu Patekar <vishnupatekar0510@gmail.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Based on Allwinner dram init code from the a33 bsp:
https://github.com/allwinner-zh/bootloader/blob/master/basic_loader/bsp/bsp_for_a33/init_dram/mctl_hal.c

Initial u-boot port by Vishnu Patekar, major cleanup / rewrite by
Hans de Goede.
Signed-off-by: NVishnu Patekar <vishnupatekar0510@gmail.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Add support for the new second DRAM PLL found on the A33 SoC.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

This is a preparation patch for adding A33 support, which will have a
mach name of sun8i-a33.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i
have a various things in common, like having separate ahb reset control
registers, the SID living inside the pmic, custom pmic busses, new style
watchdog, etc.

This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be
used to check for these features avoiding the need for an ever growing list
of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more
"new style" sunxi SoCs.

Note that this commit changes the behavior of the gmac and hdmi code for
sun8i and the upcoming sun9i devices. This does not matter as sun8i does
not have gmac nor hdmi, and sun9i has new hardware-blocks for these so
the old code will not work there.

Also this is intentional as if a sun8i / sun9i variant which does use the
old hwblocks shows up then the GEN_SUN6I code paths will be the right ones
to use.

For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

We do not use irqs in u-boot so remove the unused irq field, and all the
 #ifdef-ery around the irq initialization.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

There is no reason not to and this make the #ifdef-ery easier to read.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

This is already invoked a few cycles later in monitor mode by
_secure_monitor (_sunxi_cpu_entry calls _do_nonsec_entry which triggers
_secure_monitor via smc #0). Drop it here, it serves no purpose.

CC: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NThierry Reding <treding@nvidia.com>
Tested-by: NThierry Reding <treding@nvidia.com>
Tested-by: NIan Campbell <ijc@hellion.org.uk>
Tested-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Move arch/arm/include/asm/arch-zynq/*
  -> arch/arm/mach-zynq/include/mach/*
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Move arch/arm/cpu/armv7/zynq/* -> arch/arm/mach-zynq/*
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

The comment line in arch/arm/cpu/armv7/zynq/config.mk says that
the option "-mfpu=neon" is necessary for compiling lowlevel_init.S.
We do not have to give it to all the source files.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Enable SDHCI0 for zynqmp.
Add empty gpio.h because of sdhci requirement.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Provide an option to write filesystem independend commands.
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Added the SPI driver support for ZynqMP
The controller is same as zynq SPI controller
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

Enable the i2c driver for ZynqMP
Also enable the eeprom for read and writes
to eeprom on ZynqMP
ZynqMP uses the same i2c controller as in Zynq
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add support for EMMC bootmode.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add support for Veloce - zynqmp emulation platform.
Platform doesn't support SDHCI.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Fix wrong timer calculation in get_timer_masked incase of
overflow.
This fixes the issue of getting wrong time from get_timer()
calls.
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Remove the quirk SDHCI_QUIRK_NO_CD as it is not
required.
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add support for loading sw for R5 with enabling for zynqmp.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>

Define the mmu table till 2MB granularity
enable dcaches for zynqmp.
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Disable all level shifters before enabling
the PS-to-PL level shifters as it would
be good to disable all level shifters before
enabling the PS-to-PL in order to ensure that
it is in proper state
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

We are about to change the location for ps7_init files, breaking the
current work-flows.  It is good time to drop the legacy ps7_init.c/h
support.

Going forward, please use ps7_init_gpl.c/h all the time.
If you are still using old Xilinx tools that are only able to
generate ps7_init.c/h, rename them into ps7_init_gpl.c/h.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: NSören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

The PicoZed is a System-on-Module board which is marketed as part of
the ZedBoard/MicroZed/etc. collection. It includes a Zynq-7000
processor.

This patch adds support that covers all the variants of the PicoZed
including the SKUs with Z7010/Z7020 and Z7015/Z7030 Zynq chips. This
patch set however only covers support for the System-on-Module and does
not cover any extra components that are available on carrier boards
(except those that are fanned out of the module itself).

More information on this board, its variants and available carrier
boards is available at: http://zedboard.org/product/picozedSigned-off-by: NNathan Rossi <nathan.rossi@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

On slow platforms not all baudrate setting is valid.
Check it directly in the driver and setup maximum possible
frequency.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>