1. 13 11月, 2013 2 次提交
    • M
      i2c: mxs_i2c: Squash endless loop · 12491355
      Marek Vasut 提交于
      The endless waiting for a bit to be set can cause a hang, add a timeout
      so we prevent such situation. A testcase for such a hang is below. The
      testcase assumes a device to be present at address 0x50 and a device to
      NOT be present at address 0x42 . Also note that the "sleep 1" induced
      delays are imperative for this bug to manifest .
      
      i2c read 0x42 0x0.2 0x10 0x42000000 ; sleep 1 ; \
      i2c read 0x50 0x0.2 0x10 0x42000000 ; sleep 1 ; \
      i2c read 0x42 0x0.2 0x10 0x42000000
      
      The expected result of the above command is:
      
      Error reading the chip.
      Error reading the chip.
      
      While without this patch, we observe a hang in the last read from 0x42
      precisely when waiting for this bit to be set.
      Signed-off-by: NMarek Vasut <marex@denx.de>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Heiko Schocher <hs@denx.de>
      Cc: Stefano Babic <sbabic@denx.de>
      12491355
    • N
      i2c: sh_i2c: Update to new CONFIG_SYS_I2C framework · 2035d77d
      Nobuhiro Iwamatsu 提交于
      This updates to new I2C framwwork on sh_i2c.
      And this also updates boards(kzm9g and ecovec) that using sh_i2c.
      Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
      Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
      2035d77d
  2. 12 11月, 2013 10 次提交
  3. 11 11月, 2013 3 次提交
    • D
      time: fix gcc warnings on MIPS64 · d770f396
      Daniel Schwierzeck 提交于
      Commit 8dfafdde introduced
      new gcc warnings on MIPS64:
      
      time.c: In function 'tick_to_time':
      time.c:59:2: warning: comparison of distinct pointer types lacks a cast [enabled by default]
      time.c:59:2: warning: passing argument 1 of '__div64_32' from incompatible pointer type [enabled by default]
      In file included from time.c:10:0:
      ./u-boot-mips/include/div64.h:22:17: note: expected 'uint64_t *' but argument is of type 'long long unsigned int *'
      time.c: In function 'usec_to_tick':
      time.c:76:2: warning: comparison of distinct pointer types lacks a cast [enabled by default]
      time.c:76:2: warning: passing argument 1 of '__div64_32' from incompatible pointer type [enabled by default]
      In file included from time.c:10:0:
      ./u-boot-mips/include/div64.h:22:17: note: expected 'uint64_t *' but argument is of type 'long long unsigned int *'
      Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
      d770f396
    • T
      Merge branch 'master' of git://git.denx.de/u-boot-mips · 60390d70
      Tom Rini 提交于
      60390d70
    • P
      malta: arch/mips/include/asm/malta.h SPDX license tag · a3e80904
      Paul Burton 提交于
      This patch replaces the GPL-2.0 text with a GPL-2.0
      SPDX-License-Identifier tag, and adds Imagination Technologies copyright
      following my recent changes.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      a3e80904
  4. 10 11月, 2013 20 次提交
    • A
      Merge branch 'iu-boot/master' into 'u-boot-arm/master' · 85b8c5c4
      Albert ARIBAUD 提交于
      Conflicts:
      	arch/arm/cpu/arm926ejs/mxs/Makefile
      	board/compulab/cm_t35/Makefile
      	board/corscience/tricorder/Makefile
      	board/ppcag/bg0900/Makefile
      	drivers/bootcount/Makefile
      	include/configs/omap4_common.h
      	include/configs/pdnb3.h
      
      Makefile conflicts are due to additions/removals of
      object files on the ARM branch vs KBuild introduction
      on the main branch. Resolution consists in adjusting
      the list of object files in the main branch version.
      This also applies to two files which are not listed
      as conflicting but had to be modified:
      
      	board/compulab/common/Makefile
      	board/udoo/Makefile
      
      include/configs/omap4_common.h conflicts are due to
      the OMAP4 conversion to ti_armv7_common.h on the ARM
      side, and CONFIG_SYS_HZ removal on the main side.
      Resolution is to convert as this icludes removal of
      CONFIG_SYS_HZ.
      
      include/configs/pdnb3.h is due to a removal on ARM side.
      Trivial resolution is to remove the file.
      
      Note: 'git show' will also list two files just because
      they are new:
      
      	include/configs/am335x_igep0033.h
      	include/configs/omap3_igep00x0.h
      85b8c5c4
    • G
      malta: define CONFIG_MEMSIZE_IN_BYTES · ab41305d
      Gabor Juhos 提交于
      The memsize environment variable must contain the
      memory size in bytes on the Malta board. Otherwise
      Linux will use wrong memory size which causes a kernel
      panic.
      
      Define CONFIG_MEMSIZE_IN_BYTES in malta.h to avoid
      that.
      Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
      Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
      Cc: Paul Burton <paul.burton@imgtec.com>
      ab41305d
    • P
      malta: add myself to maintainers · f577b42f
      Paul Burton 提交于
      This patch adds me as a maintainer of the malta(el) board(s). I have
      access to physical Malta boards and the desire for U-boot to run well on
      them.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      f577b42f
    • P
      malta: add script & instructions to flash U-boot · 024fba54
      Paul Burton 提交于
      This patch adds a script which may be used with MIPS Navigator Console
      and a MIPS Nagivator Probe in order to flash U-boot to a MIPS Malta
      development board.
      
      Please see the newly added doc/README.malta for usage instructions.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      024fba54
    • P
      malta: setup PIIX4 interrupt route · 81f98bbd
      Paul Burton 提交于
      Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will
      be left disabled. Linux does not set up this routing but relies upon it
      having been set up by the bootloader, reading back the IRQ lines which
      the PIRQ[A:D] signals have been routed to.
      
      This patch routes PIRQA & PIRQB to IRQ 10, and PIRQC & PIRQD to IRQ 11.
      This matches the setup used by YAMON.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      81f98bbd
    • P
      malta: store environment in flash · fba6f45c
      Paul Burton 提交于
      Allow the environment to be stored in the monitor flash of a Malta
      board. The environment is stored in the final 128KB of the flash, which
      both leaves the majority of the flash available for U-boot code and also
      matches the location which YAMON uses.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      fba6f45c
    • P
      malta: enable RTC support · 3ced12a0
      Paul Burton 提交于
      This is actually required in order for a Linux kernel to boot
      successfully on a physical Malta board. Without enabling the RTC, a
      Malta Linux kernel will get stuck in its estimate_frequencies function
      on boot.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      3ced12a0
    • P
      malta: disable L2 caches · e174bd74
      Paul Burton 提交于
      Malta boards may be used with cores which support L2 caches, however
      U-boot does not yet support L2 cache for MIPS. Thus for the moment we'll
      disable L2 caches by setting the L2B bit in Config2. This is specific to
      MTI/Imagination MIPS cores which is why this is done for the Malta board
      rather than generically.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      e174bd74
    • P
      malta: remove cache size definitions · 14b4e1a6
      Paul Burton 提交于
      These will now be detected at runtime, allowing a single U-boot
      configuration to function correctly with different bitstreams. Without
      this you may need to re-configure, re-build and re-flash U-boot to your
      Malta if you flash a new bitstream with a different cache configuration
      to your old bitstream.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      14b4e1a6
    • P
      malta: enable CONFIG_PCNET_79C973, PCNET_HAS_PROM, CONFIG_CMD_DHCP · e0878af8
      Paul Burton 提交于
      This model of the pcnet is used in current Malta boards, at least in the
      Malta-R rev 3. Enable support for it.
      
      The Malta also has the ethernet controller PROM containing its MAC
      address, so enable support for that in order to read that MAC address.
      
      DHCP is a very useful feature to have available for many networks,
      enable support for it also.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      e0878af8
    • P
      malta: display "U-boot" on the LCD screen · e0ada631
      Paul Burton 提交于
      Displaying a message on the LCD screen is a simple yet effective way to
      show the user that the board has booted successfully.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      e0ada631
    • P
      malta: support for coreFPGA6 boards · baf37f06
      Paul Burton 提交于
      This patch adds support for running on Malta boards using coreFPGA6
      core cards, including support for the msc01 system controller used
      with them. The system controller is detected at runtime allowing one
      U-boot binary to run on a Malta with either.
      
      Due to the PCI I/O base differing between Maltas using gt64120 & msc01
      system controllers, the UART setup is modified slightly. A second UART
      is added so that there is one pointing at the correct address for each
      system controller. The Malta board then defines its own
      default_serial_console function to select the correct one at runtime.
      The incorrect UART will simply not function.
      
      Tested on:
        - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both
          with and without an L2 cache.
        - QEMU.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      baf37f06
    • P
      malta: setup super I/O UARTs · a257f626
      Paul Burton 提交于
      On a real Malta the Super I/O needs to be configured before we are able
      to access the UARTs. This patch performs that configuration, setting up
      the UARTs in the same way that YAMON would.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      a257f626
    • P
      qemu-malta: rename to just "malta" · 7a9d109b
      Paul Burton 提交于
      This is in preparation for adapting this board to function correctly on
      a physical MIPS Malta board. The board is moved into an "imgtec" vendor
      directory at the same time in order to ready us for any other boards
      supported by Imagination in the future.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      7a9d109b
    • P
      pci.h: allow inclusion in assembly source · fa5cec03
      Paul Burton 提交于
      This patch simply #ifdef's out the C-specific parts of pci.h when it is
      included by an assembly file. This will allow the macros it contains to
      be used from assembly source as will be done in a followup commit adding
      support for more modern MIPS Malta boards.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      fa5cec03
    • P
      pcnet: enable the NOUFLO feature · 62715a2c
      Paul Burton 提交于
      On relatively slow boards (such as the MIPS Malta with an FPGA core
      card) it can be extremely common for transmits to underflow - to the
      point where it appears they simply do not work at all. Setting the
      NOUFLO bit causes the ethernet controller to not begin transmission on
      the wire until a transmit start point is reached. Setting that transmit
      start point to the full packet will cause the controller to only
      transmit the packet once it has buffered it entirely thus preventing any
      transmit underflows from occuring and allowing the controller to
      function on slower boards.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      62715a2c
    • P
      pcnet: add cache flushing & invalidation · f3ac866c
      Paul Burton 提交于
      Ensure that the view of memory from the CPU & the ethernet controller is
      coherent at the various points where they exchange data. This prevents
      stale data from being transmitted or received, and prevents the driver
      from getting stuck waiting for the ethernet controller to update
      descriptors when in reality it has but the old values are being read
      from cache.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      f3ac866c
    • P
      pcnet: s/le16_to_cpu/cpu_to_le16/ in pcnet_send · a9540041
      Paul Burton 提交于
      This should cause no change to the generated code, but is semantically
      correct.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      a9540041
    • P
      pcnet: code style cleanup · 6011dabd
      Paul Burton 提交于
      Fix up the code to match Documentation/CodingStyle. This is mostly
      removing extraneous spaces.
      
      No functional change is intended.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      6011dabd
    • P
      mips32: detect L1 cache sizes if they're not defined · fa476f75
      Paul Burton 提交于
      For boards such as the MIPS Malta with an FPGA core card it is desirable
      to be able to detect the L1 cache sizes at runtime, since they are not
      dependant upon the board but on the FPGA bitstream in use. This patch
      performs that detection when the CONFIG_SYS_[DI]CACHE_SIZE macros are
      not defined by the board configuration. In cases where the sizes are
      detected this patch also removes the restriction that the I-cache &
      D-cache line sizes must be the same, as this is not necessarily true.
      
      If the cache sizes are defined by a configuration then they will be
      hardcoded as before, so this patch will not add overhead to such
      boards.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      fa476f75
  5. 09 11月, 2013 5 次提交