Change the configured serial console index to reflect that it is the
first physical UART, reorder some defconfig lines and move some
environment configuration from bcmstb.h to bcm7445.h.
Signed-off-by: NThomas Fitzsimmons <fitzsim@fitzsim.org>
Cc: Florian Fainelli <f.fainelli@gmail.com>

Four different boards had different options for enabling cache
that were virtually all the same.  This consolidates these
common functions into arch/arm/cpu/arm926ejs/cache.c

This also has the positive side-effect of enabling cache on
the Davinci (da850) boards.
Signed-off-by: NAdam Ford <aford173@gmail.com>
[trini: Add mach-at91 to the list of consolidations]
Signed-off-by: NTom Rini <trini@konsulko.com>

DCC is supported on Cortex R series as well. Enable DCC support
for V7R.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Following build warning appears when pinctrl-single is built for ARM64:

In file included from drivers/pinctrl/pinctrl-single.c:10:0:
drivers/pinctrl/pinctrl-single.c: In function ‘single_configure_pins’:
./arch/arm/include/asm/io.h:43:28: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
 #define __arch_getw(a)   (*(volatile unsigned short *)(a))

Fix this by using phys_addr_t for variable reg instead of u32
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

timer_pre_probe() tries to populate the clock rate from DT. omap
timer driver tries to overwrite this value irrespective of the value
populated fro DT. So update this value only when DT doesn't populate
the clock rate.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

In order to handle counter overflows use 64 bit values for counter.
Also load the initial value during probe.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

The strobe dll code is ported from Linux Kernel:
drivers/mmc/host/sdhci-esdhc-imx.c
The comments are from the above file,
"For HS400 eMMC, there is a data_strobe line. This signal is generated
by the device and used for data output and CRC status response output
in HS400 mode. The frequency of this signal follows the frequency of
CLK generated by host. The host receives the data which is aligned to the
edge of data_strobe line. Due to the time delay between CLK line and
data_strobe line, if the delay time is larger than one clock cycle,
then CLK and data_strobe line will be misaligned, read error shows up.
So when the CLK is higher than 100MHz, each clock cycle is short enough,
host should configure the delay target. "
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>

Add HS400 support.
Selecting HS400 needs first select HS200 according to spec, so use
a dedicated function for HS400.
Add HS400 related macros.
Remove the restriction of only using the low 6 bits of
EXT_CSD_CARD_TYPE, using all the 8 bits.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

This commit fixes various devicetree warnings in the at91 devicetrees
like:
arch/arm/dts/sama5d36ek_cmp.dtb: Warning (avoid_unnecessary_addr_size): /gpio_keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property

These warnings make buildman report failed builds for most of at91 boards.
Thus, fixing it.
Signed-off-by: NEugen Hristev <eugen.hristev@microchip.com>

For at91family, makefile was building unwanted DTBs
Moved them under specific target configuration.
Signed-off-by: NEugen Hristev <eugen.hristev@microchip.com>

Replace clrsetbits on ODR register (2 operations: one read + one write)
by writing on the correct bit (SET or RESET) of the BSRR register
(only 1 write operation).

Moreover this register if safe for simultaneous access by 2 master on
the bus.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

This patch adds support for :
- Rate calculation through muxes and generic dividers
- Basic gate setting propagation
- Reparenting for muxes
- Clock rate setting through generic dividers without reparenting

Support is only added to the Composite VPU and VAPB clocks in order
to support the Video Processing Unit Power Domain clock setup.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>

The Amlogic Meson SoCs embeds a specific Power Domain dedicated to the
Video Processing Unit.
This patch implements support for this power domain in preparation of the
future support for the Video display support in U-Boot.

This driver will depend on changes in the clock driver to handle the setup
of the VPU and VAPB clocks configured from DT using assigned-clocks entries.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>

In int-ll64.h, we always use the following typedefs:

  typedef unsigned int         u32;
  typedef unsigned long        uintptr_t;
  typedef unsigned long long   u64;

This does not need to match to the compiler's <inttypes.h>.
Do not include it.

The use of PRI* makes the code super-ugly.  You can simply use
"l" for printing uintptr_t, "ll" for u64, and no modifier for u32.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

All architectures have the same definition for s8/16/32/64
and u8/16/32/64.

Factor out the duplicated code into <asm-generic/int-ll64.h>.

BTW, Linux unified the kernel space definition into int-ll64.h
a few years ago as you see in Linux commit 0c79a8e29b5f
("asm/types.h: Remove include/asm-generic/int-l64.h").
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

You do not need to use the typedefs provided by compiler.

Our compilers are either IPL32 or LP64.  Hence, U-Boot can/should
always use int-ll64.h typedefs like Linux kernel, whatever the
typedefs the compiler internally uses.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

arch/arm/Makefile references armv5 for backwards compatibility with
older compilers.  This patch removes those references to armv5,
since by now newer compilers are required which should have armv7
support enabled.

The Makefile also also has a list of options for mtune, but the
entry for CONFIG_CPU_V7A is empty, so this patch tunes the
CPU_V7A architecture to generic-armv7-a.

The following size changed apply to omap3_logic using GCC.

Stock
text data bss dec hex filename
50910 429 67580 118919 1d087 spl/u-boot-spl
540713 22700 327072 890485   d9675 u-boot

Without Armv5
text data bss dec hex filename
50916 429 67580 118925   1d08d spl/u-boot-spl
540719 22700 327064 890483   d9673 u-boot

mtune=generic-armv7-a
text data bss dec hex filename
50932 429 67580 118941   1d09d spl/u-boot-spl
540519 22700 327080 890299   d95bb u-boot
Signed-off-by: NAdam Ford <aford173@gmail.com>

Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

setparity users has been updated to use new setconfig ops,
so we can safely remove setparity ops
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Replace stm32_serial_setparity by stm32_serial_setconfig
which allows to set serial bits number, parity and stop
bits number.
Only parity setting is implemented.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Replace setparity by more generic setconfig ops
to allow uart parity, bits word length and stop bits
number change.

Adds SERIAL_GET_PARITY/BITS/STOP macros.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Handle getch error (when getch return 0x0) to avoid display issue
in the console.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>

Unify the fgetc function when MUX is activated or not:
- always call tstc() : it is the normal behavior expected
  by serial uclass (call tstc then getc) and that avoids
  issue when SERIAL_RX_BUFFER is activated
- reload WATCHDOG in the char waiting loop

This patch allow to have the same behavior when CONSOLE_MUX is activated
or not and avoid regression when this feature is deactivated.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add test to avoid access to rx buffer when this buffer is empty.
In this case directly call getc() function to avoid issue when tstc()
is not called.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Activate the serial rx buffer.
Prepare console MUX activation with vidconsole, and avoid console
performance issue (missing character for copy-paste).
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>

On some systems the host system or even the cross sysroot can
contain a version.h.  This leads to the wrong file being picked
up and a PLAIN_VERSION undefined error.

This workaround symlinks the version.h into the tool folder to
allow reordering of search folders.

Fixes
http://autobuild.buildroot.net/results/770/7702d5df36a6532aafdbe6e9e62709bbfa058b54/build-end.log
http://autobuild.buildroot.net/results/e34/e3401027d2fb3ce565ca9e2456a427afd3610a87/build-end.log
... additional can be found with these queries ...
http://autobuild.buildroot.net/?reason=uboot-tools-2018.03
http://autobuild.buildroot.net/?reason=uboot-tools-2018.05

Upstream: pending
Signed-off-by: NMatthew Weber <matthew.weber@rockwellcollins.com>

Signed-off-by: NTom Rini <trini@konsulko.com>

'builman' -> 'buildman'
Signed-off-by: NTuomas Tynkkynen <tuomas.tynkkynen@iki.fi>

If the OOB size is not multiple of the cache line size, the ARMv7
cache operation still prints "Misaligned operation at range".

=> nand info

Device 0: nand0, sector size 256 KiB
  Page size       4096 b
  OOB size         224 b
  Erase size    262144 b
  subpagesize     4096 b
  options     0x00104200
  bbt options 0x00060000
=> nand dump 0
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
  ...

The cache flushing operations won't happen in this case to cover all of
the range to fix this by making sure we have things aligned.
Reported-by: NMarek Vasut <marex@denx.de>
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
[trini: Reword the commit message to be clear this is a direct problem
rather than just a warning]

The get_next_memory_node() always sets mem to -1 , which is incorrect,
because then every iteration of memory bank parsing will start from the
first memory bank instead of the previous one.

On systems with 1 memory bank defined in DT and CONFIG_NR_DRAM_BANKS=4 ,
like ie. r8a77965-salvator-x , this will result in U-Boot incorrectly
reporting four identical memory banks with the same memory configuration.

Fix this by setting mem to startoffset value, which restores the behavior
before the fixed patch was applied.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Fixes: 452bc121 ("fdt: fix fdtdec_setup_memory_banksize()")
Tested-by: Michal Simek <michal.simek@xilinx.com> [on ZynqMP}

In commit a1274cc9 ("ARM: Page align secure section only when it is
executed in situ"), we used output section attributes (the "ALIGN"
keyword after the colon) to specify the alignment requirements. Using
the constant "COMMONPAGE" there was recently broken in binutils 2.31 [1].

Binutils maintainer Alan Modra suggested the former method would still
work. Since both methods achieve the same result, this patch does just
that. This fixes the "reboot after bootm" issue we've been seeing on
sunxi when booting non-secure.

  [1] https://sourceware.org/bugzilla/show_bug.cgi?id=23571Suggested-by: NAlan Modra <amodra@gmail.com>
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Reviewed-by: NTom Rini <trini@konsulko.com>
Acked-by: NJagan Teki <jagan@openedev.com>

Update the README file to take into accound the switch to SPL.
Signed-off-by: NFabio Estevam <festevam@gmail.com>
Signed-off-by: NFabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>

This updates travis configuration to use kernel.org pre-built
toolchain for riscv.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>

QEMU 3.0 introduced additional memory-mapped regions for PCI-E ECAM and
MMIO. Thus we need to add them to our MMU map or U-Boot will crash with
a Synchronous Abort during PCI-E probing when it tries to access the
unmapped ECAM memory area.
Reported-by: NJonathan Gray <jsg@jsg.id.au>
Signed-off-by: NTuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Tested-by: NJonathan Gray <jsg@jsg.id.au>

It makes no sense to assign a value to 'res' if the next use of the
variable is an assignment.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

Without this patch the Ethernet PHY on the p212 board does not get
fully configured.
When this happens Ethernet does not function.

The similar libretech-cc and khadas-vim boards have this code already.
That's why the Ethernet on these boards do work.
Signed-off-by: NJasper Kcoding <jasperkcoding@gmail.com>
Acked-by: NNeil Armstrong <narmstrong@baylibre.com>

When booting the QEMU virt machine with -net nic,model=e1000 we can already
support network boot just fine today.

So let's enable the default bootcmd to also evaluate DHCP responses properly.
That way we can enable network boot seamlessly with the virt target.
Signed-off-by: NAlexander Graf <agraf@suse.de>

When re-syncing the DTS files from the kernel, something caused
the MMC driver to no longer detect the MMC card. Undoing the
CD-invert appears to fix the issue.

Fixes: e6ea2390 ("ARM: DTS: Resync LogicPD-Torpedo-37xx-devkit
with Linux 4.18-RC4")
Signed-off-by: NAdam Ford <aford173@gmail.com>

Minor changes for ARC

1. Fix CPU clock value in HSDK's .dts so time is counted properly.
2. Enable bootelf command on EMDK

CPU (and hence cpu timers) on HSDK board runs at 500MHz after
preloader so fix wrong CPU frequency value in hsdk.dts
Signed-off-by: NEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>