The P5040 does not have SRIO, so don't put the SRIO definitions in
corenet_ds.h.  They belong in the board-specific header files.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

The P5040 does not have SRIO support, so there are no SRIO LIODNs.
Therefore, the functions that set the SRIO LIODNs should not be compiled.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

The liodn for the new PCIE controller included in P5040DS is no longer set
through a register in the guts register block but with one in the PCIE
register block itself.  Update the PCIE CCSR structure to add the new liodn
register and add a new dedicated SET_PCI_LIODN_BASE macro that puts
the liodn in the correct register.
Signed-off-by: NLaurentiu Tudor <Laurentiu.Tudor@freescale.com>
Signed-off-by: NTimur Tabi <timur@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Commit 709389b6 unintentionally used the Unicode version of the
apostrophy.  Replace it with the normal ASCII version.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Erratum: A-004034
Affects: SRIO

Description: During port initialization, the SRIO port performs
lane synchronization (detecting valid symbols on a lane) and
lane alignment (coordinating multiple lanes to receive valid data
across lanes). Internal errors in lane synchronization and lane
alignment may cause failure to achieve link initialization at
the configured port width.

An SRIO port configured as a 4x port may see one of these scenarios:

1.	One or more lanes fails to achieve lane synchronization.
	Depending on which lanes fail, this may result in downtraining
	from 4x to 1x on lane 0, 4x to 1x on lane R (redundant lane).

2.	The link may fail to achieve lane alignment as a 4x, even
	though all 4 lanes achieve lane synchronization, and downtrain
	to a 1x. An SRIO port configured as a 1x port may fail to complete
	port initialization (PnESCSR[PU] never deasserts) because of
	scenario 1.

Impact: SRIO port may downtrain to 1x, or may fail to complete
link initialization. Once a port completes link initialization
successfully, it will operate normally.
Signed-off-by: NLiu Gang <Gang.Liu@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Fix usb device-tree fixup:
	- wrong modification of dr_mode and phy_type when
	  "usb1" is not mentioned inside hwconfig string;
	   now allows hwconfig strings like:
		"usb2:dr_mode=host,phy_type=ulpi"
	- add warning message for using usb_dr_mode
	  and usb_phy_type env variables (if either is used)
Signed-off-by: NRamneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

P4080 Rev3.0 fixes ESDHC13 errata, so update the code to make the
workaround conditional.
In formal release document, the errata number should be ESDHC13 instead
of ESDHC136.
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

QIXIS FPGA layout defines the  address of registers but The actual register bit
implementation is board-specific,

So avoid use of magic numbers as it may vary across different boards's QIXIS
FPGA implementation.
Also, Avoid board specific defines in common/qixis.h
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

We should only write TSR_WIS to the SPRN_TSR register in
reset_85xx_watchdog.

The old code would cause the timer interrupt to be acknowledged when the
watchdog was reset, and we would then get no more timer interrupts.
This bug would affect all mpc85xx boards that have the watchdog enabled.
Signed-off-by: NMark Marshall <Mark.Marshall@omicron.at>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Users of familiar with the Linux gpiolib API expect that value parameter
to gpio_direction_output reflects the initial state of the output pin.
gpio_direction_output was always driving the output low, now it drives
it high or low according to the value provided.
Signed-off-by: NChris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

The original code uses 'Programming Interface' field to judge if PCIE is
EP or RC mode, however, T4240 does not support this functionality.
According to PCIE specification, 'Header Type' offset 0x0e is used to
indicate header type, so for PCIE controller, the patch changes code to
use 'Header Type' field to identify if the PCIE is EP or RC mode.
Signed-off-by: NMinghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Conflicts:
	drivers/serial/serial_lh7a40x.c
Signed-off-by: NTom Rini <trini@ti.com>

Colored logs confuse patman when analyzing logs.
Add --no-color option in git log commands in case
the default config has color.
Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@ti.com>

This doesn't need to be a long, so change it.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@ti.com>

This doesn't need to be a long, so change it.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@ti.com>

This doesn't need to be a long, so change it.

Also adjust bi_baudrate to be unsigned.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@ti.com>

This doesn't need to be a long, so change it.

Also adjust bi_baudrate to be unsigned.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@ti.com>

This doesn't need to be a long, so change it.

Also adjust bi_baudrate to be unsigned.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@ti.com>

This does not need to be a long, so change it.

Also adjust bi_baudrate to be unsigned.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@ti.com>

These don't need to be longs, so change them.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@ti.com>

These don't need to be longs, so change them.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@ti.com>

These don't need to be longs, so change them.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@ti.com>

These don't need to be longs, so change them.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@ti.com>

These don't need to be longs, so change them.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@ti.com>

These don't need to be longs, so change them.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@ti.com>

These don't need to be longs, so change them.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: NTom Rini <trini@ti.com>

These don't need to be longs, so change them.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@ti.com>

To support Non-ASCII keys (ex, Fn, PgUp/Dn, arrow keys, ...), we need to
translate key code into escape sequence.

(Updated by sjg@chromium.org to move away from a function to store
keycodes, so we can easily record how many were sent. We now need to
return this from input_send_keycodes() so we know whether keys were
generated.)
Signed-off-by: NHung-Te Lin <hungte@chromium.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@ti.com>

The i8042 keyboard reset was not checking the results of the output
buffer after the reset command. This can jam up some KBC/keyboards.
Also, remove a write to the wrong register and the CONFIG setting
around the incorrect write.
Signed-off-by: NMarc Jones <marc.jones@chromium.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@ti.com>

The BIOS leaves the keyboard enabled during boot time so that any
keystroke would interfere kernel driver initialization.

Add a way to disable the keyboard to make sure no scancode will be
generated during the boot time. Note that the keyboard will be
re-enabled again after the kernel driver is up.

This code can be called from the board functions.
Signed-off-by: NLouis Yung-Chieh Lo <yjlou@chromium.org>
Signed-off-by: NLouis Yung-Chieh Lo <yjlou@chromium.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@ti.com>

This change adds a board overridable function which can be used to decide
whether or not to initialize the i8042 keyboard controller. On systems where
it isn't actually connected to anything, this can save a significant amount of
boot time.

On Stumpy, this saves about 200ms on boot.
Signed-off-by: NGabe Black <gabeblack@chromium.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@ti.com>

On x86, the i8042 keyboard controller driver frequently waits for the keyboard
input buffer to be empty to make sure the controller has had a chance to
process the data it was given. The way the delay loop was structured, if the
controller hadn't cleared the corresponding status bit immediately, it would
wait 1ms before checking again. If the keyboard responded quickly but not
instantly, the driver would still wait a full 1ms when perhaps 1us would have
been sufficient. Because udelay is a busy wait anyway, this change decreases
the delay between checks to 1us.

Also, this change gets rid of a hardcoded 250ms delay.

On Stumpy, this saves 100-150ms during boot.
Signed-off-by: NGabe Black <gabeblack@chromium.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@ti.com>

There used to be a huge structure duplicated 3 times in the source.
Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>
Signed-off-by: NTom Rini <trini@ti.com>

When get_device_and_partition() finds a disk without a partition table,
under some conditions, it "returns" a disk_partition_t that describes
the entire raw disk. Make sure to initialize all fields in the partition
descriptor in that case.

The value chosen for name is just some arbitrary descriptive string.

The value chosen for info matches the check at the end of
get_device_and_partition(). However, it's probably not that important;
it's not obvious that the value is really used.
Reported-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Signed-off-by: NTom Rini <trini@ti.com>

Rather than leave the fdt down next to the code/data, we really should
relocate it along with everything else. For CONFIG_OF_EMBED this happens
automatically, but for CONFIG_OF_SEPARATE it does not.

Add code to copy the fdt and point to the new copy after relocation.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Tested-by: NStephen Warren <swarren@nvidia.com>

The following commit introduces some build failures for ColdFire
platform.

commit abaef69f
Author: Marek Vasut <marex@denx.de>
Date:   Thu Sep 13 16:51:38 2012 +0200

Add the missed header files.
Sign-off-by: NAlison Wang <b18965@freescale.com>

Clean up the lds file and fix the environment build error.
Signed-off-by: NJason Jin <Jason.jin@freescale.com>

Fix the  build error by clean up the lds file.
Signed-off-by: NJason Jin <Jason.jin@freescale.com>

The following warning was produced, fix it:

mcfmii.c: In function 'mcffec_miiphy_write':
mcfmii.c:318:8: warning: variable 'rdreg' set but not used [-Wunused-but-set-variable]
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: "Jin Zhengxiong-R64188" <R64188@freescale.com>
Cc: Jason Jin <jason.jin@freescale.com>

The following warning was produced, fix it:

board.c: In function 'board_init_r':
board.c:390:8: warning: unused variable 's' [-Wunused-variable]
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: "Jin Zhengxiong-R64188" <R64188@freescale.com>
Cc: Jason Jin <jason.jin@freescale.com>