SPL mmc device index is get based on the boot device, like
- BOOT_DEVICE_MMC1 for mmc device 0
- BOOT_DEVICE_MMC2 for mmc device 1

Currently BOOT_DEVICE_MMC1 is setting both SD/eSD and MMC/eMMC
boot devices in i.MX, So u-boot is loading from mmc device 0 even
"if the board booting from SD/eSD or MMC/eMMC"

So, this patch set BOOT_DEVICE_MMC2 for MMC/eMMC so for MMC/eMMC
the u-boot is loading from mmc device 1 and the board file need to
take care if the board have different mmc device order intialization.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed by: Stefano Babic <sbabic@denx.de>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Add usdhc4 node, which is eMMC for Engicam i.CoreM6 RQS modules.

eMMC Log:
--------
icorem6qdl-rqs> mmc dev 1
switch to partitions #0, OK
mmc1(part 0) is current device
icorem6qdl-rqs> mmcinfo
Device: FSL_SDHC
Manufacturer ID: fe
OEM: 14e
Name: MMC04
Tran Speed: 52000000
Rd Block Len: 512
MMC version 4.4.1
High Capacity: Yes
Capacity: 3.5 GiB
Bus Width: 4-bit
Erase Group Size: 512 KiB
HC WP Group Size: 4 MiB
User Capacity: 3.5 GiB
Boot Capacity: 16 MiB ENH
RPMB Capacity: 128 KiB ENH

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed by: Stefano Babic <sbabic@denx.de>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Add board_mmc_get_env_dev

Switch the mmc env based on the mmc devno, instead of separately
defining a config item in include/configs using board_mmc_get_env_dev
- devno 0: sd/esd
- devno 1: mmc/emmc

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Let the runtime code can set the mmcdev and mmcroot based
on the devno using mmc_get_env_dev instead of defining
separately in build-time configs using mmc_late_init func.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed by: Stefano Babic <sbabic@denx.de>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Add runtime, modeboot env which is setting mmcboot, or
nandboot based on the bootdevice so-that conditional
macros b/w MMC and NAND for CONFIG_BOOTCOMMAND should
be avoided in config files.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed by: Stefano Babic <sbabic@denx.de>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Boot from eMMC:
--------------
U-Boot SPL 2017.01-00314-gd0cd9cd-dirty (Jan 25 2017 - 13:25:27)
Trying to boot from MMC2

U-Boot 2017.01-00314-gd0cd9cd-dirty (Jan 25 2017 - 13:25:27 +0100)

CPU:   Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz)
CPU:   Industrial temperature grade (-40C to 105C) at 36C
Reset cause: POR
Model: Engicam Is.IoT MX6UL eMMC Starterkit
DRAM:  512 MiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
switch to partitions #0, OK
mmc1(part 0) is current device

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed by: Stefano Babic <sbabic@denx.de>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

SPL mmc device index is get based on the boot device, like
- BOOT_DEVICE_MMC1 for mmc device 0
- BOOT_DEVICE_MMC2 for mmc device 1

Currently BOOT_DEVICE_MMC1 is setting both SD/eSD and MMC/eMMC
boot devices in i.MX, So u-boot is loading from mmc device 0 even
"if the board booting from SD/eSD or MMC/eMMC"

So, this patch set BOOT_DEVICE_MMC2 for MMC/eMMC so for MMC/eMMC
the u-boot is loading from mmc device 1 and the board file need to
take care if the board have different mmc device order intialization.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed by: Stefano Babic <sbabic@denx.de>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Instead of initializing 'struct src' to SRC_BASE_ADDR on
every function better to have global define macro.

Reviewed by: Stefano Babic <sbabic@denx.de>
Signed-off-by: NJagan Teki <jagan@openedev.com>

Use meaningful macros IMX6_BMODE_*, instead of numerical
number in boot mode detection code.

Cc: Tim Harvey <tharvey@gateworks.com>
Acked-by: NStefano Babic <sbabic@denx.de>
Signed-off-by: NJagan Teki <jagan@openedev.com>

BOOT_CFG1[7:4] the NAND boot mode selection is done
only when BOOT_CFG1[7] is 1 hence update the NAND
boot mode detection bit case. This information available
on Table 8-11. NAND Boot eFUSE Descriptions, from IMX6DQRM.

Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed by: Stefano Babic <sbabic@denx.de>
Signed-off-by: NJagan Teki <jagan@openedev.com>

For i.MX6, the bootmode determine code is part of spl_boot_device,
but there is might be a possibility for other part the code need to
check the desired boot mode for adding new functionalities like
modeboot env variable, or changing boot order etc.

So introduced imx6_src_get_boot_mode which actually reading the
boot mode register for desired modes.

More cleanup will be add in future patches.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: NJagan Teki <jagan@openedev.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>

dts files related to i.MX6 engicam boards are maintined
under board, so include them under board/engicam/*/MAINTAINERS

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Enable I2C support for Engicam Is.IoT NAND module.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Add config options for booting Linux from NAND in UBI format.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Add NAND support for Engicam Is.IoT MX6UL board.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Add FEC support for Engicam Is.IoT MX6UL module.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Add FEC node for Engicam Is.IoT MX6UL module.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Add I2C support for Engicam Is.IoT MX6UL module.

isiotmx6ul> i2c bus
Bus 0:  i2c@021a0000
Bus 1:  i2c@021a4000
isiotmx6ul> i2c dev 0
Setting bus to 0
isiotmx6ul> i2c dev
Current bus is 0
isiotmx6ul> i2c speed 100000
Setting bus speed to 100000 Hz
isiotmx6ul> i2c probe
Valid chip addresses: 00 2C 44 78
isiotmx6ul> i2c md 2C 0xff
00ff: 00 00 00 00 0f f0 01 64 ff ff 00 00 00 00 00 00    .......d........

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Add I2C nodes for Engicam Is.IoT MX6UL module.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Boot from MMC:
-------------
U-Boot SPL 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33)
Trying to boot from MMC1

U-Boot 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33 +0100)

CPU:   Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz)
CPU:   Industrial temperature grade (-40C to 105C) at 33C
Reset cause: POR
Model: Engicam Is.IoT MX6UL Starterkit
DRAM:  512 MiB
MMC:   FSL_SDHC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0
isiotmx6ul>

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

USDHC base address will assigned by SPL using fsl_esdhc_initialize
and u-boot with devicetree, hence no remove base address assignment
in config files.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Enable MMC support.
The fsl sdhc driver needs regulator to enable power, so enable
regulator support.

And bootcmd and more env.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

Add EVK board support.
Add the evk dts file.

LOG:
U-Boot 2017.03-rc2-00038-gab86c1d (Feb 22 2017 - 15:59:58 +0800)

CPU:   Freescale i.MX7ULP rev1.0 at 500 MHz
Reset cause: POR
Boot mode: Dual boot
Model: NXP i.MX7ULP EVK
DRAM:  1 GiB
MMC:   FSL_SDHC: 0
In:    serial@402D0000
Out:   serial@402D0000
Err:   serial@402D0000
Net:   Net Initialization Skipped
No ethernet found.
Hit any key to stop autoboot:  0
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

Add compatible property for i.MX7ULP.
Add a weak init_usdhc_clk function, i.MX7ULP use this to init the clock.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>

Add i.MX7ULP dtsi file.
Add clock and pinfun header files.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

Add CAAM clock functions, SEC_CONFIG[1] fuse checking, and default CSF
size for HAB support boot on mx7ulp.

Users need to uncomment the CONFIG_SECURE_BOOT in mx7ulp_evk.h to build
secure uboot.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Signed-off-by: NYe Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>

Add i.MX7ULP support.
The buadrate calculation on i.MX7ULP is different,so add a new setbrg
function for i.MX7ULP.
Add a enum lpuart_devtype for runtime check for different platforms.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Shaohui Xie <Shaohui.Xie@nxp.com>
Cc: Alison Wang <b18965@freescale.com>

Drop CONFIG_LPUART_32B_REG.
Move the register structure to a common file include/fsl_lpuart.h
Define lpuart_serial_platdata structure which includes the reg base and flags.
For 32Bit register access, use lpuart_read32/lpuart_write32 which handles
big/little endian.
For 8Bit register access, still use the orignal code.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Shaohui Xie <Shaohui.Xie@nxp.com>
Cc: Alison Wang <b18965@freescale.com>

Add lpi2c driver for i.MX7ULP.
Need to enable the two options to use this driver:
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_IMX_LPI2C=y
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Acked-by: NHeiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Add i.MX7ULP pinctrl driver.
Select CONFIG_PINCTRL_IMX7ULP to use this driver.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by : Stefano Babic <sbabic@denx.de>

This driver implements the HW WATCHDOG functions. Which needs
to set CONFIG_HW_WATCHDOG to use them. This is disabled by default for
mx7ulp.

Use watchdog for reset cpu. Implement this in the driver.
Need to define CONFIG_ULP_WATCHDOG to build it.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Signed-off-by: NYe Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

Add the iomux pins header file from iomux tool team. Change the IOMUXC0 pins
to add IOMUX_CONFIG_MPORTS flags.

Note: The IOMUXC0 offset provided in this file is from 0xD000, this is not
aligned with IOMUXC0 base address. We have adjusted the IOMUXC0 base address
to aligin with it.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Signed-off-by: NYe Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

Update the mxc_ocotp driver to support i.MX7ULP.
The read/write sequence has some changes due to
PDN and OUT_STATUS registers added and TIME register is
removed. Also update the bank size and number.

Add is_mx7ulp macro in sys_proto.h
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Signed-off-by: NYe Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>

Add the imx_rgpio2p driver for Rapid GPIO2P controllers on i.MX7ULP.
Have added all ports on RGPIO2P_0 and RGPIO2P_1.

The configurations CONFIG_IMX_RGPIO2P and CONFIG_DM_GPIO must be set
to y to enable the drivers.

To use the GPIO function, the IBE and OBE needs to set in IOMUXC.
We did not set the bits in driver, but leave them to IOMUXC settings
of the GPIO pins. User should use IMX_GPIO_NR to generate the GPIO number
for gpio APIs access.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Signed-off-by: NYe Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>

Implement the i2c clock enable and get function for mx7ulp. These
functions are required by imx_lpi2c driver.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Signed-off-by: NYe Li <ye.li@nxp.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>

Implement soc level functions to get cpu rev, reset cause, enable cache,
etc. We will disable the wdog and init clocks in s_init at very early u-boot
phase.

Since the we are seeking the way to get chip id for mx7ulp, the get_cpu_rev
is hard coded to a fixed value. This may change in future.

Reuse some code in imx-common.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Signed-off-by: NYe Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

Add a clock framework to support SCG1/PCC2/PCC3 for A7 to support get/set
clock source, divider, clock rate and parent source.
Users need to include pcc.h to use the APIs to for peripherals clock. Each
peripheral clock is defined in enum pcc_clk type.

SCG relevants APIs are defined in scg.h which supports clock rate get, PLL/PFD
enablement and settings, and all SCG clock initialization. User need use enum
scg_clk to access each clock source.

In clock.c, we initialize necessary clocks at u-boot s_init and implement the
clock functions used by driver modules to operate clocks dynamically.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Signed-off-by: NYe Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

Add a new driver under ULP directory to support its IOMUXC
controllers. The ULP has two IOMUXC, the IOMUXC0 is used
for M4 domain, while IOMUXC1 is for A7. We set IOMUXC1 as
the default IOMUX in this driver. Any pins in IOMUXC0 needs
to configure with IOMUX_CONFIG_MPORTS in its mux_mode field.
Signed-off-by: NYe Li <ye.li@nxp.com>
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>

Add imx-regs.h for i.MX7ULP registers addresses definitions and some
registers structures.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Signed-off-by: NYe Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>

i.MX7ULP is a new series SoC which has different architecture
from previous i.MX platforms. Create a new cpu folder for it,
and add it to Kconfig.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Signed-off-by: NYe Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>