- 02 9月, 2015 40 次提交
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由 Peng Fan 提交于
Since we need to support runtime check for different drivers, we need to add get_cpu_rev for vf610, otherwise there will be build errors. This patch introduces a dummy CPU id which is not read from chip silicon. Later when we can get the real id from chip, can fix the value of MXC_CPU_VF610 then. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Suggested-by: NStefano Babic <sbabic@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: NStefano Babic <sbabic@denx.de>
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由 Peng Fan 提交于
There is a hole in shadow registers address map of size 0x100 between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX and iMX6UL. Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading the fuses, we should account for this hole in address space. Similar hole exists between bank 14 and bank 15 of size 0x80 on iMX6QP, iMX6DQ, iMX6SDL and iMX6SX. Note: iMX6SL has only 0-7 banks and there is no hole. Note: iMX6UL doesn't have this one. When reading, we use register offset, so need to account for holes to get the correct address. When writing, we use bank/word index, there is no need to account for holes, always use bank/word index from fuse map. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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由 Nikita Kiryanov 提交于
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE works better than CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP (keyboards that previously didn't work such as Microsoft Comfort Curve 1000 now do work, and it's also faster). Switch to CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE. Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il> Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
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由 Nikita Kiryanov 提交于
Print board revision for cm-fx6. Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il> Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
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由 Nikita Kiryanov 提交于
On some CM-FX6 modules U-Boot attempts to configure the usb0 controller in device mode, which renders it unavailable: USB0: Port not available. and also causes usb stop to report an error EHCI failed to shut down host controller. This happens mostly on MX6 Dual based modules, and is caused by the USBPHY_CTRL register reporting USBPHY_CTRL_OTG_ID to be 1, even when it is pulled down. Since we do not support device mode in cm-fx6 u-boot, force all controllers to be configured as hosts. Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il> Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
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由 Heiko Schocher 提交于
there is a 2b board version of the aristainetos2 board. Differences to the v2: - spi cs for the nor flash and display controller changed - some pinmux changes - LED gpio settings changed Signed-off-by: NHeiko Schocher <hs@denx.de>
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由 Heiko Schocher 提交于
make the spi bus and the spi chipselect configurable for the lg4573 driver. Use it on the aristainetos boards. Signed-off-by: NHeiko Schocher <hs@denx.de> Acked-by: NAnatolij Gustschin <agust@denx.de>
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由 Peng Fan 提交于
Discard MX6UL from CONFIG_SYS_EXTRA_OPTIONS, since we default select MX6UL for mx6ul_14x14_evk board. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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由 Peng Fan 提交于
There is no need to expose SoC choice to user, we already got the SoC according to the build target. So default "select MX6UL" for MX6UL_14x14_EVK target. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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由 Peng Fan 提交于
To i.MX6UL, SYS_L2CACHE_OFF is selected, but there is no Kconfig entry for SYS_L2CACHE_OFF. Then "select SYS_L2CACHE_OFF" does not effect for i.MX6UL, which is not expected. Since SYS_L2CACHE_OFF is mainly used by ARM architecture, add it to arch/arm/Kconfig. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Peng Fan 提交于
Add SPL boot support for mx6slevk board. 1. Introduce a configuration file mx6slevk_spl_defconfig. 2. i.MX6SL has same DRAM space with i.MX6SX, need to change SPL DRAM SPACE. 3. Include imx6_spl.h and related SPL macro in mx6slevk.h. 4. select SUPPORT_SPL for TARGET_MX6SLEVK. 5. Add SPL board code to do related initialization. Boot Log: U-Boot SPL 2015.07-00544-g1594a76 (Aug 17 2015 - 01:56:59) reading u-boot.img reading u-boot.img U-Boot 2015.07-00544-g1594a76 (Aug 17 2015 - 01:56:59 +0000) CPU: Freescale i.MX6SL rev1.2 996 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 50C Reset cause: POR Board: MX6SLEVK I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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由 Peng Fan 提交于
Add LPDDR2 support: 1. Implement a function mx6_lpddr2_cfg to initialize MMDC for LPDDR2. 2. Introduce a structure mx6_lpddr2_cfg, most entrys are same to mx6_ddr3_cfg, but still keep it a single one for easy to choose parameters for LPDDR2. 3. If ddr_type is LPDDR2, use mx6_lpddr2_cfg to init MMDC. 4. Update comments. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com>
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由 Peng Fan 提交于
To i.MX6, DDR3 and LPDDR2 is supported, so rename function mx6_dram_cfg to mx6_ddr3_cfg and the original mx6_dram_cfg function only is a wrapper. The new reimplemented function mx6_dram_cfg only invokes mx6_ddr3_cfg when ddr_type is for DDR3. Later we can use ddr_type to initialize MMDC for LPDDR2. Initialize ddr_type for different boards which enable SPL. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefan Roese <sr@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Peng Fan 提交于
Add ddr_type entry for mx6_ddr_sysinfo. It will be used for differenrate DDR3 and LPDDR2. Introduce an enum type for ddr_type. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com>
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由 Peng Fan 提交于
Add mpzqlp2ctl entry for mx6_mmdc_calibration. MMDC_MPZQLP2CTL register is for init tZQINIT, tZQCL, tZQCS for LPDDR2 chips. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com>
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由 Peng Fan 提交于
Define two structure mx6sl_iomux_ddr_regs and mx6sl_iomux_grp_regs. Add a new function mx6sl_dram_iocfg to configure dram io. Add header file to define macros for register address. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Peng Fan 提交于
To Chip density 4Gb, tRFC should be 300ns, see "Table 61 — Refresh parameters by device density" of JESD79-3E. tXS(min) is max(5nCK, tRFC(min) + 10ns). Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Reviewed-by: NStefano Babic <sbabic@denx.de>
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由 Peng Fan 提交于
i.MX 6SoloLite only supports MMDC0, so do not access MMDC1 for i.MX 6SL. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Reviewed-by: NStefano Babic <sbabic@denx.de>
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由 Peng Fan 提交于
Add more register entry for MMDC structure. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Reviewed-by: NStefano Babic <sbabic@denx.de>
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由 Soeren Moch 提交于
SYS_SOC is already defined in arch/arm/cpu/armv7/mx6/Kconfig, no need to define it again Signed-off-by: NSoeren Moch <smoch@web.de>
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由 Soeren Moch 提交于
move options from CONFIG_SYS_EXTRA_OPTIONS to board specific Kconfig Signed-off-by: NSoeren Moch <smoch@web.de>
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由 Soeren Moch 提交于
Signed-off-by: NSoeren Moch <smoch@web.de>
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由 Olaf Mandel 提交于
Extend the documentation of the fec_mxc configuration by describing its ability to read the ethaddr MAC address from the SoC eFuses. Also add an example how to program the fuses for an imx5 to clarify the byte order. Cc: Stefano Babic <sbabic at denx.de> Cc: Marek Vasut <marex at denx.de> Signed-off-by: Olaf Mandel <o.mandel at menlosystems.com>
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由 Heiko Schocher 提交于
some small updates for the aristainetos boards: - fix display timings for the aristainetos board - fix pinmux for the aristainetos board - fix pinmux for the aristainetos2 board - fix default environment Signed-off-by: NHeiko Schocher <hs@denx.de>
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由 Peng Fan 提交于
Enable CONFIG_SPL_FAT_SUPPORT to load u-boot.img from FAT partition. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Reviewed-by: NStefano Babic <sbabic@denx.de>
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由 Peng Fan 提交于
Add enet support for mx6ul_14x14_evk board: 1. add pinmux settings 2. implement board_eth_init 3. implement board_phy_config Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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由 Adrian Alonso 提交于
* Ocotp of i.MX7D has different operation rule. This patch is to add support for i.MX7D ocotp. Signed-off-by: NAdrian Alonso <aalonso@freescale.com> Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Signed-off-by: NYe.Li <B37916@freescale.com>
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由 Adrian Alonso 提交于
* Add mxc_gpio support for imx7d SoC * Use CONFIG_MX7 to extend mxc gpio driver support for imx7d Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Signed-off-by: NAdrian Alonso <aalonso@freescale.com>
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由 Adrian Alonso 提交于
* Add imx7d support for iomux controller * imx7d has two iomux controllers iomuxc (0x3033000) and iomuxc-lpsr (0x302C0000) each conroller provides control and mux mode pad registers but shares iomuxc input select register with iomuxc-lpsr IOMUX_CONFIG_LPSR flag is used to properly set daisy chain settings for iomuxc-lpsr pads. * Since mx7d introduces LPSR IOMUX pins, add new base to IOMUX v3 driver for these LPSR pins. Signed-off-by: NAdrian Alonso <aalonso@freescale.com> Signed-off-by: NFugang Duan <B38611@freescale.com> Signed-off-by: NYe.Li <B37916@freescale.com>
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由 Adrian Alonso 提交于
* Add pmic pfuze3000 support, implement power_pfuze3000_init to be used in power_init_board callback function. Signed-off-by: NAdrian Alonso <aalonso@freescale.com> Signed-off-by: NPeng Fan <Peng.Fan@freescale.com>
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由 Peng Fan 提交于
The MIB RAM and FIFO receive start register does not exist on i.MX6UL. Accessing these register will cause enet not work well. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Signed-off-by: NFugang Duan <B38611@freescale.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Peng Fan 提交于
To i.MX6SX/UL, two ethernet interfaces are supported. Add ENET2 clock support: 1. Introduce a new input parameter "fec_id", only 0 and 1 are allowed. To value 1, only i.MX6SX/UL can pass the check. 2. Modify board code who use this api to follow new api prototype. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Heiko Schocher <hs@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefan Roese <sr@denx.de> Cc: Nikolaos Pasaloukos <Nikolaos.Pasaloukos@imgtec.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Peng Fan 提交于
Move most macro definitions and prototypes into "arch/arm/include/asm/imx-common/sys_proto.h" to avoid duplicated function prototypes and marco definitions for different i.MX SoCs. This patch do not remove the sys_proto.h for different i.MX SoCs, because we need to modify lots of driver code and others. This patch remove duplicated macros and prototypes and incude "sys_proto.h" of imx-common for each sys_proto.h of different i.MX platforms. Then later we should avoid add stuff in sys_proto.h of each platform, and modify driver to include common sys_proto.h. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: NStefano Babic <sbabic@denx.de>
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由 Peng Fan 提交于
Rewrite get_cpu_rev, from "static const char *get_cpu_rev(void)" to "u32 get_cpu_rev(void)". To align with get_cpu_rev of other i.MXes. Also write get_imx_type to replace get_cpu_type, since we have macro named get_cpu_type. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: NStefano Babic <sbabic@denx.de>
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由 Peng Fan 提交于
Use new formula for get_cpu_rev, since we need to use this formula to do runtime check for all i.MXes. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: NStefano Babic <sbabic@denx.de>
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由 Peng Fan 提交于
Implement get_cpu_rev to support runtime check using is_cpu_type. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: NStefano Babic <sbabic@denx.de>
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由 Peng Fan 提交于
Add cpu types for i.MX2/3. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: NStefano Babic <sbabic@denx.de>
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由 Peng Fan 提交于
Move TARGET_xx Kconfig option based on mx6 to arch/arm/cpu/armv7/mx6/Kconfig. Add enable "CONFIG_ARCH_MX6" for boards based on mx6. Then we can choose target boards using "make ARCH=arm menuconfig" with ARCH_MX6 defined. If using original way, we have no chance to enable ARCH_MX6 when "make menuconfig". Even define CONFIG_ARCH_MX6=y in xx_defconfig, kconfig will complains "arch/../configs/platinum_titanium_defconfig:3: warning: override: TARGET_PLATINUM_TITANIUM changes choice state" Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Eric Bénard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Marek Vasut <marex@denx.de> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Soeren Moch <smoch@web.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Acked-by: NStefano Babic <sbabic@denx.de> Acked-by: NSoeren Moch <smoch@web.de> Acked-by: NOtavio Salvador <otavio@ossystems.com.br> Acked-by: NChristian Gmeiner <christian.gmeiner@gmail.com>
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由 Chris Smith 提交于
When the original HBUS divider value is retrieved in mxs_ocotp_scale_hclk() for the purpose or restoring it back later, the value is not shifted by the HBUS divider offset in that register. This is not a problem, since the shift is zero on all MXS hardware. Add the shift anyway, for completeness and in case FSL ever decides to re-use this driver on future designs. Signed-off-by: NChris Smith <chris@zxdesign.info> Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
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