- 07 10月, 2013 3 次提交
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From Micron, 512MB onwards, flash requires to poll flag status instead of read status- hence added E_FSR flag on spectific flash parts. Signed-off-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>
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SECT_4K, SECT_32K and SECT_64K opeartions are performed to to specific flash by adding a SECT* flag on respective spi_flash_params.flag param. Signed-off-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>
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Most of the SST flashes needs to write up using SST_WP, AAI Word Program, so added a flag param on spi_flash_params table. SST flashes, which supports SST_WP need to use a WP write sst_write_wp instead of common flash write. Signed-off-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>
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- 24 7月, 2013 1 次提交
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由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: NTom Rini <trini@ti.com>
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- 24 6月, 2013 4 次提交
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Flag status register polling is required for micron 512Mb flash devices onwards, for performing erase/program operations. Like polling for WIP(Write-In-Progress) bit in read status register, spi_flash_cmd_wait_ready will poll for PEC(Program-Erase-Control) bit in flag status register. Signed-off-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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Defined bank addr code on CONFIG_SPI_FLASH_BAR macro, to reduce the size for existing boards which has < 16Mbytes SPI flashes. It's upto user which has provision to use the bank addr code for flashes which has > 16Mbytes. Signed-off-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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Read the flash bank addr register to get the state of bank in a perticular flash. and also bank write happens only when there is a change in bank selection from user. bank read only valid for flashes which has > 16Mbytes those are opearted in 3-byte addr mode, each bank occupies 16Mytes. Suppose if the flash has 64Mbytes size consists of 4 banks like bank0, bank1, bank2 and bank3. Signed-off-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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Bank/Extended addr commands are specific to particular flash vendor so discover them based on the idocode0. Assign the discovered bank commands to spi_flash members so-that the bank read/write will use their specific operations. Signed-off-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>
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- 19 3月, 2013 2 次提交
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由 Simon Glass 提交于
Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
At present it is difficult to extend the SPI flash structure since all devices allocate it themselves, and few of them zero all fields. Add a new function spi_flash_alloc() which can be used by SPI devices to perform this allocation, and thus ensure that all devices can better cope with SPI structure changes. Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 24 12月, 2011 1 次提交
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由 Christian Riesch 提交于
Signed-off-by: NChristian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Scott Wood <scottwood@freescale.com> Acked-by: NMike Frysinger <vapier@gentoo.org>
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- 26 7月, 2011 1 次提交
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由 Mike Frysinger 提交于
Once we add a new page_size field for write lengths, we can unify the write methods for most of the spi flash drivers. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 12 4月, 2011 2 次提交
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由 Richard Retanubun 提交于
This patch adds a new member to struct spi_flash (u16 sector_size) and updates the spi flash drivers to start populating it. This parameter can be used by spi flash commands that need to round up units of operation to the flash's sector_size. Having this number in one place also allows duplicated code to be further collapsed into one common location (such as erase parameter and the detected message). Signed-off-by: NRichard Retanubun <RichardRetanubun@RuggedCom.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 25 11月, 2009 1 次提交
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由 Mike Frysinger 提交于
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- 04 6月, 2008 1 次提交
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由 Haavard Skinnemoen 提交于
This adds a new SPI flash subsystem. Currently, only AT45 DataFlash in non-power-of-two mode is supported, but some preliminary support for other flash types is in place as well. Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
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