Add initial clock driver for Allwinner A64.

Implement USB clock enable and disable functions for
OHCI, EHCI, OTG and USBPHY gate and clock registers
via ccu clk gate table.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com>

Emlid Neutis N5 is a SoM based on Allwinner H5, has a WiFi & BT
module, DDR3 RAM and eMMC.

- add neutis-devboard target to dtb makefile
- add dtsi file for Neutis N5 needs
- add config file for Neutis N5 Dev board
Signed-off-by: NAleksandr Aleksandrov <aleksandr.aleksandrov@emlid.com>
Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: NJagan Teki <jagan@amarulasolutions.com>
[jagan: update proper commit head]
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

To use TWI0/1/2 the user can select CONFIG_I2C#_ENABLE.
However even the controller is enabled, the mux for the pins
are not set.

This patch follows the existing mux method. Since the pads are
different, separate check is added for each i2c.

Tested with A64-SOM204 board.
Signed-off-by: NStefan Mavrodiev <stefan@olimex.com>
Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

- MIPS: mscc: various enhancements for Luton and Ocelot platforms
- MIPS: mscc: added support for Jaguar2 platform
- MIPS: optimised SPL linker script
- MIPS: bcm6368: fix restart flow issues
- MIPS: fixed CONFIG_OF_EMBED warnings for all MIPS boards
- MIPS: mt7688: small fixes and enhancements
- mmc: compile-out write support if disabled

- Fixes for CVE-2018-18440 and CVE-2018-18439
- Patch to allow disabling unneeded NAND ECC layouts
- Optimize SPI flash env read process

This fixes  'arch_lmb_reserve()' for ARM that tries to detect in which
DRAM bank 'sp' is in.

This code failed if a bank was at the end of physical address range
(i.e. size + length overflowed to 0).

To fix this, calculate 'bank_end' as 'size + length - 1' so that such
banks end at 0xffffffff, not 0.

Fixes: 15751403 ("ARM: bootm: don't assume sp is in DRAM bank 0")
Reported-by: NFrank Wunderlich <frank-w@public-files.de>
Signed-off-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>

This fixes CVE-2018-18439 ("insufficient boundary checks in network
image boot") by using lmb to check for a valid range to store
received blocks.
Signed-off-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
[trini: Always build lib/lmb.o on LMB and lib/fdtdec.o on OF_LIBFDT]
Signed-off-by: NTom Rini <trini@konsulko.com>

lmb.h includes an extern declaration of "struct lmb lmb;" which
is not used anywhere, so remove it.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

This reduces duplicate code only.
Signed-off-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This fixes CVE-2018-18440 ("insufficient boundary checks in filesystem
image load") by using lmb to check the load size of a file against
reserved memory addresses.
Signed-off-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This adds two new functions, lmb_alloc_addr and
lmb_get_unreserved_size.

lmb_alloc_addr behaves like lmb_alloc, but it tries to allocate a
pre-specified address range. Unlike lmb_reserve, this address range
must be inside one of the memory ranges that has been set up with
lmb_add.

lmb_get_unreserved_size returns the number of bytes that can be
used up to the next reserved region or the end of valid ram. This
can be 0 if the address passed is reserved.

Added test for these new functions.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

boot_fdt_add_mem_rsv_regions() adds reserved memory sections to an lmb
struct. Currently, it only parses regions described by /memreserve/
entries.

Extend this to the more commonly used scheme of the "reserved-memory"
node.
Signed-off-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

lmb_add_region handles overlapping regions wrong: instead of merging
or rejecting to add a new reserved region that overlaps an existing
one, it just adds the new region.

Since internally the same function is used for lmb_alloc, change
lmb_add_region to reject overlapping regions.

Also, to keep reserved memory correct after 'free', reserved entries
created by allocating memory must not set their size to a multiple
of alignment but to the original size. This ensures the reserved
region is completely removed when the caller calls 'lmb_free', as
this one takes the same size as passed to 'lmb_alloc' etc.

Add test to assert this.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

The lmb code fails if base + size of RAM overflows to zero.

Fix this by calculating end as 'base + size - 1' instead of 'base + size'
where appropriate.

Added tests to assert this is fixed.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

Add basic tests for the lmb memory allocation code used to reserve and
allocate memory during boot.
Signed-off-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

The spi_flash_read_env function is a wrapper over spi_flash_read, which
enables the env to read multiple flash page size from flash until '\0\0'
is read or the end of env partition is reached. Instead of reading the
entire env size. When it reads '\0\0', it stops reading further the env
and assumes that the rest of env is '\0'.

This is an optimization for large environments that contain few bytes
environment variables. In this case it doesn't need to read the entire
environment and only few pages.
Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com>

Each ECC layout consumes about 2984 bytes in the .data section. Allow
to disable the default ECC layouts if a driver is known to provide its
own ECC layout.
Signed-off-by: NStefan Agner <stefan.agner@toradex.com>
Reviewed-by: NLukasz Majewski <lukma@denx.de>
Reviewed-by: NMiquel Raynal <miquel.raynal@bootlin.com>

Set the correct power-up state (default-state) of the green power LED.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

With the new SPI NOR framework in v4.19, we need to adapt the MTD parts
so that the kernel cmdline parameter "mtdparts=" uses the correct naming
for the devices.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

Fix the Kconfig warning to not use CONFIG_OF_EMBED in defconfigs.

Based on https://patchwork.ozlabs.org/patch/1019791/Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>

Fix the Kconfig warning to not use CONFIG_OF_EMBED in defconfigs.
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>

Fix the Kconfig warning to not use CONFIG_OF_EMBED in defconfigs.
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>

Fix the Kconfig warning to not use CONFIG_OF_EMBED in defconfigs.
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>

Fix the Kconfig warning to not use CONFIG_OF_EMBED in defconfigs.
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>

Add board support and configuration for Jaguar2 SOC family.
The detection of the board type in this family is based on the phy ids.
Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com>

Add device tree based on evaluation board pcb112.
Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com>

Add device tree based on evaluation board pcb111.
Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com>

Add device tree based on evaluation board pcb110.
Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com>

As the Ocelot and Luton SoCs, this family of SoCs are found
in Microsemi Switches solution.
Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com>

The Jaguar2 SOC family has 63 gpio pins therefore I extended mscc-common
to support new numbe of pins and remove any platform dependency from
mscc-common.
Signed-off-by: NHoratiu Vultur <horatiu.vultur@microchip.com>

With the new mscc_bb_spi.c driver, there is no longer use for the
gpio-mscc-bitbang-spi.c driver.
Signed-off-by: NLars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>

Thes patch change the luton base device tree to use the newly added
SPI bitbang driver.

It also updates the "mscc_luton_defconfig" to use the new driver.
Signed-off-by: NLars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>

This patch add a new SPI driver for MSCC SOCs that does not sport the
designware SPI hardware controller.

Performance gain: 7.664 seconds vs. 17.633 for 1 Mbyte write.
Signed-off-by: NLars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>

Do not build write support, unless it's enabled.

In the SPL case, this change will typically remove
precious bytes (as write support is most often
not needed in SPL).

This is important on this platform, where the maximum
SPL size is 14 KiB.

With gcc v7.3, this change saves 144 bytes producing:

size spl/u-boot-spl
   text	   data	    bss	    dec	    hex	filename
   9240	    752	    712	  10704	   29d0	spl/u-boot-spl

To make the code easier to compile-out and more
readable, a pair of read_data/write_data helpers are created.
Signed-off-by: NEzequiel Garcia <ezequiel@collabora.com>
Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>

Use CONFIG_IS_ENABLED(BLK) instead of CONFIG_BLK,
in order to fix the following build issues when
CONFIG_SPL_MMC_WRITE is selected:

drivers/mmc/mmc_write.c:69:7: error: conflicting types for 'mmc_berase'
 ulong mmc_berase(struct udevice *dev, lbaint_t start, lbaint_t blkcnt)
       ^~~~~~~~~~
In file included from drivers/mmc/mmc_write.c:15:0:
drivers/mmc/mmc_private.h:39:7: note: previous declaration of 'mmc_berase' was here
 ulong mmc_berase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt);
       ^~~~~~~~~~
drivers/mmc/mmc_write.c:187:7: error: conflicting types for 'mmc_bwrite'
 ulong mmc_bwrite(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
       ^~~~~~~~~~
In file included from drivers/mmc/mmc_write.c:15:0:
drivers/mmc/mmc_private.h:37:7: note: previous declaration of 'mmc_bwrite' was here
 ulong mmc_bwrite(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
       ^~~~~~~~~~
Signed-off-by: NEzequiel Garcia <ezequiel@collabora.com>
Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>

Correctly enable/disable bcm6368-net controller to avoid flow issues.
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>

There is no real difference between the generic variant and
the custom variant except that the generic variant is more
optimised. This also saves 24 Bytes in the SPL binary.
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-by: NEzequiel Garcia <ezequiel@collabora.com>

Discard ABI related sections which are not required for debugging.
Rearrange debug sections similar to Linux. Remove the remaining
explicitely specified sections in the unused part because those
sections are not created anymore or because the linker puts them
by default at the end of the ELF binary.
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-by: NEzequiel Garcia <ezequiel@collabora.com>

This enables the use of the MSCC serial GPIO driver to control the
LEDs on the MSCC VCoreIII 'ocelot' pcb123 and pcb120.
Signed-off-by: NLars Povlsen <lars.povlsen@microchip.com>

This enables the use of the MSCC serial GPIO driver on the MSCC
VCoreIII 'ocelot' SOC, and add gpio-leds nodes to the pcb123 and
pcb120 DT.
Signed-off-by: NLars Povlsen <lars.povlsen@microsemi.com>