Make rx mode flags as generic to spi, earlier mode_rx is
maintained separately because of some flash specific code.

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: NJagan Teki <jteki@openedev.com>

Introduce dm_spi_claim_bus, dm_spi_release_bus and dm_spi_xfer
Convert spi_claim_bus, spi_release_bus and spi_xfer to use
the new API.
Signed-off-by: NPeng Fan <van.freenix@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jagan Teki <jteki@openedev.com>
Acked-by: NSimon Glass <sjg@chromium.org>

spi bus can support dual and quad wire data transfers for tx and
rx. So defining dual and quad modes for both tx and rx. Also add
support to parse bus width used for spi tx and rx transfers.
Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: NJagan Teki <jteki@openedev.com>
Signed-off-by: NJagan Teki <jteki@openedev.com>

Added SPI_TX_DUAL mode flag.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Tested-by: NJagan Teki <jteki@openedev.com>
Signed-off-by: NJagan Teki <jteki@openedev.com>

SLOW, FAST, DUAL, DUAL_IO, QUAD, QUAD_IO changed order to
SLOW, FAST, DUAL, QUAD, DUAL_IO, QUAD_IO

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: NJagan Teki <jteki@openedev.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Signed-off-by: NJagan Teki <jteki@openedev.com>

- Add comments on mode_rx
- Tab space's

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: NMugunthan V N <mugunthanvnm@ti.com>
Tested-by: NBin Meng <bmeng.cn@gmail.com>
Tested-by: NJagan Teki <jteki@openedev.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Signed-off-by: NJagan Teki <jteki@openedev.com>

Used BIT macro like 1 << nr as BIT(nr) where nr is 0...n

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: NMugunthan V N <mugunthanvnm@ti.com>
Tested-by: NBin Meng <bmeng.cn@gmail.com>
Tested-by: NJagan Teki <jteki@openedev.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Signed-off-by: NJagan Teki <jteki@openedev.com>

Fixed bit assignment with flags members on spi_slave{}

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: NMugunthan V N <mugunthanvnm@ti.com>
Tested-by: NBin Meng <bmeng.cn@gmail.com>
Tested-by: NJagan Teki <jteki@openedev.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Signed-off-by: NJagan Teki <jteki@openedev.com>

This patch moves flags macro's to respective member
position on spi_slave{}, for better readabilty and
finding the respective member macro's easily.

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: NMugunthan V N <mugunthanvnm@ti.com>
Tested-by: NJagan Teki <jteki@openedev.com>
Signed-off-by: NJagan Teki <jteki@openedev.com>

Since spi rx mode macro's are renamed to simple and
meaninfull, this patch will rename the respective
structure members.

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: NMugunthan V N <mugunthanvnm@ti.com>
Tested-by: NJagan Teki <jteki@openedev.com>
Signed-off-by: NJagan Teki <jteki@openedev.com>

SPI_OPM_RX_AS 	- SPI_RX_SLOW
SPI_OPM_RX_AF	- SPI_RX_FAST
SPI_OPM_RX_DOUT	- SPI_RX_DUAL
SPI_OPM_RX_QOF	- SPI_RX_QUAD

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: NMugunthan V N <mugunthanvnm@ti.com>
Tested-by: NBin Meng <bmeng.cn@gmail.com>
Tested-by: NJagan Teki <jteki@openedev.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Signed-off-by: NJagan Teki <jteki@openedev.com>

SPI_OPM_RX_DIO and SPI_OPM_RX_QIOF are rx IO
commands/opmodes for dual and quad. Usually IO
operation's are referred to flash protocol rather
with spi controller protocol, these are still present
in flash side for the usage of spi-nor controllers.

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: NMugunthan V N <mugunthanvnm@ti.com>
Tested-by: NBin Meng <bmeng.cn@gmail.com>
Tested-by: NJagan Teki <jteki@openedev.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Signed-off-by: NJagan Teki <jteki@openedev.com>

SPI_OPM_RX_EXTN is a combination of all rx opmode's
and spi driver shall use any one of the rx mode at
a time not the combination and it is true in case of
flash where spi_flash_table mention combination of
supported read opmodes so-that the required one
will pick based on the rx mode from spi driver.

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: NMugunthan V N <mugunthanvnm@ti.com>
Tested-by: NBin Meng <bmeng.cn@gmail.com>
Tested-by: NJagan Teki <jteki@openedev.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Signed-off-by: NJagan Teki <jteki@openedev.com>

Since SPI_TX_* are spi_slave{} members so use spi protocol
notation instead spi flash programming, like

SPI_TX_BP  => SPI_TX_BYTE
SPI_TX_QPP => SPI_TX_QUAD

Cc: Simon Glass <sjg@chromium.org>
Tested-by: NJagan Teki <jteki@openedev.com>
Tested-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Signed-off-by: NJagan Teki <jteki@openedev.com>

Used mode member from spi_slave{} instead of op_mode_tx.

Cc: Simon Glass <sjg@chromium.org>
Tested-by: NJagan Teki <jteki@openedev.com>
Tested-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Signed-off-by: NJagan Teki <jteki@openedev.com>

Couldn't find the exact reason to define 'mode' for dm,
probably it is not using in non-dm drivers but it need
to visible both dm and non-dm as mode data is getting
dereferred in spi flash core ie common to both.

Cc: Simon Glass <sjg@chromium.org>
Tested-by: NJagan Teki <jteki@openedev.com>
Tested-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Signed-off-by: NJagan Teki <jteki@openedev.com>

The current name is inconsistent with other driver model data access
functions. Rename it and fix up all users.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJoe Hershberger <joe.hershberger@ni.com>

When doing a memory mapped copy we may have DMA available and thus need
to have this copy abstracted so that the driver can do it, rather than a
simple memcpy.
Signed-off-by: NTom Rini <trini@ti.com>
Signed-off-by: NVignesh R <vigneshr@ti.com>
Reviewed-by: NJagan Teki <jteki@openedev.com>

- Adjust tab spaces
- Add comments
Signed-off-by: NJagan Teki <jteki@openedev.com>

This comment should refer to SPI, not serial.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

Only set the speed if it has changed from last time. Since the speed will
be 0 when the device is probed it will always be changed on the first
transfer after the device is probed.
Signed-off-by: NSimon Glass <sjg@chromium.org>

These methods should be passed a slave device, not a bus. This matches the
old SPI interface. It is important to know which device is claiming the bus
so passing a bus is not that useful.
Reported-by: NHaikun Wang <haikun.wang@freescale.com>
Signed-off-by: NSimon Glass <sjg@chromium.org>
Tested-by: NPeng Fan <Peng.Fan@freescale.com>
Reviewed-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

Correct the macros as per insertion of array fast read
command CMD_READ_ARRAY_FAST in spi_read_cmds_array in file
sf_probe.c
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

At present we go through various contortions to store the SPI slave's chip
select in its private data. This only exists when the slave is active so
must be set up when it is probed. Until the device is probed we don't
actually know what chip select it will appear on.

However, now that we can support per-child platform data, we can use that
instead. This allows us to set up the chip select when the child is bound,
and avoid the messy contortions.

Unfortunately this is a fairly large change and it seems to be difficult to
break it down further.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Enabled byte program support for sst flashes in sf.

Few controllers will only support BP, so this patch gives
a tx transfer flag to set the BP so-that sf will operate
on byte program transfer.

A new TX operation mode SPI_OPM_TX_BP is introduced for such SPI
controller to use byte program op for SST flash.
Signed-off-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Tested-by: NBin Meng <bmeng.cn@gmail.com>

The SPI function does the same thing, so we may as well just use the new
generic function. The 'cs' parameter was not actually used, so can be
dropped.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Acked-by: NHeiko Schocher <hs@denx.de>

This code was not updated when the chip select handling was adjusted. Fix
it to call the correct function.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Acked-by: NHeiko Schocher <hs@denx.de>

U-Boot includes a SPI emulation driver already but it is not explicit, and
is hidden in the SPI flash code.

Conceptually with sandbox's SPI implementation we have a layer which
creates SPI bus transitions and a layer which interprets them, currently
only for SPI flash. The latter is actually an emulation, and it should be
possible to add more than one emulation - not just SPI flash.

Add a SPI emulation uclass so that other emulations can be plugged in to
support different types of emulated devices on difference buses/chip
selects.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

Add a uclass which provides access to SPI buses and includes operations
required by SPI.

For a time driver model will need to co-exist with the legacy SPI interface
so some parts of the header file are changed depending on which is in use.
The exports are adjusted also since some functions are not available with
driver model.

Boards must define CONFIG_DM_SPI to use driver model for SPI.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
(Discussed some follow-up comments which will address in future add-ons)

Some of the #defines in spi.h are not bracketed. To avoid future mistakes
add brackets. Also add an explanatory comment for SPI_CONN_DUAL_...
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

This patch added support for accessing dual memories in
parallel connection with single chipselect line from controller.

For more info - see doc/SPI/README.dual-flash
Signed-off-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

This patch added support for accessing dual memories in
stacked connection with single chipselect line from controller.

For more info - see doc/SPI/README.dual-flash
Signed-off-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

This patch adds support QUAD_IO_FAST read command.
Signed-off-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

This patch add quad commands support like
- QUAD_PAGE_PROGRAM => for write program
- QUAD_OUTPUT_FAST ->> for read program
Signed-off-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

Current sf uses FAST_READ command, this patch adds support to
use the different/extended read command.

This implementation will determine the fastest command by taking
the supported commands from the flash and the controller, controller
is always been a priority.
Signed-off-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

This allows us to put the SPI flash chip inside the SPI interface node,
with U-Boot finding the correct bus and chip select automatically.
Signed-off-by: NSimon Glass <sjg@chromium.org>

The flag combination "SPI_XFER_BEGIN | SPI_XFER_END" is a common use
case of spi_xfer, and it can easily cause an already long line (spi_xfer
takes 5 parameters) to go over the 80 character limit.

define SPI_XFER_ONCE to be a shorter version of the above flag combination.

Cc: Tom Rini <trini@ti.com>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>

Current implementation only supports 8 bit word lengths, even though
omap3 can handle anything between 4 and 32.

Update the spi interface to support changing the SPI word length,
and implement it in omap3_spi driver to support the full range of
possible word lengths.
This implementation is backwards compatible by defaulting to the old
behavior of 8 bit word lengths.
Also, it required a change to the omap3_spi non static I/O functions,
but since they are not used anywhere else, no collateral changes are required.

Cc: Tom Rini <trini@ti.com>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>

- Add comments.
- Renamed few macros.
- Add tabs.
Signed-off-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: NBo Shen <voice.shen@atmel.com>

- Add spaces, tabs
- Commenting.
- Rearrange code.
- Add static qualifier for missing func.
- Remove memory_map from ramtron.c
- Ramtron: spi_flash_internal.h -> sf_internal.h
Signed-off-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>