- 09 9月, 2014 15 次提交
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由 Nikita Kiryanov 提交于
According to MX6 TRM, both MMDC and DRAM should be configured to the same powerdown precharge. Currently, mx6_dram_cfg() configures MMDC for fast pd (MDPDC[7] = 0), and the DRAM for 'slow exit (DLL off)' (MR0[12] = 0). Configure MMDC for slow pd. Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il> Acked-by: NTim Harvey <tharvey@gateworks.com>
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由 Nikita Kiryanov 提交于
Bit 16 in mapsr register is in a reserved field. Don't write to it. Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Acked-by: NTim Harvey <tharvey@gateworks.com> Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
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由 Nikita Kiryanov 提交于
No functional changes. Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Acked-by: NTim Harvey <tharvey@gateworks.com> Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
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由 Nikita Kiryanov 提交于
Add macro which defines i2c_pads_info structs for multiple SoC types, and a macro which selects the appropriate struct based on CPU type, thus eliminating the need to manage multiple i2c pad configurations manually when supporting multiple SoC types. Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Acked-by: NTim Harvey <tharvey@gateworks.com> Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
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由 Nikita Kiryanov 提交于
Define the new common function sata_port_status() which can be used to query the sata driver for the state of ports, and implement it for dwc_ahsata. Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: NMarek Vasut <marex@denx.de> Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
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由 Nikita Kiryanov 提交于
Create CONFIG_SYS_I2C_EEPROM_BUS #define to tell the EEPROM module what I2C bus the EEPROM is located at. Make cl_eeprom_read() switch to that bus when reading EEPROM. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Dmitry Lifshitz <lifshitz@compulab.co.il> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Acked-by: NDmitry Lifshitz <lifshitz@compulab.co.il> Reviewed-by: NMarek Vasut <marex@denx.de> Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
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由 Nikita Kiryanov 提交于
Add functions to enable/disable clocks for UART, SPI, ENET, and MMC. Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
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由 Tim Harvey 提交于
There are many similarities between the IMX6QUAD/IMX6DUAL and there are many similarities between the IMX6SOLO/IMX6DUALITE. Add a 'soctype' env variable that tells you which type you have. Signed-off-by: NTim Harvey <tharvey@gateworks.com>
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由 Tim Harvey 提交于
The GW5520 has an IMX6Q SoC with 512MB of DDR3, 256MB of NAND flash as well as: * 2x MiniPCIe sockets * 2x USB host sockets * 2x i210 GigE * HDMI out * digital I/O expansion Signed-off-by: NTim Harvey <tharvey@gateworks.com>
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由 Tim Harvey 提交于
The IMX6 MMDC calibration registers depend on propagation delay and capacitive loading between the SoC's MMDC and the DDR3 chips. On the Ventana boards the board layout varies little in trace-lengths such that propagation delays are irrelevant thus we can simply things by using calibration values obtained from various board layouts based on a common SoC and DDR chip configuration. This eliminates board-model from being needed allowing more flexibility. These values were tested on a large sample size of Gateworks Ventana boards ranging in layout, and memory configuration over the entire temperature range supported. Signed-off-by: NTim Harvey <tharvey@gateworks.com>
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由 Tim Harvey 提交于
Signed-off-by: NTim Harvey <tharvey@gateworks.com>
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由 Fabio Estevam 提交于
When testing the FEC driver on a mx6solox we noticed that the TDAR bit gets always cleared prior then the READY bit is cleared in the last BD, which causes FEC packets reception to always fail. As explained by Ye Li: "The TDAR bit is cleared when the descriptors are all out from TX ring, but on mx6solox we noticed that the READY bit is still not cleared right after TDAR. These are two distinct signals, and in IC simulation, we found that TDAR always gets cleared prior than the READY bit of last BD becomes cleared. In mx6solox, we use a later version of FEC IP. It looks like that this intrinsic behaviour of TDAR bit has changed in this newer FEC version." Fix this by polling the READY bit of BD after the TDAR polling, which covers the mx6solox case and does not harm the other SoCs. No performance drop has been noticed with this patch applied when testing TFTP transfers on several boards of different i.mx SoCs. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NMarek Vasut <marex@denx.de>
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由 Fabio Estevam 提交于
mx6solox has a requirement for 64 bytes alignment for RX DMA transfer. Other SoCs work with the standard 32 bytes alignment. Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers, which addresses the needs from mx6solox and also works for the other SoCs. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NMarek Vasut <marex@denx.de>
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由 Albert ARIBAUD 提交于
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由 Albert ARIBAUD 提交于
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- 05 9月, 2014 25 次提交
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由 Ajay Kumar 提交于
Enable drivers for FIMD, DP and parade bridge chip. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Ajay Kumar 提交于
This patch adds DT properties for fimd and the parade bridge chip present on peach_pit. The panel supports 1366x768 resolution. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Tested-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Ajay Kumar 提交于
Add initialization code for peach_pit panel, parade bridge chip, and backlight. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Tested-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Ajay Kumar 提交于
This patch adds missing declaration for gpio_direction_input function, thereby helps in resolving compilation warnings. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Vadim Bendebury 提交于
The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: NVadim Bendebury <vbendeb@chromium.org> Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Tested-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Ajay Kumar 提交于
On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Ajay Kumar 提交于
Add get_lcd_clk and set_lcd_clk callbacks for Exynos5420 needed by exynos video driver. Also, configure ACLK_400_DISP1 as the parent for MUX_ACLK_400_DISP1_SUB_SEL. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Tested-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Ajay Kumar 提交于
RPLL is needed to drive the LCD panel on Exynos5420 based boards. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Tested-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Ajay Kumar 提交于
Previously, we used to statically assign values for vl_col, vl_row and vl_bpix using #defines like LCD_XRES, LCD_YRES and LCD_COLOR16. Introducing the function exynos_lcd_early_init() would take care of this assignment on the fly by parsing FIMD DT properties, thereby allowing us to remove LCD_XRES and LCD_YRES from the main config file. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Tested-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 FUKAUMI Naoki 提交于
This patch adds support for Olimex A20-OLinuXino-LIME board. Signed-off-by: NFUKAUMI Naoki <naobsd@gmail.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Ian Campbell 提交于
Patch is the result of: sed -i -e 's/FTDFILE/FDTFILE/g' board/sunxi/Kconfig configs/* include/configs/sunxi-common.h sed -i -e 's/ftdfile/fdtfile/g' board/sunxi/Kconfig Reported-by: NVagrant Cascadian <vagrant@debian.org> Signed-off-by: NIan Campbell <ijc@hellion.org.uk> Acked-by: NHans de Goede <hdegoede@redhat.com> [ ijc -- s/Spotted-by/Reported-by/ and resolve conflict vs "remove redundant "SPL" from CONFIG_SYS_EXTRA_OPTIONS" ]
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由 Masahiro Yamada 提交于
CONFIG_SPL is defined as a primary option in Kconfig. It should not be added to CONFIG_SYS_EXTRA_OPTIONS. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Przemyslaw Marczak 提交于
This patch changes MPLL from 800MHz to 880MHz on Odroid. Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Masahiro Yamada 提交于
Inderpal's email address is not working any more. Chander will be a new maintainer. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Cc: Chander Kashyap <k.chander@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Przemyslaw Marczak 提交于
This config is valid for two devices: - Odroid X2, - Odroid U3. Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Przemyslaw Marczak 提交于
This is a standard description for Odroid boards. Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Przemyslaw Marczak 提交于
This board file supports standard features of Odroid X2 and U3 boards: - Exynos4412 core clock set to 1000MHz and MPLL peripherial clock set to 800MHz, - MAX77686 power regulator, - USB PHY, - enable XCL205 - power for board peripherials - check board type: U3 or X2. - enable Odroid U3 FAN cooler Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Przemyslaw Marczak 提交于
This change adds setup of environmental board info using get_board_name() and get_board_type() functions for config CONFIG_BOARD_TYPES. This is useful in case of running many boards with just one config. Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Przemyslaw Marczak 提交于
This change adds declaration of functions: - set_board_type() - called at board_early_init_f() - get_board_type() - called at checkboard() For supporting multiple board types in a one config - it is welcome to display the current board model. This is what get_board_type() should return. Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Przemyslaw Marczak 提交于
On an Odroid U3 board, the SOC is unable to reset the eMMC card in the DWMMC mode by the cpu software reset. Manual reset of the card by switching proper gpio pin - fixes this issue. Such solution needs to add a call to pre reset function. This is done by the reset_misc() function, which is called before reset_cpu(). The function reset_misc() is a weak function. Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Changes v4: - arch/arm/reset: fix weak function attribute to proper style Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Przemyslaw Marczak 提交于
This change enable automatic setting of dfu alt info on every boot. This is useful in case of booting one u-boot binary from multiple media. Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Przemyslaw Marczak 提交于
This change introduces new common function: - set_dfu_alt_info() - put dfu system and bootloader setting into $dfu_alt_info. functions declaration: - char *get_dfu_alt_system(void) - char *get_dfu_alt_boot(void) - void set_dfu_alt_info(void) and new config: - CONFIG_SET_DFU_ALT_INFO This function can be used for auto setting dfu configuration on boot. Such feature is useful for multi board support by one u-boot binary. Each board should define two functions: - get_dfu_alt_system() - get_dfu_alt_boot() Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Przemyslaw Marczak 提交于
It is possible to boot device using a micro SD or eMMC slots. In this situation, boot device should be registered as a block device 0 in the MMC framework, because CONFIG_SYS_MMC_ENV_DEV is usually set to "0" in the most config cases. Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Przemyslaw Marczak 提交于
This patch introduces code clean-up for exynos boot mode check. It includes: - removal of typedef: boot_mode - move the boot mode enum to arch-exynos/power.h - add bootmode for sequence: eMMC 4.4 ch4 / SD ch2 - add new function: get_boot_mode() for OM[5:1] pin check - update spl boot code Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Changes v5: - exynos: boot mode: add missing bootmode (1st:EMMC 4.4 / 2nd:SD ch2) Changes v6: - none changes v7: - change boot mode name: BOOT_MODE_MMC to BOOT_MODE_SD Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Przemyslaw Marczak 提交于
This change fixes the bad gpio configuration for the exynos dwmmc. Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Cc: Beomho Seo <beomho.seo@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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