Fix the offset for the USB clock registers
Signed-off-by: NDan Murphy <dmurphy@ti.com>

To make managing the environment easier, add DFUARGS to
CONFIG_EXTRA_ENV_SETTINGS.  Then we set DFUARGS down in the DFU part of
the file, and include (or not) the NAND part, based on if NAND is set.
Signed-off-by: NTom Rini <trini@ti.com>

Add SPL U-Boot support to replace x-loader on the Compulab cm_t35
board. Currently only the 256MiB SDRAM board versions are supported.

Tested by booting via MMC and NAND.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: NIgor Grinberg <grinberg@compulab.co.il>

The Head acoustics (HA) baseboard used the Technexion TAO3530 SOM
and has only some minor differences to the Technexion Thunder baseboard.
This patch adds support for this HA baseboard / TAO3530 as the "omap3_ha"
build target.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
Cc: Tom Rini <trini@ti.com>

Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
Cc: Tom Rini <trini@ti.com>

The memory size is autodetected and is passed to the Linux kernel
either via ATAGs or device-tree (dtb). So there is no need to
pass it via the bootargs.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
Cc: Tom Rini <trini@ti.com>

Add SPL support for the Technexion TAO3530 SOM to replace
x-loader. Tested with the Thunder baseboard. Currently this is
only tested with the TAO3530 SOM revision (Ax/Bx).

Tested by booting via MMC and NAND.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
Cc: Tom Rini <trini@ti.com>

Add support for TechNexion TAO3530 SoM

This patch has been posted quite a long time ago. I ported it to
the latest mainline U-Boot version. With some additional cleanup
and enhancements.
Signed-off-by: NTapani Utriainen <tapani@technexion.com>
CC: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
Cc: Tom Rini <trini@ti.com>

With the current scenario SPL size is being overlapped with the public
stack and not allowing any OMAP4 device to boot. So the suggestion came
up was to move the TEXT_BASE down to non-HS limit. Fixing the same and
also moving the SRAM_SCRATCH_SPACE_ADDR up to the end of image
downloadable area.
Discussion on this can be seen here:
https://www.mail-archive.com/u-boot@lists.denx.de/msg127147.html

Tested on OMAP4460 PANDA.
Reported-by: NChao Xu <caesarxuchao@gmail.com>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Test on Beaglebone white over cpsw, usb ether and SD card (read and
write), performance increased, crc32 of data matches.
Signed-off-by: NTom Rini <trini@ti.com>

The standalone programs do not use the api calls, but rely
directly on u-boot variable gd->jt for the jump table. Commit
fe1378a9 - "ARM: use r9 for gd" changed the register holding
the address of gd, but the assembly code in the standalone
examples was not updated accordingly. This broke the programs
on ARM relying on the jumptable in the v2013.10 release.
This patch unbricks them by using the correct register.

Cc: Michal Simek <monstr@monstr.eu>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: NJeroen Hofstee <jeroen@myspectrum.nl>

Revert commit 0f5141e9 which causes boards starting in
FLASH to try and write to a FLASH location.
Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>

Conflicts:
	board/samsung/trats2/trats2.c
	include/configs/exynos5250-dt.h
Signed-off-by: NTom Rini <trini@ti.com>

Conflicts:
	arch/arm/cpu/armv7/rmobile/Makefile
	doc/README.scrapyard

Needed manual fix:
	arch/arm/cpu/armv7/omap-common/Makefile
	board/compulab/cm_t335/u-boot.lds

Signed-off-by: NIan Campbell <ijc@hellion.org.uk>
Cc: albert.u.boot@aribaud.net

Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

We want to test SPI flash code in the sandbox, so enable the new drivers and
the 'sf test' command.

This command is used to validate the sandbox SPI / SPI flash implementation,
so enable it.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>

This adds a SPI flash driver which simulates SPI flash clients.
Currently supports the bare min that U-Boot requires: you can
probe, read, erase, and write.  Should be easy to extend to make
it behave more exactly like a real SPI flash, but this is good
enough to merge now.

sjg@chromium.org added a README and tidied up code a little.
Added a required map_sysmem() for sandbox.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>

This adds a SPI framework for people to hook up simulated SPI clients.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>

This was obtained from Linux 3.12 commit 5e01dc7b26.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This allows us to put the SPI flash chip inside the SPI interface node,
with U-Boot finding the correct bus and chip select automatically.
Signed-off-by: NSimon Glass <sjg@chromium.org>

The new name is longer but more clearly related to sandbox.

This is in a separate patch within the same series since some comments on the
SPI series rely on it.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NHung-ying Tyan <tyanh@chromium.org>

Add support for USB-A9263 board manufactured by Calao Systems
(http://www.calao-systems.com/).
Code is based on old U-Boot sources (2010.09) released by Calao.
Signed-off-by: NMateusz Kulikowski <mateusz.kulikowski@gmail.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

enable support for the siemens AT91SAM9G20 based board corvus.
Signed-off-by: NBoris Schmidt <boris.schmidt@siemens.com>
Reviewed-by: NHeiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

enable support for the siemens AT91SAM9G20 based boards taurus
and axm.
Signed-off-by: NRoger Meier <r.meier@siemens.com>
Reviewed-by: NHeiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Jens Scharsig (BuS Elektronik)<esw@bus-elektronik.de>
Tested-by: Jens Scharsig (BuS Elektronik)<esw@bus-elektronik.de>
Acked-by: NScott Wood <scottwood@freescale.com>

In order to get the very same value for legacy pin definitions and new gpio
definitions set the legacy PIN_BASE to 0.
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

This patch define new names for GPIO pins on at91 devices. Follow up patches
will convert the whole infrastructure to use these new definitions.
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Tested-by: NBo Shen <voice.shen@atmel.com>

Faraday FTSDC021 is a controller which is compliant with
SDHCI v3.0, SDIO v2.0 and MMC v4.3.

However this driver is only verified with SD memory cards.
Signed-off-by: NKuo-Jung Su <dantesu@faraday-tech.com>
Acked-by: NPantelis Antoniou <panto@antoniou-consulting.com>
CC: Andy Fleming <afleming@gmail.com>

Existing eSDHC SPL framework assumes booting from sd-image
with boot_format header which contains final u-boot Image
offset and size. No such header is present in case of
corenet devices like T1040 as corenet deivces use PBI-RCW
based intialization.

So, for corenet deives, SPL bootloader use values provided
at compilation time. These values can be defined in board
specific config file.
Signed-off-by: NPriyanka Jain <Priyanka.Jain@freescale.com>
Acked-by: NPantelis Antoniou <panto@antoniou-consulting.com>

If platform provides "host->fifoth_val" it will be used for
initialization of DWMCI_FIFOTH register. Otherwise default value will be
used.

This implementation allows:
 * escape unclear and recursive calculations that are currently in use
 * use whatever custom value for DWMCI_FIFOTH initialization if any
particular SoC requires it
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>

Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Amar <amarendra.xt@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Andy Fleming <afleming@freescale.com>
Acked-by: NJaehoon Chung <jh80.chung@samsung.com>
Acked-by: NPantelis Antoniou <panto@antoniou-consulting.com>

dw-mmc.c is the general driver file.
So, remove the exynos specific code at dw-mmc.c.
Instead, exynos specific cod can be move into exynos-dw_mmc.c.
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Acked-by: NAlexey Brodkin <abrodkin@synopsys.com>
Acked-by: NPantelis Antoniou <panto@antoniou-consulting.com>
Acked-by: NMinkyu Kang <mk7.kang@samsung.com>

Current LDS files /DISCARD/ a lot of sections when linking ELF
files, causing diagnostic tools such as readelf or objdump to
produce partial output. Keep all section at link stage, filter
only at objcopy time so that .bin remains minimal.
Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
Reviewed-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>

The lower 5 bit of MVBAR is UNK/SBZP.
So, Monitor Vector Base Address must be 32-byte aligned.
On the other hand, the secure monitor handler does not need
32-byte alignment.

This commit moves ".algin 5" directive to the correct place.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Andre Przywara <andre.przywara@linaro.org>
Acked-by: NAndre Przywara <andre.przywara@linaro.org>