DEVDISRn registers provides a mechanism for gating clocks of IP blocks
that are not used. Here we implement hwconfig option to allow users
to disable unused peripherals on the board.

For ex. If eSDHC/qDMA/eDMA are unused and with disabled status in dts,
User can enable CONFIG_FSL_DEVICE_DISABLE and set "devdis:esdhc,qdma,edma"
in hwconfig, thus ESDHC controller & eDMA/qDMA will be clock gated to
save more power.
Signed-off-by: NZhuoyu Zhang <Zhuoyu.Zhang@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

Move config for the E1000 Ethernet driver to Kconfig and tidy up affected
boards.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Signed-off-by: NTang Yuantian <Yuantian.Tang@freescale.com>
Acked-by: NAlison Wang <alison.wang@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

Enable bootscript support in secure boot for establishing
chain of trust on LS1021atwr.
Signed-off-by: NGaurav Rana <gaurav.rana@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

For ls1021a, Reserve secure code in to memory in case OCRAM
is needed by other usage.
Signed-off-by: NZhuoyu Zhang <Zhuoyu.Zhang@freescale.com>
Acked-by: NAlison Wang <alison.wang@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

Enable USB IP support for both EHCI and XHCI for
ls1021atwr platform
Signed-off-by: NRamneek Mehresh <ramneek.mehresh@freescale.com>

Base on PSCI services, implement CPU_ON/CPU_OFF for ls102xa platform.

Tested on LS1021AQDS, LS1021ATWR.
Test CPU hotplug times: 60K
Test kernel boot times: 1.2K
Signed-off-by: NWang Dongsheng <dongsheng.wang@freescale.com>
Acked-by: NAlison Wang <alison.wang@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

Enable Driver Model SPI for ls1021atwr board.
DSPI and QSPI only be enabled when boot from QSPI.
DSPI and QSPI are compatible under Driver Model SPI.
Signed-off-by: NHaikun Wang <Haikun.Wang@freescale.com>
Tested-by: NReview Code-CDREVIEW <CDREVIEW@freescale.com>
Tested-by: NHaikun Wang <haikun.wang@freescale.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: NJagan Teki <jteki@openedev.com>

This sets the default commands Kconfig to match
include/config_cmd_default.h commands in the common/Kconfig and removes
them from include/configs.
Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>
[trini: rastaban, am43xx_evm_usbhost_boot, am43xx_evm_ethboot updates]
Signed-off-by: NTom Rini <trini@konsulko.com>

Some archs/boards specify their own default by pre-defining the config
which causes the Kconfig system to mix up the order of the configs in
the defconfigs... This will cause merge pain if allowed to proliferate.

Remove the configs that behave this way from the archs.

A few configs still remain, but that is because they only exist as
defaults and do not have a proper Kconfig entry. Those appear to be:

SPIFLASH
DISPLAY_BOARDINFO
Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>
[trini: rastaban, am43xx_evm_usbhost_boot, am43xx_evm_ethboot updates,
drop DM_USB from MSI_Primo81 as USB_MUSB_SUNXI isn't converted yet to DM]
Signed-off-by: NTom Rini <trini@konsulko.com>

CONFIG_NET_MULTI is not used anywhere and thus can safely be removed
from the configs.
Acked-by: NMarek Vasut <marex@denx.de>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NLars Poeschel <poeschel@lemonage.de>

This also selects CONFIG_NET for any CONFIG_CMD_NET board.

Remove the imx default for CONFIG_NET.

This moves the config that was defined by 60296a83 (commands: add more
command entries in Kconfig).
Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>

ccsr_ddr structure is already defined in fsl_immap.h. Remove
this duplicated define. Move fixed timing into ls1021atwr.h.
Signed-off-by: NYork Sun <yorksun@freescale.com>
CC: Alison Wang <alison.wang@freescale.com>
Acked-by: NAlison Wang <alison.wang@freescale.com>

The original load address of U-Boot is 0x67f80000. The address
space of NOR flash is 0x60000000 to 0x67ffffff. It will cause
the size of u-boot couldn't be larger than 512K. As more features
are supported in u-boot, the size of u-boot is larger than 512K.

To fix this issue, the load address of U-Boot for NOR boot is
adjusted to 0x60100000.

In RCW, the PBI command needs to change as follows:
 .pbi
-write 0xee0200, 0x67f80000
+write 0xee0200, 0x60100000
 .end
Signed-off-by: NAlison Wang <alison.wang@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

Some SoCs have more than two I2C busses. Instead of adding ifdef
to the driver, macros are put into board header file where
CONFIG_SYS_I2C_MXC is defined.
Signed-off-by: NYork Sun <yorksun@freescale.com>
CC: Heiko Schocher <hs@denx.de>

The patch enables and adds PCIe settings for boards LS1021AQDS
and LS1021ATWR.
Signed-off-by: NMinghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

This patch adds LPUART support for LS1021ATWR board.
For ls1021atwr_nor_lpuart_defconfig, LPUART is used as the console.
Signed-off-by: NAlison Wang <alison.wang@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

LS1 has 4 SMMUs for address translation of the masters. All the
SMMUs' stream IDs are 8-bit. The address translation depends on the
stream ID of the incoming transaction.
Each master has unique stream ID assigned to it and is configurable
through SCFG registers. The stream ID for the masters is identical
and share the same register field of STREAM ID registers.
Signed-off-by: NXiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

The Central Security Unit (CSU) allows secure world software to
change the default access control policies of peripherals/bus
slaves, determining which bus masters may access them. This
allows peripherals to be separated into distinct security domains.
Combined with SMMU configuration of the system masters privileges,
these features provide protection against indirect unauthorized
access to data.

For now we configure all the peripheral access permissions as R/W.
Signed-off-by: NXiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

Enable hypervisors utilizing the ARMv7 virtualization extension
on the LS1021A-QDS/TWR boards with the A7 core tile, we add the
required configuration variable.
Signed-off-by: NXiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

This patch adds QSPI boot support for LS1021AQDS/TWR board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then the booting will start from QSPI memory space.
Signed-off-by: NAlison Wang <alison.wang@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

The SD/NAND/QSPI boot definations are wrong for QE support, this
patch is to fix this error.
Signed-off-by: NAlison Wang <alison.wang@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

This patch will fix the bug that the partitions on the SD card could
not be accessed and add the support for the FAT fs.
Signed-off-by: NAlison Wang <alison.wang@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

This patch adds SD boot support for LS1021ATWR board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from SD card to DDR, finally SPL transfer control to u-boot.
Signed-off-by: NChen Lu <chen.lu@freescale.com>
Signed-off-by: NAlison Wang <alison.wang@freescale.com>
Signed-off-by: NJason Jin <jason.jin@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

The patch changes PCIe dts node status to 'disabled' if the
corresponding controller is disabled according to serdes protocol.
Signed-off-by: NMinghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

SystemID information could be read through I2C1 from EEPROM
on LS1021ATWR board.

As LS1 is a little-endian processor, getting the version ID by
be32_to_cpu() is wrong. Fix it by using e.version directly.
This change will be compatible for both ARM and PowerPC.

As there is an errata that I2C1 could not work in SD boot,
reading EEPROM through I2C1 is disabled too in SD boot.
Signed-off-by: NAlison Wang <alison.wang@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

Add define CONFIG_SYS_WRITE_SWAPPED_DATA.
For LS1021AQDS and LS1021QTWR nor flash write should swap the
bytes when handle unaligned tail bytes.

Because of the ending, if the date bus width is 16-bits and the
number of bytes is odd, we should swap the byte when write the
last one.
Signed-off-by: NYuan Yao <yao.yuan@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

Since commit 0defddc8 (config: Add a default CONFIG_SYS_PROMPT),
each board header does not need to define CONFIG_SYS_PROMPT
as long as it uses the default prompt "=> ".
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

Signed-off-by: NZhao Qiang <B45475@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

CONFIG_SYS_HZ is always defined as 1000 in config_fallbacks.h
(but some boards still have redundant definitions).

This commit moves the definition and the document in README to
Kconfig.  Since lib/Kconfig can assure that CONFIG_SYS_HZ is 1000,
the sanity check in lib/time.c should be removed.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: NMarek Vasut <marex@denx.de>

Signed-off-by: NRuchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

Hardware accelerated support for SHA-1 and SHA-256 has been added.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256 for platforms which have CAAM block.
Signed-off-by: NRuchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

This patch adds the TWR_LCD_RGB card/HDMI options and the common
configuration for DCU on LS1021ATWR board.
Signed-off-by: NAlison Wang <alison.wang@freescale.com>

LS102xA is an ARMv7 implementation. This patch is to add
basic support for LS1021ATWR board.
 One DDR controller
 DUART1 is used as the console

For the detail board information, please refer to README.
Signed-off-by: NChen Lu <chen.lu@freescale.com>
Signed-off-by: NYuan Yao <yao.yuan@freescale.com>
Signed-off-by: NAlison Wang <alison.wang@freescale.com>

LS102xA is an ARMv7 implementation. This patch is to add
basic support for LS1021AQDS board.
 One DDR controller
 DUART1 is used as the console

For the detail board information, please refer to README.
Signed-off-by: NAlison Wang <alison.wang@freescale.com>
Signed-off-by: NJason Jin <jason.jin@freescale.com>
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NYuan Yao <yao.yuan@freescale.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>