Building the SPL in Thumb mode saves roughly 30% in size of the
resulting SPL binary. As the size of SPL it limited on the MX6,
this helps a lot.
Signed-off-by: NMarek Vasut <marex@denx.de>
Acked-by: NTim Harvey <tharvey@gateworks.com>

The COL field value cannot be easily calculated from the desired
column number. Instead, there are special cases for that, see the
datasheet, MMDCx_MDCTL field description, field COL . Cater for
those special cases.
Signed-off-by: NMarek Vasut <marex@denx.de>

The MX6 DRAM controller can be configured to handle 4GiB of DRAM, but
only 3840 MiB of that can be really used. In case the controller is
configured to operate a 4GiB module, the imx_ddr_size() function will
correctly compute that there is 4GiB of DRAM in the system. Firstly,
the return value is 32-bit, so the function will effectively return
zero. Secondly, the MX6 cannot address the full 4GiB, but only 3840MiB
of all that. Thus, clamp the returned size to 3840MiB in such case.
Signed-off-by: NMarek Vasut <marex@denx.de>
Acked-by: NTim Harvey <tharvey@gateworks.com>

Fix the name of the CCM CHSCCDR register.
Signed-off-by: NMarek Vasut <marex@denx.de>

Currently I don't have access to a mx31pdk board.

Magnus was the original maintainer of the board and accepted to take back
this role.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NMagnus Lilja <lilja.magnus@gmail.com>
Acked-by: NStefano Babic <sbabic@denx.de>

This allows u-boot to load different OS or Bare Metal application on
different cores of the i.MX6 SoC.
For example: running Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1.
Signed-off-by: NGabriel Huau <contact@huau-gabriel.fr>
Acked-by: NStefano Babic <sbabic@denx.de>

On MarS usdhc3 is eMMC, on RIoT usdhc3 is uSD and eMMC is usdhc4.

Don't run the MarS specific eMMC reset code on usdhc3 when
board_type == BOARD_IS_RIOTBOARD
Signed-off-by: NIain Paton <ipaton0@gmail.com>

aristainetos board was merged in u-boot-imx before
Kconfig was integrated, but it is not yet
mainline.
Signed-off-by: NStefano Babic <sbabic@denx.de>
CC: Heiko Schocher <hs@denx.de>
Acked-by: NHeiko Schocher <hs@denx.de>

Conflicts:
	boards.cfg
Signed-off-by: NStefano Babic <sbabic@denx.de>

Enable CONFIG_SYS_GENERIC_BOARD for the i.MX31 PDK board.

Tested on actual hardware.
Signed-off-by: NMagnus Lilja <lilja.magnus@gmail.com>
Acked-by: NFabio Estevam <fabio.estevam@freescale.com>

It is redundant to use 'PFUZE100_PMIC' as the PMIC name because we already
know it is a PMIC.

Call it simply 'PFUZE100' instead.

Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Markus Niebel <Markus.Niebel@tq-group.com>
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

According to the Reference Manual the 'mask_periph2_clk_sel_loaded' field of
register CCM_CIMR corresponds to bit 19 so fix its definition accordingly.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

According to the Reference Manual the 'wb_per_at_lpm' field of register
CCM_CLPCR corresponds to bit 16 so fix its definition accordingly.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

According to the Reference Manual the 'spdif0_clk_podf' field of register
CCM_CDCDR corresponds to bits 22, 23 and 24, so fix the mask and offset
definitions accordingly.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

'omux' field is not used anywhere and such layout is not valid for mx6solox.

Instead of adding more ifdef's into the structure, let's simply remove this
unused 'omux' field.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NStefano Babic <sbabic@denx.de>

A previous update to the I2C stack introduced a typo in the
configuration option. Fix the typo and therefore allow the
RTC to work correctly with the 'date' command again.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Signed-off-by: NTom Rini <trini@ti.com>

Messages to afleming@freescale.com now bounce, and should be
directed to my personal address at afleming@gmail.com
Signed-off-by: NAndy Fleming <afleming@gmail.com>

The _config part is gone for sure, the _defconfig target could at least
work. I have not verified this for all targets though.

It's easier to Cc Masahiro on Kconfig-related changes with a git-mailrc
alias.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

Reflect the latest build system to doc/README.SPL.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

This document is too old and useless.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

if status register do never set MXC_CSPICTRL_TC, spi_xchg_single
endless loops. Add a timeout here to prevent endless hang.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Cc: Dirk Behme <dirk.behme@gmail.com>
Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

This parameter should also be supported.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Tested-by: NAjay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

The SPI transaction delay is supposed to be measured from the end of one
transaction to the start of the next. The code does not work that way, so
fix it.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Tested-by: NAjay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

An incorrect message version is passed to the EC in some cases and the
parameters of one function are switched.

Fix these problems.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Tested-by: NAjay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

It's usually a common pattern to free() the memory that we allocated.
Implement this here to stop leaking memory.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

Add support for re-relocation malloc() in arm's start-up code.
Signed-off-by: NSimon Glass <sjg@chromium.org>

At present arm defines CONFIG_SYS_GENERIC_GLOBAL_DATA, meaning that
the global_data pointer is set up in board_init_f(). However it is
actually set up before this, it just isn't zeroed.

If we zero the global data before calling board_init_f() then we
don't need to define CONFIG_SYS_GENERIC_GLOBAL_DATA.

Make this change (on arm32 only) to simplify the init process. I
don't have the ability to test aarch64 yet.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NTom Rini <trini@ti.com>

This patch configures the qrio to trigger a core reset on
a CPU reset request.
Signed-off-by: NRainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: NValentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

To acheive this, the qrio_uprstreq() function that sets the UPRSTREQN
flag in the qrio RESCNF reg is added.
Signed-off-by: NRainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: NValentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

Check the core timer status register (TSR) for watchdog reset,
and and set the QRIO's reset reason flag REASON1[0] accordingly.

This allows the appliction SW to identify the cpu watchdog as a
reset reason, by setting the REASON1[0] flag in the QRIO.
Signed-off-by: NRainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: NValentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

To achieve this, the qrio_cpuwd_flag() function that sets the CPU watchdog
flag in the REASON1 reg is added.
Signed-off-by: NRainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: NValentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

The booting of the board is now protected by the CPU watchdog.
A failure during the boot phase will end up in board reset.
Signed-off-by: NRainer Boschung <rainer.boschung@keymile.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

When CONFIG_WATCHDOG is defined the board initialization just performs
a WATCHDOG_RESET, an initialization of the watchdog is not done.
This has been modified fot the MPC85xx, the board initialization calls
its watchdog initialitzation allowing for full watchdog configuration
very early in the boot phase.
Signed-off-by: NRainer Boschung <rainer.boschung@keymile.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>