- 24 9月, 2014 2 次提交
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由 Nikita Kiryanov 提交于
Add support for M25PE16 and M25PX16 Cc: Marek Vasut <marex@denx.de> Acked-by: NMarek Vasut <marex@denx.de> Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il> Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>
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由 Simon Glass 提交于
The list is supposed to be terminated with a NULL name, but is not. If a board probes a chip which does not appear in the table, U-Boot will crash (at least on sandbox). Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 09 6月, 2014 1 次提交
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Added support for Spansion chip "S25FL512S_512K". Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>
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- 18 3月, 2014 2 次提交
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由 Marek Vasut 提交于
Add IDs for this new chip. Signed-off-by: NMarek Vasut <marex@denx.de> Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>
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由 Marek Vasut 提交于
Both of these chips have 256kB big sectors, thus the _256K suffix, compared to their _64K counterparts, which have 64kB sectors. Also, they have four times less sectors than their _64K counterparts. Signed-off-by: NMarek Vasut <marex@denx.de> Tested-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>
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- 13 1月, 2014 1 次提交
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Remove the flag SECT_4K for device N25Q128 as the 4K-byte sub sector erase granularity is available only for top/bottom 8 sectors in some of the N25Q128 chips. Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>
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- 11 1月, 2014 2 次提交
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Added macronix flash quad read/write commands support and it's up to the respective controller driver usecase to configure the respective commands by defining SPI RX/TX operation modes from include/spi.h on the driver. Signed-off-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>
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Moved the flash params table from sf_probe.c and placed on to sf_params.c, hence flash params file will alter based on new addons. Signed-off-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>
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