- 16 8月, 2017 5 次提交
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由 Simon Glass 提交于
We are now using an env_ prefix for environment functions. Rename these commonly used functions, for consistency. Also add function comments in common.h. Suggested-by: NWolfgang Denk <wd@denx.de> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
We are now using an env_ prefix for environment functions. Rename setenv() for consistency. Also add function comments in common.h. Suggested-by: NWolfgang Denk <wd@denx.de> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Use the env_save() function directly now that there is only one implementation of saveenv(). Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NWolfgang Denk <wd@denx.de> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
This is a strange name for a function that loads the environment. There is now only one implementation of this function, so use the new env_load() function directly instead. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
At present we support multiple environment drivers but there is not way to select between them at run time. Also settings related to the position and size of the environment area are global (i.e. apply to all locations). Until these limitations are removed we cannot really support more than one environment location. Adjust the location to be a choice so that only one can be selected. By default the environment is 'nowhere', meaning that the environment exists only in memory and cannot be saved. Also expand the help for the 'nowhere' option and move it to the top since it is the default. Signed-off-by: NSimon Glass <sjg@chromium.org> [trini: Move all of the imply logic to default X if Y so it works again] Signed-off-by: NTom Rini <trini@konsulko.com>
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- 15 8月, 2017 2 次提交
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由 Simon Glass 提交于
At present we have three states for the environment, numbered 0, 1 and 2. Add an enum to record this to avoid open-coded values. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
About a quarter of the files in common/ relate to the environment. It seems better to put these into their own subdirectory and remove the prefix. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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- 14 8月, 2017 1 次提交
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由 xypron.glpk@gmx.de 提交于
If CONFIG_MMC_DW is not defined the return value of init_dwmmc should not rely on a random stack value. Instead indicate that no error occured. The problem was indicated by cppcheck. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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- 13 8月, 2017 6 次提交
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由 Philipp Tomsich 提交于
With SPL_LDSCRIPT moved to Kconfig (and this being a 'string' config node), all the lingering definitions in header files will cause warnings/errors due to the redefinition of the configuration item. As we don't want to pollute the defconfig files (and values should usually be identical for entire architectures), the defaults are moved into Kconfig. Kconfig will always pick the first default that matches, so please keep these values at the end of each file (to allow any board-specific Kconfig, which will be included earlier) to override with an unconditional default setting. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Andy Yan 提交于
As the debug uart is marked as dm-pre-reloc, the pinctrl driver will handle the correct iomux setting. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
There is no reasonably robust way (this will be needed so early that diagnostics will be limited) to specify the base-address of the secure timer through the DTS for TPL and SPL. In order to allow us a cleaner way to structure our SPL and TPL stage, we now move to a DM timer driver. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Klaus Goger 提交于
prefix the bl31 firmware needed to build uboot.itb so it can coexist in the build area with ATFs from other boards (i.e. lion_rk3368) Signed-off-by: NKlaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
The ITS file generated warnings due to @<num> designations in the naming which cause DTC to complain as follows: Warning (unit_address_vs_reg): Node /images/uboot@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /images/atf@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /images/pmu@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /images/fdt@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /configurations/conf@1 has a unit name, but no reg property This removes the @<num> part from the names, as we only have a single image for each payload aspect (and only a single configuration) anyway. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
The RK3368-uQ7 (codenamed 'Lion') is a micro-Qseven (40mm x 70mm, MXM-230 edge connector compatible with the Qseven specification) form-factor system-on-module based on the octo-core Rockchip RK3368. It is designed, supported and manufactured by Theobroma Systems. It provides the following features: - 8x Cortex-A53 (in 2 clusters of 4 cores each) - (on-module) up to 4GB of DDR3 memory - (on-module) SPI-NOR flash - (on-module) eMMC - Gigabit Ethernet (with an on-module KSZ9031 PHY) - USB - HDMI - MIPI-DSI/single-channel LVDS (muxed on the 'LVDS-A' pin-group) - various 'slow' interfaces (e.g. UART, SPI, I2C, I2S, ...) Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 12 8月, 2017 1 次提交
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由 Derald D. Woods 提交于
This patch brings the OMAP3 EVM to a bootable state, on master, as of v2017.09-rc1. Signed-off-by: NDerald D. Woods <woods.technical@gmail.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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- 11 8月, 2017 3 次提交
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由 Simon Glass 提交于
This converts the following to Kconfig: CONFIG_CMD_MAX6957 Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Cooper Jr., Franklin 提交于
Traditional KS2 devices supported NAND via the AEMIF peripheral. However, 66AK2G doesn't use the AEMIF but rather the GPMC for NAND. Therefore, clarify some statements to indicate only certain devices have AEMIF and in other places just say NAND instead of AEMIF NAND Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com> Acked-by: NRoger Quadros <rogerq@ti.com>
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由 Adam Ford 提交于
The 512 MB DDR version of SOM's use CS0 and CS1. CS1 is not correctly setup in the pin muxing. This causes erratic behavior on suspend/resume This fix has been tested on both 256 and 512 MB DDR versions. Signed-off-by: NAdam Ford <aford173@gmail.com>
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- 10 8月, 2017 6 次提交
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由 Hou Zhiqiang 提交于
The implementation of function set_pcie_ns_access() uses a wrong argument. The structure array ns_dev has a member 'ind' which is initialized by CSU_CSLX_*. It should use the 'ind' directly to address the PCIe's CSL register (CSL_base + CSU_CSLX_PCIE*). Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> [YS: Revise commit message] Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Santan Kumar 提交于
IFC and QSPI are muxed on board. Add fsl_fdt_fixup_flash() to disable IFC node in dts if QSPI is enabled, or disable QSPI node in dts if otherwise. Signed-off-by: NSantan Kumar <santan.kumar@nxp.com> Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com> [YS: Revise commit message] Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Hou Zhiqiang 提交于
Function enable_layerscape_ns_access() is alreayd called soc-wide. Remove duplicated calling from individual boards. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> [YS: Add commit message] Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Santan Kumar 提交于
Function config_board_mux() reads env variable 'hwconfig' which is only available after relocation for QSPI boot. Move calling config_board_mux() to misc_init_r(). Signed-off-by: NSantan Kumar <santan.kumar@nxp.com> [YS: Revise commit message] Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Santan Kumar 提交于
Smart voltage translator is removed from LS2080ARDB/LS2088ARDB RevF boards. It is only used on LS2081ARDB. Programming GPIO is only required for LS2081ARDB. Signed-off-by: NSantan Kumar <santan.kumar@nxp.com> Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com> [YS: Revise commit message] Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Qianyu Gong 提交于
Update the default core frequency to 1800MHZ for best performance under SD boot and eMMC boot. Signed-off-by: NGong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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- 09 8月, 2017 1 次提交
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由 Adam Ford 提交于
The driver is for all boards 24XX and up, so let's eliminate the extra option called CONFIG_SYS_I2C_OMAP34XX since the driver checks for CONFIG_OMAP34XX we don't need CONFIG_SYS_I2C_OMAP34XX. Signed-off-by: NAdam Ford <aford173@gmail.com> Reviewed-by: NHeiko Schocher <hs@denx.de>
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- 08 8月, 2017 4 次提交
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由 Stefan Roese 提交于
This defconfig uses the PCIe x4 binary blobs from the congatec BIOS. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Stefan Roese 提交于
This patch adds the infrastructure to define different config headers with different configurations and default environment for the baseboards that can now be selected via Kconfig. The new configuration for the theadorable-x86-conga-qa3-e3845 is also added. Also the new defconfig file for this new target is added. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Stefan Roese 提交于
This patch adds the infrastructure to define different config headers with different configurations and default environment for the baseboards that can now be selected via Kconfig. The new configuration for the theadorable-x86-dfi-bt700 is also added. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Marek Behún 提交于
The I2C reading in the PEX vs SATA detection code often fails on the first try. Try three times, as the code for EEPROM reading does. Signed-off-by: NMarek Behun <marek.behun@nic.cz> Signed-off-by: NStefan Roese <sr@denx.de>
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- 05 8月, 2017 9 次提交
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Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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Update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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To support driver model and device tree, use the SPI-flash-based AT45xxx DataFlash driver, DataFlash is a kind of SPI flash. Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will be removed in the future. Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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To support driver model and device tree, use the SPI-flash-based AT45xxx DataFlash driver, DataFlash is a kind of SPI flash. Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will be removed in the future. Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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To support driver model and device tree, use the SPI-flash-based AT45xxx DataFlash driver, DataFlash is a kind of SPI flash. Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will be removed in the future. Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 04 8月, 2017 1 次提交
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由 Tom Rini 提交于
The logic of what fdt_get_base_address() will search for and return has changed. Rework get_phys_ccsrbar_addr_early() to perform the logic that fdt_get_base_address used to perform. Fixes: 336a4487 ("fdt: Correct fdt_get_base_address()") Reviewed-by: NSimon Glass <sjg@chromium.org> Cc: Alexander Graf <agraf@suse.de> Signed-off-by: NTom Rini <trini@konsulko.com>
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- 03 8月, 2017 1 次提交
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由 Marek Vasut 提交于
Add initial support for the R8A7795 and R8A7796 based ULCB board. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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