- 15 8月, 2021 3 次提交
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由 Heinrich Schuchardt 提交于
Adjust the Latex formatting to match Linux v5.13.1: * add Latex margins * reformat the code in doc/conf.py to match Linux Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Heinrich Schuchardt 提交于
Require Sphinx 2.44 to build the documentation. Remove all code related to earlier versions. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Heinrich Schuchardt 提交于
tools/Makefile uses pkg-config. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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- 13 8月, 2021 4 次提交
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https://source.denx.de/u-boot/custodians/u-boot-x86由 Tom Rini 提交于
- Enable SeaBIOS support for Crown Bay - Update SeaBIOS build instructions in the x86 doc - Enable CONFIG_SPI_FLASH_SMART_HWCAPS for Crown Bay
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由 Bin Meng 提交于
Now that the spi-nor fix has been made in u-boot/master via: commit 87e7219f ("mtd: spi-nor: Respect flash's hwcaps in spi_nor_adjust_hwcaps()") enable CONFIG_SPI_FLASH_SMART_HWCAPS on Intel Crown Bay again. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
Update SeaBIOS build instructions using exact command that involves "make olddefconfig", and mention SeaBIOS release 1.14.0 has been used for testing. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
Enable SeaBIOS support for any kernel that requires legacy BIOS services. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 12 8月, 2021 11 次提交
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https://source.denx.de/u-boot/custodians/u-boot-rockchip由 Tom Rini 提交于
- Add Rockchip SFC driver support; - DTS sync from kernel; - emmc hs400 support for rk3399; - Fix for spinore bootdevice and MMC boot order;
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由 Jon Lin 提交于
Make px30 SFC clock configurable Signed-off-by: NJon Lin <jon.lin@rock-chips.com> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Chris Morgan 提交于
The Odroid Go Advance uses a Rockchip Serial Flash Controller with an XT25F128B SPI NOR flash chip. This adds support for both. Note that while both the controller and chip support quad mode, only two lines are connected to the chip. Changing the pinctrl to bus2 and setting tx and rx lines to 2 for this reason. Signed-off-by: NChris Morgan <macromorgan@hotmail.com> Signed-off-by: NJon Lin <jon.lin@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Chris Morgan 提交于
Adds support for XT25F128B used on Odroid Go Advance. Unfortunately this chip uses a continuation code which I cannot seem to parse, so there are possibly going to be collisions with chips that use the same manufacturer/ID. Signed-off-by: NChris Morgan <macromorgan@hotmail.com> Signed-off-by: NJon Lin <jon.lin@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Chris Morgan 提交于
Add the serial flash controller to the devicetree for the PX30. Signed-off-by: NChris Morgan <macromorgan@hotmail.com> Signed-off-by: NJon Lin <jon.lin@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Chris Morgan 提交于
This patch adds support for setting the correct pin configuration for the Rockchip Serial Flash Controller found on the PX30. Signed-off-by: NChris Morgan <macromorgan@hotmail.com> Signed-off-by: NJon Lin <jon.lin@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Chris Morgan 提交于
This patch adds support for the Rockchip serial flash controller found on the PX30 SoC. It should work for versions 3-5 of the SFC IP, however I am only able to test it on v3. This is adapted from the WIP SPI-MEM driver for the SFC on mainline Linux. Note that the main difference between this and earlier versions of the driver is that this one does not support DMA. In testing the performance difference (performing a dual mode read on a 128Mb chip) is negligible. DMA, if used, must also be disabled in SPL mode when using A-TF anyway. Signed-off-by: NChris Morgan <macromorgan@hotmail.com> Signed-off-by: NJon Lin <jon.lin@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Johan Gunnarsson 提交于
Currently there are a few arm32 rockchip board configs that don't generate u-boot-rockchip.bin when running make because CONFIG_BINMAN is not enabled. This patch changes CONFIG_ARCH_ROCKCHIP to also select CONFIG_BINMAN if CONFIG_SPL and !CONFIG_ARM64. Example builds that don't generate u-boot-rockchip.bin without this patch: export ARCH=arm export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf- make kylin-rk3036_defconfig make export ARCH=arm export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf- make rock_defconfig make export ARCH=arm export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf- make tinker-rk3288_defconfig make Signed-off-by: NJohan Gunnarsson <johan.gunnarsson@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Peter Robinson 提交于
Sync the rk3368 DTs and associated bits from 5.14-rc1. Signed-off-by: NPeter Robinson <pbrobinson@gmail.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Peter Robinson 提交于
Sync the rk3328 DTs and associated bits from 5.14-rc1. Signed-off-by: NPeter Robinson <pbrobinson@gmail.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Peter Robinson 提交于
Sync the rk3399 DTs and associated bits from 5.14-rc1. Signed-off-by: NPeter Robinson <pbrobinson@gmail.com> (Remove the conflict content for vmarc-som) Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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- 11 8月, 2021 22 次提交
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https://source.denx.de/u-boot/custodians/u-boot-cfi-flash由 Tom Rini 提交于
- Some CFI flash related fixups (Kconfig & header) (Bin) - Enable CFI flash support on the QEMU RISC-V virt machine. (Bin)
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https://source.denx.de/u-boot/custodians/u-boot-marvell由 Tom Rini 提交于
- Convert GoFlex Home Ethernet and SATA to Driver Model (Tony) - mvebu: Automatically detect CONFIG_SYS_TCLK (Pavel) - mvebu: sata_mv: Fix HDD identication during cold start (Tony) - a37xx: pci: Fix handling PIO config error responses (Pavel) - Other minor misc changes and board maintainer updates
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https://source.denx.de/u-boot/custodians/u-boot-amlogic由 Tom Rini 提交于
- odroid-n2: fix fdtfile suffix for n2-plus - sei610 & meson64_android cleanups to prepare android 11 boot support - use Android BCB mechanism for reboot reason instead of HW reboot flag - Switch meson64_android boot flow to use abootimg for A/B, AVB and DTBO support
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由 peterwillcn 提交于
Remove the recommended MAC address from the network card. NanoPi R4S has a EEPROM attached to the 2nd I2C bus (U92), which stores the MAC address. Signed-off-by:
Xiaobo Tian <peterwillcn@gmail.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 peterwillcn 提交于
The host-index-min property is invalid, so it inherits from the sdmmc definition in dtsi. Signed-off-by:
Xiaobo Tian <peterwillcn@gmail.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 peterwillcn 提交于
Correct the LEDS label name and remove the board type prefix, which is actually unnecessary here, removes the redefined system status LED pin. Signed-off-by:
Xiaobo Tian <peterwillcn@gmail.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Yifeng Zhao 提交于
This enable hs400 and SDMA support for emmc on evb-rk3399. Signed-off-by: NYifeng Zhao <yifeng.zhao@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Yifeng Zhao 提交于
This patch adds support for the RK3568 platform to this driver. Signed-off-by: NYifeng Zhao <yifeng.zhao@rock-chips.com> Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Yifeng Zhao 提交于
Add clock, phy and other configuration, it is convenient to support new controller. Here a short summary of the changes: - Add mmc_of_parse to parse dts config. - Remove OF_PLATDATA related code. - Reorder header inclusion. - Add phy ops. - add ops set_ios_post to modify the parameters of phy when the clock changes. - Add execute tuning api for hs200 tuning. Signed-off-by: NYifeng Zhao <yifeng.zhao@rock-chips.com> Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Johan Jonker 提交于
In the Linux DT the file rk3xxx.dtsi is shared between rk3066 and rk3188. Both rk3xxx.dtsi and rk3188.dtsi have recently had some updates. For a future rk3066 support in U-boot this file must also update. Move U-boot specific things in a rk3188-radxarock-u-boot.dtsi file. Signed-off-by: NJohan Jonker <jbx6244@gmail.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Johan Jonker 提交于
In the Linux DT the file rk3xxx.dtsi is shared between rk3066 and rk3188. Both rk3xxx.dtsi and rk3188.dtsi have recently had some updates. For a future rk3066 support in U-boot this file must also update. Move U-boot specific things in a rk3188-u-boot.dtsi file. Signed-off-by: NJohan Jonker <jbx6244@gmail.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Johan Jonker 提交于
In order to update the DT for rk3188 sync the power domain dt-binding header. This is the state as of v5.12 in Linux. Signed-off-by: NJohan Jonker <jbx6244@gmail.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Johan Jonker 提交于
In the Linux DT the file rk3xxx.dtsi is shared between rk3066 and rk3188. This file has recently had some updates. For a future rk3066 support in U-boot this file must also update. Move U-boot specific things in a rk3xxx-u-boot.dtsi file. Signed-off-by: NJohan Jonker <jbx6244@gmail.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Johan Jonker 提交于
In order to update the DT for rk3066 and rk3188 sync the clock dt-binding header. This is the state as of v5.12 in Linux. Signed-off-by: NJohan Jonker <jbx6244@gmail.com> Reviewed-by: NHeiko Stuebner <heiko@sntech.de> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Artem Lapkin 提交于
Problem: board_spl_was_booted_from return wrong boot_devices[3] value /spi@ff1d0000 and same-as-spl dont work properly for SPINOR flash because arch/arm/mach-rockchip/spl-boot-order.c spl_node_to_boot_device need parse SPINOR flash node as UCLASS_SPI_FLASH spl-boot-order: same-as-spl > *** BOOT_SOURCE_ID 3 (2:emmc 3:spi 5:sd ... /spi@ff1d0000 > board_boot_order: could not map node @618 to a boot-device /sdhci@fe330000 > /mmc@fe320000 Solution: just change it to /spi@ff1d0000/flash@0 spl-boot-order: same-as-spl > *** BOOT_SOURCE_ID 3 (2:emmc 3:spi 5:sd ... /spi@ff1d0000/flash@0 > /sdhci@fe330000 > /mmc@fe320000 Signed-off-by: NArtem Lapkin <art@khadas.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Alex Bee 提交于
Basically all, i.e. rk3036.dtsi, rk3128.dtsi, rk3xxx.dtsi, rk322x.dtsi, rk3288.dtsi, rk3308-u-boot.dtsi, rk3328-u-boot.dtsi, rk3399-u-boot.dtsi and px30-u-boot.dtsi Rockchip SoC devicetrees which have mmc indexes are defining eMMC as mmc0 and sdmmc as mmc1. This means that the rule to try to boot from the SD card first is ignored, which as per comment is what we want and is important for distros, which rely on that. Fix this by setting the correct mmc index, i.e. first from mmc1 (SD card), second from mmc0 (eMMC). Signed-off-by: NAlex Bee <knaerzche@gmail.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Bin Meng 提交于
Enable support to the 2 NOR flashes on the QEMU RISC-V virt machine. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Bin Meng 提交于
Those embers wrapped with CONFIG_SYS_FLASH_CFI in struct flash_info_t are unconditionally used in the cfi_flash.c driver. Drop the #ifdefs in the definition of flash_info_t. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Bin Meng 提交于
The DM version CFI flash driver is in driver/mtd/cfi_flash.c, which only gets built when FLASH_CFI_DRIVER is on. If CFI_FLASH is on but FLASH_CFI_DRIVER is not, nothing is enabled at all. Fix this dependency by selecting FLASH_CFI_DRIVER when CFI_FLASH is enabled. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Tony Dinh 提交于
Change maintainer to me. Suriyan no longer has this board and wishes to see someone maintaining it actively. Signed-off-by: NTony Dinh <mibodhi@gmail.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Tony Dinh 提交于
Change maintainer to me. Eric no longer has this board and wishes to see someone maintaining it actively. Signed-off-by: NTony Dinh <mibodhi@gmail.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Pali Rohár 提交于
If ddr3_init() fails then DDR was not initialized and we cannot load and execute U-Boot. We cannot continue, we cannot do anything in this case, so hang. Signed-off-by: NPali Rohár <pali@kernel.org> Reviewed-by: NStefan Roese <sr@denx.de>
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