- 07 9月, 2016 15 次提交
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由 Andreas Dannenberg 提交于
Enable the platform-specific post-processing of FIT-extracted blobs such as Kernel, DTB, and initramfs on TI DRA7xx high-security (HS) devices which will ultimately invoke a ROM-based API call that performs secure processing such as blob authentication. Signed-off-by: NAndreas Dannenberg <dannenberg@ti.com> Signed-off-by: NAndrew F. Davis <afd@ti.com> Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Andreas Dannenberg 提交于
Enable the platform-specific post-processing of FIT-extracted blobs such as Kernel, DTB, and initramfs on TI AM43xx high-security (HS) devices which will ultimately invoke a ROM-based API call that performs secure processing such as blob authentication. Signed-off-by: NAndreas Dannenberg <dannenberg@ti.com> Signed-off-by: NAndrew F. Davis <afd@ti.com> Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Paul Kocialkowski 提交于
This reworks spl_set_header_raw_uboot to allow having both os boot (which comes with a valid header) and aborting when no valid header is found (thus excluding raw u-boot.bin images). Signed-off-by: NPaul Kocialkowski <contact@paulk.fr> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 John Keeping 提交于
When enabling a fixed regulator, it may take some time to rise to the correct voltage. If we do not delay here then subsequent operations will fail. Signed-off-by: NJohn Keeping <john@metanate.com> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Masahiro Yamada 提交于
Prior to this commit, the tool could not move options guarded by CONFIG_SPL_BUILD ifdef conditionals because they do not show up in include/autoconf.mk. This new option, if given, makes the tool parse spl/include/autoconf.mk instead of include/autoconf.mk, which is probably preferred behavior when moving options for SPL. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Masahiro Yamada 提交于
Currently, the tool gives up moving an option quietly if its entry was not found in Kconfig. If the option is not defined in the config header in the first place, it is no problem (as the Kconfig entry may have been hidden by reasonable "depends on"). However, if the option is defined in the config header, the missing Kconfig entry is a sign of possible behavior change. It is highly recommended to manually check if the option has been moved as expected. In this case, let's add "suspicious" in the log and change the log color (if --color option is given) to make it stand out. This was suggested by Tom in [1]. [1] http://lists.denx.de/pipermail/u-boot/2016-July/261988.htmlSigned-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Suggested-by: NTom Rini <trini@konsulko.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Masahiro Yamada 提交于
The sets feature is handier for adding unique elements. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Masahiro Yamada 提交于
Since commit cc008299 ("tools: moveconfig: do not rely on type and default value given by users"), we do not have this error case. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Beniamino Galvani 提交于
Remove the device definition from board file, update the driver with the new compatible property and update config with necessary options. Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Beniamino Galvani 提交于
Add a pin controller driver for Meson GXBB adapted from Linux kernel. Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Beniamino Galvani 提交于
Import DTS files and dt-bindings includes from Linux 4.8-rc1. Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Beniamino Galvani 提交于
In cases where the pins and groups definitions are in a sub-node, as: uart_a { mux { groups = "uart_tx_a", "uart_rx_a"; function = "uart_a"; }; }; pinctrl_generic_set_state_subnode() returns an error for the top-level node and pinctrl_generic_set_state() fails. Instead, return success so that the child nodes are tried. Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Andreas Bießmann 提交于
Commit 62afc601 introduced fpga image load via bootm but broke the OS check in fit_image_load(). This commit removes following compiler warning: ---8<--- In file included from tools/common/image-fit.c:1: /Volumes/devel/u-boot/tools/../common/image-fit.c:1715:39: warning: use of logical '||' with constant operand [-Wconstant-logical-operand] os_ok = image_type == IH_TYPE_FLATDT || IH_TYPE_FPGA || ^ ~~~~~~~~~~~~ /Volumes/devel/u-boot/tools/../common/image-fit.c:1715:39: note: use '|' for a bitwise operation os_ok = image_type == IH_TYPE_FLATDT || IH_TYPE_FPGA || ^~ | 1 warning generated. --->8--- Signed-off-by: NAndreas Bießmann <andreas@biessmann.org> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: NMichal Simek <michal.simek@xilinx.com>
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由 Alexander Graf 提交于
On the raspberry pi, you can disable the serial port to gain dynamic frequency scaling which can get handy at times. However, in such a configuration the serial controller gets its rx queue filled up with zero bytes which then happily get transmitted on to whoever calls getc() today. This patch adds detection logic for that case by checking whether the RX pin is mapped to GPIO15 and disables the mini uart if it is not mapped properly. That way we can leave the driver enabled in the tree and can determine during runtime whether serial is usable or not, having a single binary that allows for uart and non-uart operation. Signed-off-by: NAlexander Graf <agraf@suse.de> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Alexander Graf 提交于
So far we could only tell the gpio framework that a GPIO was mapped as input or output, not as alternative function. This patch adds support for determining whether a function is mapped as alternative. Signed-off-by: NAlexander Graf <agraf@suse.de> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NStephen Warren <swarren@wwwdotorg.org>
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- 06 9月, 2016 6 次提交
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由 Mugunthan V N 提交于
With commit ceec08f5, phy is connected to slave 0, but changing the phy node was missed, fix it by populating the phy node to proper cpsw slave node. Fixes: ceec08f5 ("ARM: dts: dra72-evm: Add mode-gpios entry for mac node") Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Cc: Vignesh R <vigneshr@ti.com> Tested-by: NTom Rini <trini@konsulko.com>
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由 Andre Przywara 提交于
Casting "int"s to pointers is only valid for 32-bit systems. Add the appropriate pointer type cast to avoid a compiler warning when compiling for AArch64. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Andre Przywara 提交于
There is no "CONFIG_MACH_SUN50I_A64" in upstream U-Boot, so fix the name to prevent the option to be enabled. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Andre Przywara 提交于
This commit moved the SPL stack into SRAM C, which worked when the SPL set the AHB1 clock down to 100 MHz to cope with the flaky SRAM C access from the CPU. However booting with boot0 (and thus not using SPL at all) we still run with a 200 MHz AHB1, so any access to SRAM C is prone to fail. Since this commit does _not_ only affect the SPL code, but also the U-Boot proper, we fail when booting with boot0. As the introduction of tiny-printf reduced the size of the SPL, we can afford to have the SPL stack in SRAM A1. This reverts commit 1a83fb4a and fixes booting the Pine64 when using boot0. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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- 03 9月, 2016 7 次提交
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由 Hans de Goede 提交于
The Orange Pi Plus2E is an extended version of the Orange Pi Pc Plus, with 2G RAM and an external gbit ethernet phy. The dts file is identical to the one submitted to the upstream kernel, except that it has the pending patch to enable the ethernet controller squashed in, as u-boot already has sun8i-emac support. Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Hans de Goede 提交于
The Orange Pi 2 and Orange Pi Plus also come with ethernet, enable support for this. Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Hans de Goede 提交于
This adds an emac node to the orangepi-2 dts (not yet merged upstream, but in u-boot we already have emac support); fixes the alphetically sorting of nodes in sun8i-h3-orangepi-plus.dts and disables some usb controllers in sun8i-h3-orangepi-plus.dts which are only used on the plus2e, as upstream has decided to do a separate dts files for the plus2e. Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Chen-Yu Tsai 提交于
The sun8i-emac driver follows an old version of the proposed DT bindings, where the EMAC clock and EPHY control register range is listed directly, rather than through a syscon phandle. Add back the syscon register range to avoid an invalid data access. We should fix the driver once the Linux kernel bindings have been finalized. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Reviewed-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Stefan Mavrodiev 提交于
A33-OLinuXino is A33 development board designed by Olimex LTD. It has AXP223 PMU, 1GB DRAM, a micro SD card, one USB-OTG connector, headphone and mic jacks, connector for LiPo battery and optional 4GB NAND Flash. It has two 40-pin headers. One for LCD panel, and one for additional modules. Also there is CSI/DSI connector. The dts files are identical to the ones submitted to the upstream kernel. Signed-off-by: NStefan Mavrodiev <stefan.mavrodiev@gmail.com> Reviewed-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Icenowy Zheng 提交于
The iNet D978 rev2 is a tablet board designed by iNet, which is intended to use on 10" tablets with a appearance like Apple iPad. It has A33 SoC, 1GB RAM, 8GB/16GB NAND, SDIO Wi-Fi, a MicroUSB port and a MicroSD slot. Signed-off-by: NIcenowy Zheng <icenowy@aosc.xyz> Reviewed-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Icenowy Zheng 提交于
Add a proper dts for the iNet D978 rev2 based A33 tablets. Signed-off-by: NIcenowy Zheng <icenowy@aosc.xyz> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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- 02 9月, 2016 4 次提交
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由 Scott Wood 提交于
Now that nand_info[] is an array of pointers we need to test the pointer itself rather than using name as a proxy for NULLness. Fixes: b616d9b0 ("nand: Embed mtd_info in struct nand_chip") Signed-off-by: NScott Wood <oss@buserror.net> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Looks like we have few more places where we're testing for nand_info[i]->name. We can now use just test for nand_info[i] instead. This fixes a data abort on devices with no NAND when doing nand info. Signed-off-by: NTony Lindgren <tony@atomide.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Chris Packham 提交于
In commit 17cb4b8f ("mtd: nand: Add+use mtd_to/from_nand and nand_get/set_controller_data") the assignment of mtd->priv was removed but was not replaced. This adds the required nand_set_controller_data() call. Signed-off-by: NChris Packham <judge.packham@gmail.com>
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由 Peter Chubb 提交于
The Colorado TK1 SOM is a small form factor board similar to the Jetson TK1. The main differences lie in the pinmux, and in that the PCIe controller is set to use in 4lanes+1lane, rather than 2+2. The pinmux header here was generated from a spreadsheet provided by Colorado Engineering using the tegra-pinmux scripts. The spreadsheet was converted from v09 to v11 by me. Signed-off-by: NPeter Chubb <peter.chubb@data61.csiro.au> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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- 31 8月, 2016 1 次提交
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由 Stephen Warren 提交于
The board ID EEPROM and board ID stickers on p2771-0000 will use a numeric versioning scheme, with version numbers such as 000/100/200/300/400/500. Within NVIDIA, these versions are also known as A00/A01/A02/A03/A04/B00. However, that numbering scheme is not easily visible outside of NVIDIA, and so does not make much sense to use. Convert U-Boot to use the readily visible numeric scheme. Also, it turns out that the current A02 DT actually applies to board versions 000/100/200 (A00..A02). Consequently rename this to 000 not 200 so that all U-Boot builds are named after the first version of the HW they support. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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- 30 8月, 2016 6 次提交
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由 Bin Meng 提交于
This introduces two board defconfig files for generating EFI 32-bit and 64-bit payloads, to run on QEMU x86 target. With these in place, hopefully buildman will catch any build error with EFI payload support on x86. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
There are lots of warnings when building EFI 64-bit payload. include/asm-generic/bitops/__fls.h:17:2: warning: left shift count >= width of type if (!(word & (~0ul << 32))) { ^ In fact, U-Boot itself as EFI payload is running in 32-bit mode. So BITS_PER_LONG needs to still be 32, but EFI status codes are 64-bit when booting from 64-bit EFI. Introduce EFI_BITS_PER_LONG to bridge those status codes with U-Boot's BITS_PER_LONG. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
Since commit 73c5c399 "Makefile: Drop unnecessary -dtb suffixes", EFI payload does not build anymore. This fixes the build. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add a debug() at this point to help figure out what is wrong. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Generally the microcode is combined into a single block only (and removed from the device tree) when there are multiple blocks. But this is not a requirement. Adjust the ivybridge code to avoid assuming this. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Add a debug() at this point to help figure out what is wrong. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher<hs@denx.de> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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- 28 8月, 2016 1 次提交
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