riscv: dts: add dts for unmatched rev1

The difference between unmatched rev3 and rev1 is DDR timing, the rev3
uses 1866 MT/s for 16GiB, and rev1 uses 2133 MT/s for 8GiB.
Signed-off-by: NZong Li <zong.li@sifive.com>
Reviewed-by: NLeo Yu-Chi Liang <ycliang@andestech.com>

arch/riscv/dts/Makefile

@@ -5,7 +5,7 @@ dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += microchip-mpfs-icicle-kit.dtb
 dtb-$(CONFIG_TARGET_QEMU_VIRT) += qemu-virt.dtb
 dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb
 dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb
-dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb
+dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb hifive-unmatched-a00-rev1.dtb
 dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
 
 targets += $(dtb-y)

arch/riscv/dts/hifive-unmatched-a00-rev1-u-boot.dtsi

+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2021 SiFive, Inc
+ */
+
+#include "hifive-unmatched-a00-u-boot.dtsi"
+#include "fu740-hifive-unmatched-a00-ddr-rev1.dtsi"

arch/riscv/dts/hifive-unmatched-a00-rev1.dts

+// SPDX-License-Identifier: GPL-2.0+
+/* Copyright (c) 2021 SiFive, Inc */
+
+#include "hifive-unmatched-a00.dts"