Merge branch 'hs@denx.de' of git://git.denx.de/u-boot-staging

* 'hs@denx.de' of git://git.denx.de/u-boot-staging:
  drivers/net/dnet.c: Fix GCC 4.6 warnings
  board/xaeniax/flash.c: Fix GCC 4.6 warnings
  net/bootp.c: Fix GCC 4.6 warning
  common/cmd_bootm.c: Fix GCC 4.6 warnings
  board/mx1ads/mx1ads.c: Fix GCC 4.6 warning
  board/mx1ads/syncflash.c: Fix GCC 4.6 warnings
  board/lubbock/flash.c: Fix GCC 4.6 warnings
  drivers/net/cs8900.c: Fix GCC 4.6 warning
  arch/arm/cpu/arm926ejs/omap/cpuinfo.c: Fix GCC 4.6 warnings
  drivers/net/lan91c96.c: Fix GCC 4.6 warning
  board/ronetix/pm9263/pm9263.c: Fix GCC 4.6 warning
  drivers/mtd/onenand/samsung.c: Fix GCC 4.6 warning
  drivers/usb/musb/musb_hcd.c: Fix GCC 4.6 warning

arch/arm/cpu/arm926ejs/omap/cpuinfo.c

@@ -11,6 +11,7 @@
 
 #include <common.h>
 #include <command.h>
+#include <linux/compiler.h>
 
 #if defined(CONFIG_DISPLAY_CPUINFO) && defined(CONFIG_OMAP)
 
@@ -151,8 +152,8 @@ int print_cpuinfo (void)
 	u8 die_rev;
 	u32 omap_id;
 	u8 cpu_type;
-	u32 system_serial_high;
-	u32 system_serial_low;
+	__maybe_unused u32 system_serial_high;
+	__maybe_unused u32 system_serial_low;
 	u32 system_rev = 0;
 
 	jtag_id = omap_get_jtag_id();

board/lubbock/flash.c

@@ -220,7 +220,7 @@ static ulong flash_get_size (FPW *addr, flash_info_t *info)
 
 int flash_erase (flash_info_t *info, int s_first, int s_last)
 {
-	int flag, prot, sect;
+	int prot, sect;
 	ulong type, start;
 	int rcode = 0;
 
@@ -255,7 +255,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
 	}
 
 	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts ();
+	disable_interrupts();
 
 	/* Start erase on unprotected sectors */
 	for (sect = s_first; sect <= s_last; sect++) {
@@ -389,7 +389,6 @@ static int write_data (flash_info_t *info, ulong dest, FPW data)
 {
 	FPWV *addr = (FPWV *) dest;
 	ulong status;
-	int flag;
 	ulong start;
 
 	/* Check if Flash is (sufficiently) erased */
@@ -398,7 +397,7 @@ static int write_data (flash_info_t *info, ulong dest, FPW data)
 		return (2);
 	}
 	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts ();
+	disable_interrupts();
 
 	*addr = (FPW) 0x00400040;	/* write setup */
 	*addr = data;

board/mx1ads/mx1ads.c

@@ -27,6 +27,7 @@
 #include <netdev.h>
 /*#include <mc9328.h>*/
 #include <asm/arch/imx-regs.h>
+#include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -80,8 +81,6 @@ static u32 mc9328sid;
 
 int board_early_init_f(void)
 {
-	volatile unsigned int tmp;
-
 	mc9328sid = SIDR;
 
 	GPCR = 0x000003AB;	/* I/O pad driving strength     */
@@ -107,8 +106,8 @@ int board_early_init_f(void)
 	GIUS (0) &= 0xFF3FFFFF;
 	GPR (0) &= 0xFF3FFFFF;
 
-	tmp = *(unsigned int *) (0x1500000C);
-	tmp = *(unsigned int *) (0x1500000C);
+	readl(0x1500000C);
+	readl(0x1500000C);
 
 	SetAsynchMode ();
 

board/mx1ads/syncflash.c

@@ -57,7 +57,7 @@ flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];	/* info for FLASH chips
 
 /* Get Status register			*/
 u32 SF_SR(void) {
-	u32 tmp,tmp1;
+	u32 tmp;
 
 	reg_SFCTL	= CMD_PROGRAM;
 	tmp		= __REG(CONFIG_SYS_FLASH_BASE);
@@ -65,7 +65,7 @@ u32 SF_SR(void) {
 	reg_SFCTL	= CMD_NORMAL;
 
 	reg_SFCTL	= CMD_LCR;			/* Activate LCR Mode		*/
-	tmp1		= __REG(CONFIG_SYS_FLASH_BASE + LCR_SR_CLEAR);
+	__REG(CONFIG_SYS_FLASH_BASE + LCR_SR_CLEAR);
 
 	return tmp;
 }
@@ -93,10 +93,10 @@ u8 SF_Ready(void) {
 /* Issue the precharge all command		*/
 void SF_PrechargeAll(void) {
 
-	u32 tmp;
-
-	reg_SFCTL	= CMD_PREC;			/* Set Precharge Command	*/
-	tmp		= __REG(CONFIG_SYS_FLASH_BASE + SYNCFLASH_A10); /* Issue Precharge All Command */
+	/* Set Precharge Command	*/
+	reg_SFCTL	= CMD_PREC;
+	/* Issue Precharge All Command */
+	__REG(CONFIG_SYS_FLASH_BASE + SYNCFLASH_A10);
 }
 
 /* set SyncFlash to normal mode			*/
@@ -109,13 +109,12 @@ void SF_Normal(void) {
 
 /* Erase SyncFlash				*/
 void SF_Erase(u32 RowAddress) {
-	u32 tmp;
 
 	reg_SFCTL	= CMD_NORMAL;
-	tmp		= __REG(RowAddress);
+	__REG(RowAddress);
 
 	reg_SFCTL	= CMD_PREC;
-	tmp		= __REG(RowAddress);
+	__REG(RowAddress);
 
 	reg_SFCTL	= CMD_LCR;			/* Set LCR mode		*/
 	__REG(RowAddress + LCR_ERASE_CONFIRM)	= 0;	/* Issue Erase Setup Command	*/
@@ -152,7 +151,6 @@ void SF_NvmodeWrite(void) {
 
 ulong flash_init(void) {
 	int i, j;
-	u32 tmp;
 
 /* Turn on CSD1 for negating RESETSF of SyncFLash */
 
@@ -160,7 +158,7 @@ ulong flash_init(void) {
 	udelay(200);
 
 	reg_SFCTL	= CMD_LMR;		/* Set Load Mode Register Command	*/
-	tmp		= __REG(MODE_REG_VAL);	/* Issue Load Mode Register Command	*/
+	__REG(MODE_REG_VAL);	/* Issue Load Mode Register Command	*/
 
 	SF_Normal();
 

board/ronetix/pm9263/pm9263.c

@@ -164,7 +164,6 @@ void lcd_disable(void)
 /* Initialize the PSRAM memory */
 static int pm9263_lcd_hw_psram_init(void)
 {
-	volatile uint16_t x;
 	unsigned long csa;
 	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC1;
 	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
@@ -196,14 +195,14 @@ static int pm9263_lcd_hw_psram_init(void)
 	at91_set_pio_value(PSRAM_CRE_PIN, 0);	/* set PSRAM_CRE_PIN to '0' */
 
 	/* PSRAM: write BCR */
-	x = readw(PSRAM_CTRL_REG);
-	x = readw(PSRAM_CTRL_REG);
+	readw(PSRAM_CTRL_REG);
+	readw(PSRAM_CTRL_REG);
 	writew(1, PSRAM_CTRL_REG);	/* 0 - RCR,1 - BCR */
 	writew(0x9d4f, PSRAM_CTRL_REG);	/* write the BCR */
 
 	/* write RCR of the PSRAM */
-	x = readw(PSRAM_CTRL_REG);
-	x = readw(PSRAM_CTRL_REG);
+	readw(PSRAM_CTRL_REG);
+	readw(PSRAM_CTRL_REG);
 	writew(0, PSRAM_CTRL_REG);	/* 0 - RCR,1 - BCR */
 	/* set RCR; 0x10-async mode,0x90-page mode */
 	writew(0x90, PSRAM_CTRL_REG);
@@ -222,8 +221,8 @@ static int pm9263_lcd_hw_psram_init(void)
 		at91_set_pio_value(PSRAM_CRE_PIN, 1); /* set PSRAM_CRE_PIN to '1' */
 
 		/* write RCR of the PSRAM */
-		x = readw(PSRAM_CTRL_REG);
-		x = readw(PSRAM_CTRL_REG);
+		readw(PSRAM_CTRL_REG);
+		readw(PSRAM_CTRL_REG);
 		writew(0, PSRAM_CTRL_REG);	/* 0 - RCR,1 - BCR */
 		/* set RCR;0x10-async mode,0x90-page mode */
 		writew(0x90, PSRAM_CTRL_REG);

board/xaeniax/flash.c

@@ -220,7 +220,7 @@ static ulong flash_get_size (FPW *addr, flash_info_t *info)
 
 int flash_erase (flash_info_t *info, int s_first, int s_last)
 {
-	int flag, prot, sect;
+	int prot, sect;
 	ulong type, start;
 	int rcode = 0;
 
@@ -255,7 +255,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
 	}
 
 	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts ();
+	disable_interrupts();
 
 	/* Start erase on unprotected sectors */
 	for (sect = s_first; sect <= s_last; sect++) {
@@ -389,7 +389,6 @@ static int write_data (flash_info_t *info, ulong dest, FPW data)
 {
 	FPWV *addr = (FPWV *) dest;
 	ulong status;
-	int flag;
 	ulong start;
 
 	/* Check if Flash is (sufficiently) erased */
@@ -398,7 +397,7 @@ static int write_data (flash_info_t *info, ulong dest, FPW data)
 		return (2);
 	}
 	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts ();
+	disable_interrupts();
 
 	*addr = (FPW) 0x00400040;	/* write setup */
 	*addr = data;

common/cmd_bootm.c

@@ -36,6 +36,7 @@
 #include <lmb.h>
 #include <linux/ctype.h>
 #include <asm/byteorder.h>
+#include <linux/compiler.h>
 
 #if defined(CONFIG_CMD_USB)
 #include <usb.h>
@@ -312,7 +313,7 @@ static int bootm_load_os(image_info_t os, ulong *load_end, int boot_progress)
 	ulong blob_end = os.end;
 	ulong image_start = os.image_start;
 	ulong image_len = os.image_len;
-	uint unc_len = CONFIG_SYS_BOOTM_LEN;
+	__maybe_unused uint unc_len = CONFIG_SYS_BOOTM_LEN;
 #if defined(CONFIG_LZMA) || defined(CONFIG_LZO)
 	int ret;
 #endif /* defined(CONFIG_LZMA) || defined(CONFIG_LZO) */

drivers/mtd/onenand/samsung.c

@@ -483,12 +483,11 @@ static void s3c_onenand_check_lock_status(struct mtd_info *mtd)
 {
 	struct onenand_chip *this = mtd->priv;
 	unsigned int block, end;
-	int tmp;
 
 	end = this->chipsize >> this->erase_shift;
 
 	for (block = 0; block < end; block++) {
-		tmp = s3c_read_cmd(CMD_MAP_01(onenand->mem_addr(block, 0, 0)));
+		s3c_read_cmd(CMD_MAP_01(onenand->mem_addr(block, 0, 0)));
 
 		if (readl(&onenand->reg->int_err_stat) & LOCKED_BLK) {
 			printf("block %d is write-protected!\n", block);

drivers/net/cs8900.c

@@ -66,15 +66,14 @@
 static u16 get_reg_init_bus(struct eth_device *dev, int regno)
 {
 	/* force 16 bit busmode */
-	volatile u8 c;
 	struct cs8900_priv *priv = (struct cs8900_priv *)(dev->priv);
 	uint8_t volatile * const iob = (uint8_t volatile * const)dev->iobase;
 
-	c = readb(iob);
-	c = readb(iob + 1);
-	c = readb(iob);
-	c = readb(iob + 1);
-	c = readb(iob);
+	readb(iob);
+	readb(iob + 1);
+	readb(iob);
+	readb(iob + 1);
+	readb(iob);
 
 	REG_WRITE(regno, &priv->regs->pptr);
 	return REG_READ(&priv->regs->pdata);

drivers/net/dnet.c

@@ -20,6 +20,7 @@
 
 #include <miiphy.h>
 #include <asm/io.h>
+#include <asm/unaligned.h>
 
 #include "dnet.h"
 
@@ -133,15 +134,12 @@ static int dnet_send(struct eth_device *netdev, volatile void *packet,
 		     int length)
 {
 	struct dnet_device *dnet = to_dnet(netdev);
-	int i, len, wrsz;
+	int i, wrsz;
 	unsigned int *bufp;
 	unsigned int tx_cmd;
 
 	debug(DRIVERNAME "[%s] Sending %u bytes\n", __func__, length);
 
-	/* frame size (words) */
-	len = (length + 3) >> 2;
-
 	bufp = (unsigned int *) (((u32)packet) & 0xFFFFFFFC);
 	wrsz = (u32)length + 3;
 	wrsz += ((u32)packet) & 0x3;
@@ -206,11 +204,11 @@ static void dnet_set_hwaddr(struct eth_device *netdev)
 	struct dnet_device *dnet = to_dnet(netdev);
 	u16 tmp;
 
-	tmp = cpu_to_be16(*((u16 *)netdev->enetaddr));
+	tmp = get_unaligned_be16(netdev->enetaddr);
 	dnet_writew_mac(dnet, DNET_INTERNAL_MAC_ADDR_0_REG, tmp);
-	tmp = cpu_to_be16(*((u16 *)(netdev->enetaddr + 2)));
+	tmp = get_unaligned_be16(&netdev->enetaddr[2]);
 	dnet_writew_mac(dnet, DNET_INTERNAL_MAC_ADDR_1_REG, tmp);
-	tmp = cpu_to_be16(*((u16 *)(netdev->enetaddr + 4)));
+	tmp = get_unaligned_be16(&netdev->enetaddr[4]);
 	dnet_writew_mac(dnet, DNET_INTERNAL_MAC_ADDR_2_REG, tmp);
 }
 

drivers/net/lan91c96.c

@@ -63,6 +63,7 @@
 #include <malloc.h>
 #include "lan91c96.h"
 #include <net.h>
+#include <linux/compiler.h>
 
 /*------------------------------------------------------------------------
  *
@@ -154,7 +155,7 @@ static void smc_set_mac_addr(const unsigned char *addr)
  ***********************************************/
 void dump_memory_info(struct eth_device *dev)
 {
-	word mem_info;
+	__maybe_unused word mem_info;
 	word old_bank;
 
 	old_bank = SMC_inw(dev, LAN91C96_BANK_SELECT) & 0xF;
@@ -317,7 +318,6 @@ static int smc_send_packet(struct eth_device *dev, volatile void *packet,
 		int packet_length)
 {
 	byte packet_no;
-	unsigned long ioaddr;
 	byte *buf;
 	int length;
 	int numPages;
@@ -381,9 +381,6 @@ static int smc_send_packet(struct eth_device *dev, volatile void *packet,
 			 dev->name, try);
 
 	/* I can send the packet now.. */
-
-	ioaddr = dev->iobase;
-
 	buf = (byte *) packet;
 
 	/* If I get here, I _know_ there is a packet slot waiting for me */

drivers/usb/musb/musb_hcd.c

@@ -848,7 +848,6 @@ int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 			int len, struct devrequest *setup)
 {
 	int devnum = usb_pipedevice(pipe);
-	u16 csr;
 	u8  devspeed;
 
 #ifdef MUSB_NO_MULTIPOINT
@@ -862,7 +861,7 @@ int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 
 	/* select control endpoint */
 	writeb(MUSB_CONTROL_EP, &musbr->index);
-	csr = readw(&musbr->txcsr);
+	readw(&musbr->txcsr);
 
 #ifndef MUSB_NO_MULTIPOINT
 	/* target addr and (for multipoint) hub addr/port */

net/bootp.c

@@ -17,6 +17,7 @@
 #ifdef CONFIG_STATUS_LED
 #include <status_led.h>
 #endif
+#include <linux/compiler.h>
 
 #define BOOTP_VENDOR_MAGIC	0x63825363	/* RFC1048 Magic Cookie		*/
 
@@ -105,7 +106,7 @@ static int BootpCheckPkt(uchar *pkt, unsigned dest, unsigned src, unsigned len)
  */
 static void BootpCopyNetParams(Bootp_t *bp)
 {
-	IPaddr_t tmp_ip;
+	__maybe_unused IPaddr_t tmp_ip;
 
 	NetCopyIP(&NetOurIP, &bp->bp_yiaddr);
 #if !defined(CONFIG_BOOTP_SERVERIP)