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体验新版 GitCode,发现更多精彩内容 >>
提交
fcc8250c
编写于
11月 28, 2017
作者:
T
Tom Rini
浏览文件
操作
浏览文件
下载
差异文件
Merge
git://git.denx.de/u-boot-mips
上级
74a48184
caead80a
变更
14
隐藏空白更改
内联
并排
Showing
14 changed file
with
59 addition
and
24 deletion
+59
-24
.mailmap
.mailmap
+1
-0
arch/mips/cpu/u-boot.lds
arch/mips/cpu/u-boot.lds
+0
-6
arch/mips/include/asm/system.h
arch/mips/include/asm/system.h
+13
-0
arch/mips/lib/cache.c
arch/mips/lib/cache.c
+22
-8
board/imgtec/boston/MAINTAINERS
board/imgtec/boston/MAINTAINERS
+1
-1
board/imgtec/boston/config.mk
board/imgtec/boston/config.mk
+14
-0
board/imgtec/boston/lowlevel_init.S
board/imgtec/boston/lowlevel_init.S
+1
-2
board/imgtec/malta/MAINTAINERS
board/imgtec/malta/MAINTAINERS
+1
-1
board/imgtec/malta/superio.c
board/imgtec/malta/superio.c
+1
-1
board/imgtec/malta/superio.h
board/imgtec/malta/superio.h
+1
-1
drivers/pci/pci_msc01.c
drivers/pci/pci_msc01.c
+1
-1
include/configs/boston.h
include/configs/boston.h
+1
-1
include/msc01.h
include/msc01.h
+1
-1
include/pci_msc01.h
include/pci_msc01.h
+1
-1
未找到文件。
.mailmap
浏览文件 @
fcc8250c
...
...
@@ -20,6 +20,7 @@ Jagan Teki <jaganna@xilinx.com>
Jagan Teki <jagannadh.teki@gmail.com>
Jagan Teki <jagannadha.sutradharudu-teki@xilinx.com>
Markus Klotzbuecher <mk@denx.de>
Paul Burton <paul.burton@mips.com> <paul.burton@imgtec.com>
Prabhakar Kushwaha <prabhakar@freescale.com>
Rajeshwari Shinde <rajeshwari.s@samsung.com>
Ricardo Ribalda <ricardo.ribalda@uam.es>
...
...
arch/mips/cpu/u-boot.lds
浏览文件 @
fcc8250c
...
...
@@ -5,12 +5,6 @@
* SPDX-License-Identifier: GPL-2.0+
*/
#if defined(CONFIG_64BIT)
#define PTR_COUNT_SHIFT 3
#else
#define PTR_COUNT_SHIFT 2
#endif
OUTPUT_ARCH(mips)
ENTRY(_start)
SECTIONS
...
...
arch/mips/include/asm/system.h
浏览文件 @
fcc8250c
...
...
@@ -14,8 +14,10 @@
#ifndef _ASM_SYSTEM_H
#define _ASM_SYSTEM_H
#include <asm/asm.h>
#include <asm/sgidefs.h>
#include <asm/ptrace.h>
#include <linux/stringify.h>
#if 0
#include <linux/kernel.h>
#endif
...
...
@@ -270,4 +272,15 @@ static inline void execution_hazard_barrier(void)
".set reorder"
);
}
static
inline
void
instruction_hazard_barrier
(
void
)
{
unsigned
long
tmp
;
asm
volatile
(
__stringify
(
PTR_LA
)
"
\t
%0, 1f
\n
"
" jr.hb %0
\n
"
"1: .insn"
:
"=&r"
(
tmp
));
}
#endif
/* _ASM_SYSTEM_H */
arch/mips/lib/cache.c
浏览文件 @
fcc8250c
...
...
@@ -10,7 +10,9 @@
#ifdef CONFIG_MIPS_L2_CACHE
#include <asm/cm.h>
#endif
#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
DECLARE_GLOBAL_DATA_PTR
;
...
...
@@ -96,6 +98,9 @@ static inline unsigned long scache_line_size(void)
const unsigned int cache_ops[] = { ops }; \
unsigned int i; \
\
if (!lsize) \
break; \
\
for (; addr <= aend; addr += lsize) { \
for (i = 0; i < ARRAY_SIZE(cache_ops); i++) \
mips_cache(cache_ops[i], addr); \
...
...
@@ -116,19 +121,24 @@ void flush_cache(ulong start_addr, ulong size)
/* flush I-cache & D-cache simultaneously */
cache_loop
(
start_addr
,
start_addr
+
size
,
ilsize
,
HIT_WRITEBACK_INV_D
,
HIT_INVALIDATE_I
);
return
;
goto
ops_done
;
}
/* flush D-cache */
cache_loop
(
start_addr
,
start_addr
+
size
,
dlsize
,
HIT_WRITEBACK_INV_D
);
/* flush L2 cache */
if
(
slsize
)
cache_loop
(
start_addr
,
start_addr
+
size
,
slsize
,
HIT_WRITEBACK_INV_SD
);
cache_loop
(
start_addr
,
start_addr
+
size
,
slsize
,
HIT_WRITEBACK_INV_SD
);
/* flush I-cache */
cache_loop
(
start_addr
,
start_addr
+
size
,
ilsize
,
HIT_INVALIDATE_I
);
ops_done:
/* ensure cache ops complete before any further memory accesses */
sync
();
/* ensure the pipeline doesn't contain now-invalid instructions */
instruction_hazard_barrier
();
}
void
flush_dcache_range
(
ulong
start_addr
,
ulong
stop
)
...
...
@@ -143,8 +153,10 @@ void flush_dcache_range(ulong start_addr, ulong stop)
cache_loop
(
start_addr
,
stop
,
lsize
,
HIT_WRITEBACK_INV_D
);
/* flush L2 cache */
if
(
slsize
)
cache_loop
(
start_addr
,
stop
,
slsize
,
HIT_WRITEBACK_INV_SD
);
cache_loop
(
start_addr
,
stop
,
slsize
,
HIT_WRITEBACK_INV_SD
);
/* ensure cache ops complete before any further memory accesses */
sync
();
}
void
invalidate_dcache_range
(
ulong
start_addr
,
ulong
stop
)
...
...
@@ -157,8 +169,10 @@ void invalidate_dcache_range(ulong start_addr, ulong stop)
return
;
/* invalidate L2 cache */
if
(
slsize
)
cache_loop
(
start_addr
,
stop
,
slsize
,
HIT_INVALIDATE_SD
);
cache_loop
(
start_addr
,
stop
,
slsize
,
HIT_INVALIDATE_SD
);
cache_loop
(
start_addr
,
stop
,
lsize
,
HIT_INVALIDATE_D
);
/* ensure cache ops complete before any further memory accesses */
sync
();
}
board/imgtec/boston/MAINTAINERS
浏览文件 @
fcc8250c
BOSTON BOARD
M: Paul Burton <paul.burton@
imgtec
.com>
M: Paul Burton <paul.burton@
mips
.com>
S: Maintained
F: board/imgtec/boston/
F: include/configs/boston.h
...
...
board/imgtec/boston/config.mk
0 → 100644
浏览文件 @
fcc8250c
#
# SPDX-License-Identifier: GPL-2.0+
#
quiet_cmd_srec_cat
=
SRECCAT
$@
cmd_srec_cat
=
srec_cat
-output
$@
-
$2
$<
-binary
-offset
$3
u-boot.mcs
:
u-boot.bin
$(
call
cmd,srec_cat,intel,0x7c00000
)
# if srec_cat is present build u-boot.mcs by default
has_srec_cat
=
$(
call
try-run,srec_cat
-VERSion
,y,n
)
ALL-$(has_srec_cat)
+=
u-boot.mcs
CLEAN_FILES
+=
u-boot.mcs
board/imgtec/boston/lowlevel_init.S
浏览文件 @
fcc8250c
...
...
@@ -34,7 +34,6 @@ LEAF(lowlevel_init)
PTR_LA
a0
,
msg_ddr_ok
bal
lowlevel_display
move
v0
,
zero
jr
s0
END
(
lowlevel_init
)
...
...
@@ -52,5 +51,5 @@ LEAF(lowlevel_display)
sw
k1
,
4
(
AT
)
#endif
.
set
pop
1
:
jr
ra
jr
ra
END
(
lowlevel_display
)
board/imgtec/malta/MAINTAINERS
浏览文件 @
fcc8250c
MALTA BOARD
M: Paul Burton <paul.burton@
imgtec
.com>
M: Paul Burton <paul.burton@
mips
.com>
S: Maintained
F: board/imgtec/malta/
F: include/configs/malta.h
...
...
board/imgtec/malta/superio.c
浏览文件 @
fcc8250c
/*
* Copyright (C) 2013 Imagination Technologies
* Author: Paul Burton <paul.burton@
imgtec
.com>
* Author: Paul Burton <paul.burton@
mips
.com>
*
* Setup code for the FDC37M817 super I/O controller
*
...
...
board/imgtec/malta/superio.h
浏览文件 @
fcc8250c
/*
* Copyright (C) 2013 Imagination Technologies
* Author: Paul Burton <paul.burton@
imgtec
.com>
* Author: Paul Burton <paul.burton@
mips
.com>
*
* Setup code for the FDC37M817 super I/O controller
*
...
...
drivers/pci/pci_msc01.c
浏览文件 @
fcc8250c
/*
* Copyright (C) 2013 Imagination Technologies
* Author: Paul Burton <paul.burton@
imgtec
.com>
* Author: Paul Burton <paul.burton@
mips
.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
...
...
include/configs/boston.h
浏览文件 @
fcc8250c
...
...
@@ -34,7 +34,7 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x
1
00000)
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x
080
00000)
#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0)
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x10000000)
...
...
include/msc01.h
浏览文件 @
fcc8250c
/*
* Copyright (C) 2013 Imagination Technologies
* Author: Paul Burton <paul.burton@
imgtec
.com>
* Author: Paul Burton <paul.burton@
mips
.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
...
...
include/pci_msc01.h
浏览文件 @
fcc8250c
/*
* Copyright (C) 2013 Imagination Technologies
* Author: Paul Burton <paul.burton@
imgtec
.com>
* Author: Paul Burton <paul.burton@
mips
.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
...
...
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