powerpc/85xx: Add some defines for P2040, P3041, P5010, P5020

Specify the number of DDR controllers, number of frame managers, number
of 1g and 10g ports.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

arch/powerpc/include/asm/config_mpc85xx.h

@@ -156,11 +156,18 @@
 #define CONFIG_MAX_CPUS			4
 #define CONFIG_SYS_FSL_NUM_LAWS		32
 #define CONFIG_SYS_FSL_SEC_COMPAT	4
+#define CONFIG_SYS_NUM_FMAN		1
+#define CONFIG_SYS_NUM_FM1_DTSEC	5
+#define CONFIG_NUM_DDR_CONTROLLERS	1
 
 #elif defined(CONFIG_PPC_P3041)
 #define CONFIG_MAX_CPUS			4
 #define CONFIG_SYS_FSL_NUM_LAWS		32
 #define CONFIG_SYS_FSL_SEC_COMPAT	4
+#define CONFIG_SYS_NUM_FMAN		1
+#define CONFIG_SYS_NUM_FM1_DTSEC	5
+#define CONFIG_SYS_NUM_FM1_10GEC	1
+#define CONFIG_NUM_DDR_CONTROLLERS	1
 
 #elif defined(CONFIG_PPC_P4040)
 #define CONFIG_MAX_CPUS			4
@@ -191,11 +198,19 @@
 #define CONFIG_MAX_CPUS			1
 #define CONFIG_SYS_FSL_NUM_LAWS		32
 #define CONFIG_SYS_FSL_SEC_COMPAT	4
+#define CONFIG_SYS_NUM_FMAN		1
+#define CONFIG_SYS_NUM_FM1_DTSEC	5
+#define CONFIG_SYS_NUM_FM1_10GEC	1
+#define CONFIG_NUM_DDR_CONTROLLERS	1
 
 #elif defined(CONFIG_PPC_P5020)
 #define CONFIG_MAX_CPUS			2
 #define CONFIG_SYS_FSL_NUM_LAWS		32
 #define CONFIG_SYS_FSL_SEC_COMPAT	4
+#define CONFIG_SYS_NUM_FMAN		1
+#define CONFIG_SYS_NUM_FM1_DTSEC	5
+#define CONFIG_SYS_NUM_FM1_10GEC	1
+#define CONFIG_NUM_DDR_CONTROLLERS	2
 
 #else
 #error Processor type not defined for this platform