Merge branch 'master' of /home/wd/git/u-boot/custodians

* 'master' of /home/wd/git/u-boot/custodians:
  board/mpl/pati: use the CFI driver for the PATI board
  board/mpl/mip405: use the CFI driver for the MIP405/MIP405T board
  board/mpl/pip405: use the CFI driver for the PIP405 board
  board/mpl/common: remove the old legacy flash
  ppc4xx: Setup HICB on Io64

board/gdsys/405ex/io64.c

@@ -249,6 +249,7 @@ int last_stage_init(void)
 	char str_serdes[] = "Start SERDES blocks";
 	char str_channels[] = "Start FPGA channels";
 	char str_locks[] = "Verify SERDES locks";
+	char str_hicb[] = "Verify HICB status";
 	char str_status[] = "Verify PHY status -";
 	char slash[] = "\\|/-\\|/-";
 
@@ -312,6 +313,21 @@ int last_stage_init(void)
 	}
 	blank_string(strlen(str_locks));
 
+	/* verify hicb_status */
+	puts(str_hicb);
+	for (fpga = 0; fpga < 2; ++fpga) {
+		u16 *ch0_hicb_status_int = &(fpga ? fpga1 : fpga0)->ch0_hicb_status_int;
+		for (k = 0; k < 32; ++k) {
+			u16 status = in_le16(ch0_hicb_status_int + 4*k);
+			if (status)
+				printf("fpga %d hicb %d: hicb status %04x\n",
+					fpga, k, status);
+			/* reset events */
+			out_le16(ch0_hicb_status_int + 4*k, status);
+		}
+	}
+	blank_string(strlen(str_hicb));
+
 	/* verify phy status */
 	puts(str_status);
 	for (k = 0; k < 32; ++k) {

board/mpl/common/common_util.c

@@ -53,13 +53,156 @@ extern int mem_test(ulong start, ulong ramsize, int quiet);
 #define I2C_BACKUP_ADDR 0x7C00		/* 0x200 bytes for backup */
 #define IMAGE_SIZE CONFIG_SYS_MONITOR_LEN	/* ugly, but it works for now */
 
-extern flash_info_t flash_info[];	/* info for FLASH chips */
+#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405)
+/*-----------------------------------------------------------------------
+ * On PIP/MIP405 we have 3 (4) possible boot mode
+ *
+ * - Boot from Flash (Flash CS = CS0, MPS CS = CS1)
+ * - Boot from MPS   (Flash CS = CS1, MPS CS = CS0)
+ * - Boot from PCI with Flash map (Flash CS = CS0, MPS CS = CS1)
+ * - Boot from PCI with MPS map   (Flash CS = CS1, MPS CS = CS0)
+ * The flash init is the first board specific routine which is called
+ * after code relocation (running from SDRAM)
+ * The first thing we do is to map the Flash CS to the Flash area and
+ * the MPS CS to the MPS area. Since the flash size is unknown at this
+ * point, we use the max flash size and the lowest flash address as base.
+ *
+ * After flash detection we adjust the size of the CS area accordingly.
+ * update_flash_size() will fix in wrong values in the flash_info structure,
+ * misc_init_r() will fix the values in the board info structure
+ */
+int get_boot_mode(void)
+{
+	unsigned long pbcr;
+	int res = 0;
+	pbcr = mfdcr(CPC0_PSR);
+	if ((pbcr & PSR_ROM_WIDTH_MASK) == 0)
+		/* boot via MPS or MPS mapping */
+		res = BOOT_MPS;
+	if (pbcr & PSR_ROM_LOC)
+		/* boot via PCI.. */
+		res |= BOOT_PCI;
+	 return res;
+}
+
+/* Map the flash high (in boot area)
+   This code can only be executed from SDRAM (after relocation).
+*/
+void setup_cs_reloc(void)
+{
+	int mode;
+	/*
+	 * since we are relocated, we can set-up the CS finaly
+	 * but first of all, switch off PCI mapping (in case it
+	 * was a PCI boot)
+	 */
+	out32r(PMM0MA, 0L);
+	/* get boot mode */
+	mode = get_boot_mode();
+	/*
+	 * we map the flash high in every case
+	 * first find out to which CS the flash is attached to
+	 */
+	if (mode & BOOT_MPS) {
+		/* map flash high on CS1 and MPS on CS0 */
+		mtdcr(EBC0_CFGADDR, PB0AP);
+		mtdcr(EBC0_CFGDATA, MPS_AP);
+		mtdcr(EBC0_CFGADDR, PB0CR);
+		mtdcr(EBC0_CFGDATA, MPS_CR);
+		/*
+		 * we use the default values (max values) for the flash
+		 * because its real size is not yet known
+		 */
+		mtdcr(EBC0_CFGADDR, PB1AP);
+		mtdcr(EBC0_CFGDATA, FLASH_AP);
+		mtdcr(EBC0_CFGADDR, PB1CR);
+		mtdcr(EBC0_CFGDATA, FLASH_CR_B);
+	} else {
+		/* map flash high on CS0 and MPS on CS1 */
+		mtdcr(EBC0_CFGADDR, PB1AP);
+		mtdcr(EBC0_CFGDATA, MPS_AP);
+		mtdcr(EBC0_CFGADDR, PB1CR);
+		mtdcr(EBC0_CFGDATA, MPS_CR);
+		/*
+		 * we use the default values (max values) for the flash
+		 * because its real size is not yet known
+		 */
+		mtdcr(EBC0_CFGADDR, PB0AP);
+		mtdcr(EBC0_CFGDATA, FLASH_AP);
+		mtdcr(EBC0_CFGADDR, PB0CR);
+		mtdcr(EBC0_CFGDATA, FLASH_CR_B);
+	}
+}
+#endif /* #if defined(CONFIG_PIP405) || defined(CONFIG_MIP405) */
+
+#ifdef CONFIG_SYS_UPDATE_FLASH_SIZE
+/* adjust flash start and protection info */
+int update_flash_size(int flash_size)
+{
+	int i = 0, mode;
+	flash_info_t *info = &flash_info[0];
+	unsigned long flashcr;
+	unsigned long flash_base = (0 - flash_size) & 0xFFF00000;
+
+	if (flash_size > 128*1024*1024) {
+		printf("\n ### ERROR, wrong flash size: %X, reset board ###\n",
+		       flash_size);
+		hang();
+	}
+
+	if ((flash_size >> 20) != 0)
+		i = __ilog2(flash_size >> 20);
+
+	/* set up flash CS according to the size */
+	mode = get_boot_mode();
+	if (mode & BOOT_MPS) {
+		/* flash is on CS1 */
+		mtdcr(EBC0_CFGADDR, PB1CR);
+		flashcr = mfdcr(EBC0_CFGDATA);
+		/* we map the flash high in every case */
+		flashcr &= 0x0001FFFF; /* mask out address bits */
+		flashcr |= flash_base; /* start addr */
+		flashcr |= (i << 17); /* size addr */
+		mtdcr(EBC0_CFGADDR, PB1CR);
+		mtdcr(EBC0_CFGDATA, flashcr);
+	} else {
+		/* flash is on CS0 */
+		mtdcr(EBC0_CFGADDR, PB0CR);
+		flashcr = mfdcr(EBC0_CFGDATA);
+		/* we map the flash high in every case */
+		flashcr &= 0x0001FFFF; /* mask out address bits */
+		flashcr |= flash_base; /* start addr */
+		flashcr |= (i << 17); /* size addr */
+		mtdcr(EBC0_CFGADDR, PB0CR);
+		mtdcr(EBC0_CFGDATA, flashcr);
+	}
+
+	for (i = 0; i < info->sector_count; i++)
+		/* adjust sector start address */
+		info->start[i] = flash_base +
+				(info->start[i] - CONFIG_SYS_FLASH_BASE);
+
+	/* unprotect all sectors */
+	flash_protect(FLAG_PROTECT_CLEAR,
+		      info->start[0],
+		      0xFFFFFFFF,
+		      info);
+	flash_protect_default();
+	/* protect reset vector too*/
+	flash_protect(FLAG_PROTECT_SET,
+		      info->start[info->sector_count-1],
+		      0xFFFFFFFF,
+		      info);
+
+	return 0;
+}
+#endif
 
 static int
 mpl_prg(uchar *src, ulong size)
 {
 	ulong start;
-	flash_info_t *info;
+	flash_info_t *info = &flash_info[0];
 	int i, rc;
 #if defined(CONFIG_PATI)
 	int start_sect;
@@ -69,8 +212,6 @@ mpl_prg(uchar *src, ulong size)
 	ulong *magic = (ulong *)src;
 #endif
 
-	info = &flash_info[0];
-
 #if defined(CONFIG_PIP405) || defined(CONFIG_MIP405) || defined(CONFIG_PATI)
 	if (uimage_to_cpu (magic[0]) != IH_MAGIC) {
 		puts("Bad Magic number\n");
@@ -96,12 +237,18 @@ mpl_prg(uchar *src, ulong size)
 	}
 #if !defined(CONFIG_PATI)
 	start = 0 - size;
-	for (i = info->sector_count-1; i > 0; i--) {
-		info->protect[i] = 0; /* unprotect this sector */
+
+	/* unprotect sectors used by u-boot */
+	flash_protect(FLAG_PROTECT_CLEAR,
+		      start,
+		      0xFFFFFFFF,
+		      info);
+
+	/* search start sector */
+	for (i = info->sector_count-1; i > 0; i--)
 		if (start >= info->start[i])
 			break;
-	}
-	/* set-up flash location */
+
 	/* now erase flash */
 	printf("Erasing at %lx (sector %d) (start %lx)\n",
 				start,i,info->start[i]);
@@ -114,22 +261,24 @@ mpl_prg(uchar *src, ulong size)
 #else /* #if !defined(CONFIG_PATI */
 	start = FIRM_START;
 	start_sect = -1;
-	for (i = 0; i < info->sector_count; i++) {
-		if (start < info->start[i]) {
-			start_sect = i - 1;
+
+	/* search start sector */
+	for (i = info->sector_count-1; i > 0; i--)
+		if (start >= info->start[i])
 			break;
-		}
-	}
 
-	info->protect[i - 1] = 0;	/* unprotect this sector */
-	for (; i < info->sector_count; i++) {
-		if ((start + size) < info->start[i])
+	start_sect = i;
+
+	for (i = info->sector_count-1; i > 0; i--)
+		if ((start + size) >= info->start[i])
 			break;
-		info->protect[i] = 0;	/* unprotect this sector */
-	}
 
-	i--;
-	/* set-up flash location */
+	/* unprotect sectors used by u-boot */
+	flash_protect(FLAG_PROTECT_CLEAR,
+		      start,
+		      start + size,
+		      info);
+
 	/* now erase flash */
 	printf ("Erasing at %lx to %lx (sector %d to %d) (%lx to %lx)\n",
 		start, start + size, start_sect, i,
@@ -143,12 +292,17 @@ mpl_prg(uchar *src, ulong size)
 
 #elif defined(CONFIG_VCMA9)
 	start = 0;
-	for (i = 0; i <info->sector_count; i++) {
-		info->protect[i] = 0; /* unprotect this sector */
+
+	/* search end sector */
+	for (i = 0; i < info->sector_count; i++)
 		if (size < info->start[i])
 		    break;
-	}
-	/* set-up flash location */
+
+	flash_protect(FLAG_PROTECT_CLEAR,
+		      start,
+		      size,
+		      info);
+
 	/* now erase flash */
 	printf("Erasing at %lx (sector %d) (start %lx)\n",
 				start,0,info->start[0]);

board/mpl/common/common_util.h

@@ -30,11 +30,15 @@ typedef struct {
 	char eth_addr[21];	/* "00:60:C2:0a:00:00" */
 } backup_t;
 
+extern flash_info_t flash_info[];	/* info for FLASH chips */
+
 void get_backup_values(backup_t *buf);
 
 #if defined(CONFIG_PIP405) || defined(CONFIG_MIP405)
 #define BOOT_MPS	0x01
 #define BOOT_PCI	0x02
+int get_boot_mode(void);
+void setup_cs_reloc(void);
 #endif
 
 void check_env(void);

board/mpl/mip405/Makefile

@@ -28,8 +28,10 @@ endif
 
 LIB	= $(obj)lib$(BOARD).o
 
-COBJS	= $(BOARD).o ../common/flash.o cmd_mip405.o ../common/pci.o \
-			../common/usb_uhci.o ../common/common_util.o
+COBJS	= $(BOARD).o cmd_mip405.o \
+		../common/pci.o \
+		../common/usb_uhci.o \
+		../common/common_util.o
 
 SOBJS	= init.o
 

board/mpl/mip405/mip405.c

@@ -498,6 +498,27 @@ int board_early_init_f (void)
 	return 0;
 }
 
+int board_early_init_r(void)
+{
+	int mode;
+
+	/*
+	 * since we are relocated, we can finally enable i-cache
+	 * and set up the flash CS correctly
+	 */
+	icache_enable();
+	setup_cs_reloc();
+	/* get and display boot mode */
+	mode = get_boot_mode();
+	if (mode & BOOT_PCI)
+		printf("PCI Boot %s Map\n", (mode & BOOT_MPS) ?
+			"MPS" : "Flash");
+	else
+		printf("%s Boot\n", (mode & BOOT_MPS) ?
+			"MPS" : "Flash");
+
+	return 0;
+}
 
 /*
  * Get some PLD Registers
@@ -671,7 +692,6 @@ static int test_dram (unsigned long ramsize)
 /* used to check if the time in RTC is valid */
 static unsigned long start;
 static struct rtc_time tm;
-extern flash_info_t flash_info[];	/* info for FLASH chips */
 
 int misc_init_r (void)
 {

board/mpl/pati/Makefile

@@ -28,8 +28,8 @@ endif
 
 LIB	= $(obj)lib$(BOARD).o
 
-COBJS	:=  pati.o ../common/flash.o cmd_pati.o ../common/common_util.o
-#### cmd_pati.o
+COBJS	:=  $(BOARD).o cmd_pati.o \
+		../common/common_util.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))

board/mpl/pip405/Makefile

@@ -28,11 +28,12 @@ endif
 
 LIB	= $(obj)lib$(BOARD).o
 
-COBJS	= $(BOARD).o \
-	  ../common/flash.o cmd_pip405.o ../common/pci.o \
-	  ../common/isa.o ../common/kbd.o \
-	  ../common/usb_uhci.o \
-	  ../common/common_util.o
+COBJS	= $(BOARD).o cmd_pip405.o \
+		../common/pci.o \
+		../common/isa.o \
+		../common/kbd.o \
+		../common/usb_uhci.o \
+		../common/common_util.o
 
 SOBJS	= init.o
 

board/mpl/pip405/pip405.c

@@ -566,7 +566,27 @@ int board_early_init_f (void)
 	return 0;
 }
 
+int board_early_init_r(void)
+{
+	int mode;
+
+	/*
+	 * since we are relocated, we can finally enable i-cache
+	 * and set up the flash CS correctly
+	 */
+	icache_enable();
+	setup_cs_reloc();
+	/* get and display boot mode */
+	mode = get_boot_mode();
+	if (mode & BOOT_PCI)
+		printf("PCI Boot %s Map\n", (mode & BOOT_MPS) ?
+			"MPS" : "Flash");
+	else
+		printf("%s Boot\n", (mode & BOOT_MPS) ?
+			"MPS" : "Flash");
 
+	return 0;
+}
 /* ------------------------------------------------------------------------- */
 
 /*
@@ -660,9 +680,6 @@ static int test_dram (unsigned long ramsize)
 	return (1);
 }
 
-
-extern flash_info_t flash_info[];	/* info for FLASH chips */
-
 int misc_init_r (void)
 {
 	/* adjust flash start and size as well as the offset */

include/configs/MIP405.h

@@ -239,11 +239,17 @@
 /*-----------------------------------------------------------------------
  * FLASH organization
  */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
-#define CONFIG_SYS_MAX_FLASH_SECT	256	/* max number of sectors on one chip	*/
+#define CONFIG_SYS_UPDATE_FLASH_SIZE
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_FLASH_EMPTY_INFO
 
-#define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+
+#define CONFIG_FLASH_SHOW_PROGRESS	45
+
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+#define CONFIG_SYS_MAX_FLASH_SECT	256
 
 /*
  * JFFS2 partitions
@@ -291,6 +297,7 @@
 #define FLASH_SIZE_PRELIM	 3  /* maximal flash FLASH size bank #0	*/
 
 #define CONFIG_BOARD_EARLY_INIT_F 1
+#define CONFIG_BOARD_EARLY_INIT_R
 
 /* Peripheral Bus Mapping */
 #define PER_PLD_ADDR		0xF4000000 /* smallest window is 1MByte 0x10 0000*/

include/configs/PATI.h

@@ -168,11 +168,16 @@
  *
  */
 
-#define CONFIG_SYS_MAX_FLASH_BANKS		1		/* Max number of memory banks		*/
-#define CONFIG_SYS_MAX_FLASH_SECT		128		/* Max number of sectors on one chip	*/
-#define CONFIG_SYS_FLASH_ERASE_TOUT	180000		/* Timeout for Flash Erase (in ms)	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	600		/* Timeout for Flash Write (in ms)	*/
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_FLASH_EMPTY_INFO
 
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+
+#define CONFIG_FLASH_SHOW_PROGRESS	45
+
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+#define CONFIG_SYS_MAX_FLASH_SECT	128
 
 #define	CONFIG_ENV_IS_IN_EEPROM
 #ifdef	CONFIG_ENV_IS_IN_EEPROM

include/configs/PIP405.h

@@ -113,6 +113,8 @@
 #define SPD_EEPROM_ADDRESS      0x50
 
 #define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_EARLY_INIT_R
+
 /**************************************************************
  * Environment definitions
  **************************************************************/
@@ -230,11 +232,17 @@
 /*-----------------------------------------------------------------------
  * FLASH organization
  */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
-#define CONFIG_SYS_MAX_FLASH_SECT	256	/* max number of sectors on one chip	*/
+#define CONFIG_SYS_UPDATE_FLASH_SIZE
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_FLASH_EMPTY_INFO
+
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+
+#define CONFIG_FLASH_SHOW_PROGRESS	45
 
-#define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+#define CONFIG_SYS_MAX_FLASH_SECT	256
 
 /*
  * Init Memory Controller:

include/gdsys_fpga.h

@@ -82,7 +82,10 @@ typedef struct ihs_fpga {
 	u16 reserved_1[502];	/* 0x0014 */
 	u16 ch0_status_int;	/* 0x0400 */
 	u16 ch0_config_int;	/* 0x0402 */
-	u16 reserved_2[7677];	/* 0x0404 */
+	u16 reserved_2[126];	/* 0x0404 */
+	u16 ch0_hicb_status_int;/* 0x0500 */
+	u16 ch0_hicb_config_int;/* 0x0502 */
+	u16 reserved_3[7549];	/* 0x0504 */
 	u16 reflection_high;	/* 0x3ffe */
 } ihs_fpga_t;
 #endif