Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv

arch/riscv/dts/Makefile

@@ -5,7 +5,7 @@ dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += microchip-mpfs-icicle-kit.dtb
 dtb-$(CONFIG_TARGET_QEMU_VIRT) += qemu-virt.dtb
 dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb
 dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb
-dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb hifive-unmatched-a00-rev1.dtb
+dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb
 dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
 
 targets += $(dtb-y)

arch/riscv/dts/hifive-unmatched-a00-rev1-u-boot.dtsi

-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright (C) 2021 SiFive, Inc
- */
-
-#include "hifive-unmatched-a00-u-boot.dtsi"
-#include "fu740-hifive-unmatched-a00-ddr-rev1.dtsi"

arch/riscv/dts/hifive-unmatched-a00-rev1.dts

-// SPDX-License-Identifier: GPL-2.0+
-/* Copyright (c) 2021 SiFive, Inc */
-
-#include "hifive-unmatched-a00.dts"

arch/riscv/lib/image.c

@@ -50,7 +50,12 @@ int booti_setup(ulong image, ulong *relocated_addr, ulong *size,
 		return -EINVAL;
 	}
 	*size = lhdr->image_size;
-	*relocated_addr = gd->ram_base + lhdr->text_offset;
+	if (force_reloc ||
+	   (gd->ram_base <= image && image < gd->ram_base + gd->ram_size)) {
+		*relocated_addr = gd->ram_base + lhdr->text_offset;
+	} else {
+		*relocated_addr = image;
+	}
 
 	unmap_sysmem(lhdr);
 

board/sifive/unmatched/hifive-platform-i2c-eeprom.c

@@ -401,24 +401,6 @@ static void set_product_id(char *string)
 	update_crc();
 }
 
-/**
- * set_serial_number() - set the PCB serial number in the in-memory copy
- *
- * Set the board serial number in the in-memory EEPROM copy from the supplied
- * string argument, and update the CRC.
- */
-static void set_serial_number(char *string)
-{
-	if (strlen(string) > SERIAL_NUMBER_BYTES) {
-		printf("Serial number must not be greater than 16 bytes\n");
-		return;
-	}
-
-	memset(e.serial, 0, sizeof(e.serial));
-	strncpy((char *)e.serial, string, sizeof(e.serial));
-	update_crc();
-}
-
 /**
  * init_local_copy() - initialize the in-memory EEPROM copy
  *
@@ -468,10 +450,7 @@ int do_mac(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 		return 0;
 	}
 
-	if (!strcmp(cmd, "serial_number")) {
-		set_serial_number(argv[2]);
-		return 0;
-	} else if (!strcmp(cmd, "manuf_test_status")) {
+	if (!strcmp(cmd, "manuf_test_status")) {
 		set_manuf_test_status(argv[2]);
 		return 0;
 	} else if (!strcmp(cmd, "mac_address")) {

board/sifive/unmatched/spl.c

@@ -10,68 +10,111 @@
 #include <spl.h>
 #include <misc.h>
 #include <log.h>
-#include <fdtdec.h>
-#include <dm/root.h>
 #include <linux/delay.h>
 #include <linux/io.h>
 #include <asm/gpio.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/spl.h>
-#include <asm/arch/eeprom.h>
 
+#define UBRDG_RESET	SIFIVE_GENERIC_GPIO_NR(0, 7)
+#define ULPI_RESET	SIFIVE_GENERIC_GPIO_NR(0, 9)
+#define UHUB_RESET	SIFIVE_GENERIC_GPIO_NR(0, 11)
 #define GEM_PHY_RESET	SIFIVE_GENERIC_GPIO_NR(0, 12)
 
 #define MODE_SELECT_REG		0x1000
 #define MODE_SELECT_SD		0xb
 #define MODE_SELECT_MASK	GENMASK(3, 0)
 
-int spl_board_init_f(void)
+static inline int spl_reset_device_by_gpio(const char *label, int pin, int low_width)
 {
 	int ret;
 
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT)
-	int rescan;
-
-	ret = fdtdec_resetup(&rescan);
-	if (!ret && rescan) {
-		dm_uninit();
-		dm_init_and_scan(true);
+	ret = gpio_request(pin, label);
+	if (ret) {
+		debug("%s gpio request failed: %d\n", label, ret);
+		return ret;
 	}
-#endif
 
-	ret = spl_soc_init();
+	ret = gpio_direction_output(pin, 1);
 	if (ret) {
-		debug("HiFive Unmatched FU740 SPL init failed: %d\n", ret);
+		debug("%s gpio direction set failed: %d\n", label, ret);
 		return ret;
 	}
 
+	udelay(1);
+
+	gpio_set_value(pin, 0);
+	udelay(low_width);
+	gpio_set_value(pin, 1);
+
+	return ret;
+}
+
+static inline int spl_gemgxl_init(void)
+{
+	int ret;
 	/*
 	 * GEMGXL init VSC8541 PHY reset sequence;
 	 * leave pull-down active for 2ms
 	 */
 	udelay(2000);
-	ret = gpio_request(GEM_PHY_RESET, "gem_phy_reset");
+	ret = spl_reset_device_by_gpio("gem_phy_reset", GEM_PHY_RESET, 1);
+	mdelay(15);
+
+	return ret;
+}
+
+static inline int spl_usb_pcie_bridge_init(void)
+{
+	return spl_reset_device_by_gpio("usb_pcie_bridge_reset", UBRDG_RESET, 3000);
+}
+
+static inline int spl_usb_hub_init(void)
+{
+	return spl_reset_device_by_gpio("usb_hub_reset", UHUB_RESET, 100);
+}
+
+static inline int spl_ulpi_init(void)
+{
+	return spl_reset_device_by_gpio("ulpi_reset", ULPI_RESET, 1);
+}
+
+int spl_board_init_f(void)
+{
+	int ret;
+
+	ret = spl_soc_init();
 	if (ret) {
-		debug("gem_phy_reset gpio request failed: %d\n", ret);
-		return ret;
+		debug("HiFive Unmatched FU740 SPL init failed: %d\n", ret);
+		goto end;
 	}
 
-	/* Set GPIO 12 (PHY NRESET) */
-	ret = gpio_direction_output(GEM_PHY_RESET, 1);
+	ret = spl_gemgxl_init();
 	if (ret) {
-		debug("gem_phy_reset gpio direction set failed: %d\n", ret);
-		return ret;
+		debug("Gigabit ethernet PHY (VSC8541) init failed: %d\n", ret);
+		goto end;
 	}
 
-	udelay(1);
+	ret = spl_usb_pcie_bridge_init();
+	if (ret) {
+		debug("USB Bridge (ASM1042A) init failed: %d\n", ret);
+		goto end;
+	}
 
-	/* Reset PHY again to enter unmanaged mode */
-	gpio_set_value(GEM_PHY_RESET, 0);
-	udelay(1);
-	gpio_set_value(GEM_PHY_RESET, 1);
-	mdelay(15);
+	ret = spl_usb_hub_init();
+	if (ret) {
+		debug("USB Hub (ASM1074) init failed: %d\n", ret);
+		goto end;
+	}
 
-	return 0;
+	ret = spl_ulpi_init();
+	if (ret) {
+		debug("USB 2.0 PHY (USB3320C) init failed: %d\n", ret);
+		goto end;
+	}
+
+end:
+	return ret;
 }
 
 u32 spl_boot_device(void)
@@ -92,18 +135,7 @@ u32 spl_boot_device(void)
 #ifdef CONFIG_SPL_LOAD_FIT
 int board_fit_config_name_match(const char *name)
 {
-	/*
-	 * Apply different DDR params on different board revision.
-	 * Use PCB revision which is byte 0x7 in I2C platform EEPROM
-	 * to distinguish that.
-	 */
-	if (get_pcb_revision_from_eeprom() == PCB_REVISION_REV3 &&
-	    !strcmp(name, "hifive-unmatched-a00"))
-		return 0;
-	else if (get_pcb_revision_from_eeprom() != PCB_REVISION_REV3 &&
-		 !strcmp(name, "hifive-unmatched-a00-rev1"))
-		return 0;
-
-	return -1;
+	/* boot using first FIT config */
+	return 0;
 }
 #endif

configs/sifive_unmatched_defconfig

@@ -5,7 +5,6 @@ CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL_DM_SPI=y
 CONFIG_DEFAULT_DEVICE_TREE="hifive-unmatched-a00"
 CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000
 CONFIG_SPL=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_TARGET_SIFIVE_UNMATCHED=y
@@ -28,9 +27,6 @@ CONFIG_CMD_PWM=y
 CONFIG_CMD_GPT_RENAME=y
 CONFIG_CMD_PCI=y
 CONFIG_CMD_USB=y
-CONFIG_SPL_MULTI_DTB_FIT=y
-CONFIG_SPL_OF_LIST="hifive-unmatched-a00 hifive-unmatched-a00-rev1"
-CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_SPL_CLK=y
 CONFIG_E1000=y