SPEAr: Correct SoC ID offset in misc configuration space
SoC Core ID offset is 0x30 in miscellaneous configuration address space. It was wrongly mentioned as periph2 clk enable. Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com> Signed-off-by: NAmit Virdi <amit.virdi@st.com> Acked-by: NStefan Roese <sr@denx.de> Signed-off-by: NStefan Roese <sr@denx.de>
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