bcm63158: add initial support

This add the initial support of the broadcom bcm63158 SoC family,
only the cpu, dram and uart are supported.
Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com>

arch/arm/Kconfig

@@ -528,6 +528,12 @@ config ARCH_BCM283X
 	imply CMD_DM
 	imply FAT_WRITE
 
+config ARCH_BCM63158
+	bool "Broadcom BCM63158 family"
+	select DM
+	select OF_CONTROL
+	imply CMD_DM
+
 config ARCH_BCM6858
 	bool "Broadcom BCM6858 family"
 	select DM

arch/arm/dts/bcm63158.dtsi

+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Philippe Reynes <philippe.reynes@softathome.com>
+ */
+
+#include "skeleton64.dtsi"
+
+/ {
+	compatible = "brcm,bcm63158";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+		u-boot,dm-pre-reloc;
+
+		cpu0: cpu@0 {
+			compatible = "arm,cortex-a53", "arm,armv8";
+			device_type = "cpu";
+			reg = <0x0 0x0>;
+			next-level-cache = <&l2>;
+			u-boot,dm-pre-reloc;
+		};
+
+		cpu1: cpu@1 {
+			compatible = "arm,cortex-a53", "arm,armv8";
+			device_type = "cpu";
+			reg = <0x0 0x1>;
+			next-level-cache = <&l2>;
+			u-boot,dm-pre-reloc;
+		};
+
+		cpu2: cpu@2 {
+			compatible = "arm,cortex-a53", "arm,armv8";
+			device_type = "cpu";
+			reg = <0x0 0x2>;
+			next-level-cache = <&l2>;
+			u-boot,dm-pre-reloc;
+		};
+
+		cpu3: cpu@3 {
+			compatible = "arm,cortex-a53", "arm,armv8";
+			device_type = "cpu";
+			reg = <0x0 0x3>;
+			next-level-cache = <&l2>;
+			u-boot,dm-pre-reloc;
+		};
+
+		l2: l2-cache0 {
+			compatible = "cache";
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	clocks {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		u-boot,dm-pre-reloc;
+
+		periph_osc: periph-osc {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <0xbebc200>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	ubus {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		u-boot,dm-pre-reloc;
+
+		uart0: serial@ff812000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x0 0xff812000 0x0 0x1000>;
+			clock = <50000000>;
+
+			status = "disabled";
+		};
+	};
+};