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de4fdfc1
编写于
3月 07, 2014
作者:
A
Albert ARIBAUD
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差异文件
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
上级
dd1e8583
f940c72e
变更
14
隐藏空白更改
内联
并排
Showing
14 changed file
with
95 addition
and
51 deletion
+95
-51
arch/arm/cpu/arm720t/tegra-common/cpu.c
arch/arm/cpu/arm720t/tegra-common/cpu.c
+2
-3
arch/arm/cpu/arm720t/tegra124/cpu.c
arch/arm/cpu/arm720t/tegra124/cpu.c
+2
-2
arch/arm/include/asm/arch-tegra/pmc.h
arch/arm/include/asm/arch-tegra/pmc.h
+11
-0
arch/arm/include/asm/arch-tegra/tegra.h
arch/arm/include/asm/arch-tegra/tegra.h
+5
-0
arch/arm/include/asm/arch-tegra114/tegra.h
arch/arm/include/asm/arch-tegra114/tegra.h
+2
-0
arch/arm/include/asm/arch-tegra124/tegra.h
arch/arm/include/asm/arch-tegra124/tegra.h
+2
-0
arch/arm/include/asm/arch-tegra20/tegra.h
arch/arm/include/asm/arch-tegra20/tegra.h
+2
-0
arch/arm/include/asm/arch-tegra30/tegra.h
arch/arm/include/asm/arch-tegra30/tegra.h
+2
-0
include/configs/tegra-common-post.h
include/configs/tegra-common-post.h
+47
-10
include/configs/tegra-common.h
include/configs/tegra-common.h
+4
-16
include/configs/tegra114-common.h
include/configs/tegra114-common.h
+5
-5
include/configs/tegra124-common.h
include/configs/tegra124-common.h
+1
-5
include/configs/tegra20-common.h
include/configs/tegra20-common.h
+5
-5
include/configs/tegra30-common.h
include/configs/tegra30-common.h
+5
-5
未找到文件。
arch/arm/cpu/arm720t/tegra-common/cpu.c
浏览文件 @
de4fdfc1
...
...
@@ -378,8 +378,7 @@ void clock_enable_coresight(int enable)
void
halt_avp
(
void
)
{
for
(;;)
{
writel
((
HALT_COP_EVENT_JTAG
|
HALT_COP_EVENT_IRQ_1
\
|
HALT_COP_EVENT_FIQ_1
|
(
FLOW_MODE_STOP
<<
29
)),
FLOW_CTLR_HALT_COP_EVENTS
);
writel
(
HALT_COP_EVENT_JTAG
|
(
FLOW_MODE_STOP
<<
29
),
FLOW_CTLR_HALT_COP_EVENTS
);
}
}
arch/arm/cpu/arm720t/tegra124/cpu.c
浏览文件 @
de4fdfc1
...
...
@@ -252,8 +252,8 @@ void start_cpu(u32 reset_vector)
tegra124_init_clocks
();
/* Set power-gating timer multiplier */
clrbits_le32
(
&
pmc
->
pmc_pwrgate_timer_mult
,
TIMER_MULT_MASK
);
setbits_le32
(
&
pmc
->
pmc_pwrgate_timer_mult
,
MULT_8
);
writel
((
MULT_8
<<
TIMER_MULT_SHIFT
)
|
(
MULT_8
<<
TIMER_MULT_CPU_SHIFT
),
&
pmc
->
pmc_pwrgate_timer_mult
);
enable_cpu_power_rail
();
enable_cpu_clocks
();
...
...
arch/arm/include/asm/arch-tegra/pmc.h
浏览文件 @
de4fdfc1
...
...
@@ -298,14 +298,25 @@ struct pmc_ctlr {
#define PMC_XOFS_SHIFT 1
#define PMC_XOFS_MASK (0x3F << PMC_XOFS_SHIFT)
#if defined(CONFIG_TEGRA114)
#define TIMER_MULT_SHIFT 0
#define TIMER_MULT_MASK (3 << TIMER_MULT_SHIFT)
#define TIMER_MULT_CPU_SHIFT 2
#define TIMER_MULT_CPU_MASK (3 << TIMER_MULT_CPU_SHIFT)
#elif defined(CONFIG_TEGRA124)
#define TIMER_MULT_SHIFT 0
#define TIMER_MULT_MASK (7 << TIMER_MULT_SHIFT)
#define TIMER_MULT_CPU_SHIFT 3
#define TIMER_MULT_CPU_MASK (7 << TIMER_MULT_CPU_SHIFT)
#endif
#define MULT_1 0
#define MULT_2 1
#define MULT_4 2
#define MULT_8 3
#if defined(CONFIG_TEGRA124)
#define MULT_16 4
#endif
#define AMAP_WRITE_SHIFT 20
#define AMAP_WRITE_ON (1 << AMAP_WRITE_SHIFT)
...
...
arch/arm/include/asm/arch-tegra/tegra.h
浏览文件 @
de4fdfc1
...
...
@@ -34,7 +34,12 @@
#define NV_PA_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400)
#define NV_PA_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400)
#define NV_PA_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800)
#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \
defined(CONFIG_TEGRA114)
#define NV_PA_CSITE_BASE 0x70040000
#else
#define NV_PA_CSITE_BASE 0x70800000
#endif
#define TEGRA_USB_ADDR_MASK 0xFFFFC000
#define NV_PA_SDRC_CS0 NV_PA_SDRAM_BASE
...
...
arch/arm/include/asm/arch-tegra114/tegra.h
浏览文件 @
de4fdfc1
...
...
@@ -17,6 +17,8 @@
#ifndef _TEGRA114_H_
#define _TEGRA114_H_
#define CONFIG_TEGRA114
#define NV_PA_SDRAM_BASE 0x80000000
/* 0x80000000 for real T114 */
#define NV_PA_TSC_BASE 0x700F0000
/* System Counter TSC regs */
...
...
arch/arm/include/asm/arch-tegra124/tegra.h
浏览文件 @
de4fdfc1
...
...
@@ -8,6 +8,8 @@
#ifndef _TEGRA124_H_
#define _TEGRA124_H_
#define CONFIG_TEGRA124
#define NV_PA_SDRAM_BASE 0x80000000
#define NV_PA_TSC_BASE 0x700F0000
/* System Counter TSC regs */
#define NV_PA_MC_BASE 0x70019000
/* Mem Ctlr regs (MCB, etc.) */
...
...
arch/arm/include/asm/arch-tegra20/tegra.h
浏览文件 @
de4fdfc1
...
...
@@ -8,6 +8,8 @@
#ifndef _TEGRA20_H_
#define _TEGRA20_H_
#define CONFIG_TEGRA20
#define NV_PA_SDRAM_BASE 0x00000000
#include <asm/arch-tegra/tegra.h>
...
...
arch/arm/include/asm/arch-tegra30/tegra.h
浏览文件 @
de4fdfc1
...
...
@@ -17,6 +17,8 @@
#ifndef _TEGRA30_H_
#define _TEGRA30_H_
#define CONFIG_TEGRA30
#define NV_PA_SDRAM_BASE 0x80000000
/* 0x80000000 for real T30 */
#include <asm/arch-tegra/tegra.h>
...
...
include/configs/tegra-common-post.h
浏览文件 @
de4fdfc1
...
...
@@ -66,27 +66,63 @@
#define BOOT_TARGETS_DHCP ""
#endif
#if defined(CONFIG_CMD_DHCP) && defined(CONFIG_CMD_PXE)
#define BOOTCMDS_PXE \
"bootcmd_pxe=" \
BOOTCMD_INIT_USB \
"dhcp; " \
"if pxe get; then " \
"pxe boot; " \
"fi\0"
#define BOOT_TARGETS_PXE "pxe"
#else
#define BOOTCMDS_PXE ""
#define BOOT_TARGETS_PXE ""
#endif
#define BOOTCMDS_COMMON \
"rootpart=1\0" \
\
"do_script_boot=" \
"load ${devtype} ${devnum}:${rootpart} " \
"${scriptaddr} ${prefix}${script}; " \
"source ${scriptaddr}\0" \
\
"script_boot=" \
"if load ${devtype} ${devnum}:${rootpart} " \
"${scriptaddr} ${prefix}${script}; then " \
"echo ${script} found! Executing ...;" \
"source ${scriptaddr};" \
"fi;\0" \
"for script in ${boot_scripts}; do " \
"if test -e ${devtype} ${devnum}:${rootpart} " \
"${prefix}${script}; then " \
"echo Found U-Boot script " \
"${prefix}${script}; " \
"run do_script_boot; " \
"echo SCRIPT FAILED: continuing...; " \
"fi; " \
"done\0" \
\
"do_sysboot_boot=" \
"sysboot ${devtype} ${devnum}:${rootpart} any " \
"${scriptaddr} ${prefix}extlinux.conf\0" \
\
"sysboot_boot=" \
"if test -e ${devtype} ${devnum}:${rootpart} " \
"${prefix}extlinux.conf; then " \
"echo Found extlinux config " \
"${prefix}extlinux.conf; " \
"run do_sysboot_boot; " \
"echo SCRIPT FAILED: continuing...; " \
"fi\0" \
\
"scan_boot=" \
"echo Scanning ${devtype} ${devnum}...; " \
"for prefix in ${boot_prefixes}; do " \
"for script in ${boot_scripts}; do " \
"run script_boot; " \
"done; " \
"done;\0" \
"run sysboot_boot; " \
"run script_boot; " \
"done\0" \
\
"boot_targets=" \
BOOT_TARGETS_MMC " " \
BOOT_TARGETS_USB " " \
BOOT_TARGETS_PXE " " \
BOOT_TARGETS_DHCP " " \
"\0" \
\
...
...
@@ -96,7 +132,8 @@
\
BOOTCMDS_MMC \
BOOTCMDS_USB \
BOOTCMDS_DHCP
BOOTCMDS_DHCP \
BOOTCMDS_PXE
#define CONFIG_BOOTCOMMAND \
"set usb_need_init; " \
...
...
include/configs/tegra-common.h
浏览文件 @
de4fdfc1
...
...
@@ -29,7 +29,6 @@
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_CMDLINE_TAG
/* enable passing of ATAGs */
#define CONFIG_OF_LIBFDT
/* enable passing of devicetree */
/* Environment */
#define CONFIG_ENV_VARS_UBOOT_CONFIG
...
...
@@ -69,33 +68,20 @@
#undef CONFIG_CMD_NET
/* network support */
/* turn on command-line edit/hist/auto */
#define CONFIG_CMDLINE_EDITING
#define CONFIG_COMMAND_HISTORY
#define CONFIG_AUTO_COMPLETE
/* turn on commonly used storage-related commands */
#define CONFIG_DOS_PARTITION
#define CONFIG_EFI_PARTITION
#define CONFIG_PARTITION_UUIDS
#define CONFIG_FS_EXT4
#define CONFIG_FS_FAT
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_CMD_FS_GENERIC
#define CONFIG_CMD_PART
#define CONFIG_SYS_NO_FLASH
#define CONFIG_CONSOLE_MUX
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_BOOTDELAY 2
/* -1 to disable auto boot */
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP
/* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER
/* use "hush" command parser */
#define CONFIG_SYS_PROMPT V_PROMPT
/*
* Increasing the size of the IO buffer as default nfsargs size is more
...
...
@@ -133,8 +119,6 @@
#define CONFIG_TEGRA_GPIO
#define CONFIG_CMD_GPIO
#define CONFIG_CMD_ENTERRCM
#define CONFIG_CMD_BOOTZ
#define CONFIG_SUPPORT_RAW_INITRD
/* Defines for SPL */
#define CONFIG_SPL
...
...
@@ -157,4 +141,8 @@
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_CRC32_VERIFY
#ifndef CONFIG_SPL_BUILD
#include <config_distro_defaults.h>
#endif
#endif
/* _TEGRA_COMMON_H_ */
include/configs/tegra114-common.h
浏览文件 @
de4fdfc1
...
...
@@ -26,11 +26,6 @@
*/
#define V_NS16550_CLK 408000000
/* 408MHz (pllp_out0) */
/*
* High Level Configuration Options
*/
#define CONFIG_TEGRA114
/* in a NVidia Tegra114 core */
/* Environment information, boards can override if required */
#define CONFIG_LOADADDR 0x80408000
/* def. location for kernel */
...
...
@@ -51,6 +46,9 @@
* scriptaddr can be pretty much anywhere that doesn't conflict with something
* else. Put it above BOOTMAPSZ to eliminate conflicts.
*
* pxefile_addr_r can be pretty much anywhere that doesn't conflict with
* something else. Put it above BOOTMAPSZ to eliminate conflicts.
*
* kernel_addr_r must be within the first 128M of RAM in order for the
* kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will
* decompress itself to 0x8000 after the start of RAM, kernel_addr_r
...
...
@@ -68,6 +66,7 @@
*/
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x90000000\0" \
"pxefile_addr_r=0x90100000\0" \
"kernel_addr_r=0x81000000\0" \
"fdt_addr_r=0x82000000\0" \
"ramdisk_addr_r=0x82100000\0"
...
...
@@ -83,5 +82,6 @@
/* For USB EHCI controller */
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
#endif
/* _TEGRA114_COMMON_H_ */
include/configs/tegra124-common.h
浏览文件 @
de4fdfc1
...
...
@@ -18,11 +18,6 @@
*/
#define V_NS16550_CLK 408000000
/* 408MHz (pllp_out0) */
/*
* High Level Configuration Options
*/
#define CONFIG_TEGRA124
/* is an NVIDIA Tegra124 core */
/* Environment information, boards can override if required */
#define CONFIG_LOADADDR 0x80408000
/* def. location for kernel */
...
...
@@ -79,5 +74,6 @@
/* For USB EHCI controller */
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
#endif
/* _TEGRA124_COMMON_H_ */
include/configs/tegra20-common.h
浏览文件 @
de4fdfc1
...
...
@@ -24,11 +24,6 @@
*/
#define V_NS16550_CLK 216000000
/* 216MHz (pllp_out0) */
/*
* High Level Configuration Options
*/
#define CONFIG_TEGRA20
/* in a NVidia Tegra20 core */
/* Environment information, boards can override if required */
#define CONFIG_LOADADDR 0x00408000
/* def. location for kernel */
...
...
@@ -49,6 +44,9 @@
* scriptaddr can be pretty much anywhere that doesn't conflict with something
* else. Put it above BOOTMAPSZ to eliminate conflicts.
*
* pxefile_addr_r can be pretty much anywhere that doesn't conflict with
* something else. Put it above BOOTMAPSZ to eliminate conflicts.
*
* kernel_addr_r must be within the first 128M of RAM in order for the
* kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will
* decompress itself to 0x8000 after the start of RAM, kernel_addr_r
...
...
@@ -66,6 +64,7 @@
*/
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x10000000\0" \
"pxefile_addr_r=0x10100000\0" \
"kernel_addr_r=0x01000000\0" \
"fdt_addr_r=0x02000000\0" \
"ramdisk_addr_r=0x02100000\0"
...
...
@@ -96,6 +95,7 @@
*/
#define CONFIG_USB_EHCI_TXFIFO_THRESH 10
#define CONFIG_EHCI_IS_TDI
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
/* Total I2C ports on Tegra20 */
#define TEGRA_I2C_NUM_CONTROLLERS 4
...
...
include/configs/tegra30-common.h
浏览文件 @
de4fdfc1
...
...
@@ -23,11 +23,6 @@
*/
#define V_NS16550_CLK 408000000
/* 408MHz (pllp_out0) */
/*
* High Level Configuration Options
*/
#define CONFIG_TEGRA30
/* in a NVidia Tegra30 core */
/* Environment information, boards can override if required */
#define CONFIG_LOADADDR 0x80408000
/* def. location for kernel */
...
...
@@ -48,6 +43,9 @@
* scriptaddr can be pretty much anywhere that doesn't conflict with something
* else. Put it above BOOTMAPSZ to eliminate conflicts.
*
* pxefile_addr_r can be pretty much anywhere that doesn't conflict with
* something else. Put it above BOOTMAPSZ to eliminate conflicts.
*
* kernel_addr_r must be within the first 128M of RAM in order for the
* kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will
* decompress itself to 0x8000 after the start of RAM, kernel_addr_r
...
...
@@ -65,6 +63,7 @@
*/
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x90000000\0" \
"pxefile_addr_r=0x90100000\0" \
"kernel_addr_r=0x81000000\0" \
"fdt_addr_r=0x82000000\0" \
"ramdisk_addr_r=0x82100000\0"
...
...
@@ -80,5 +79,6 @@
/* For USB EHCI controller */
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
#endif
/* _TEGRA30_COMMON_H_ */
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