提交 da1cd955 编写于 作者: D Dipen Dudhat 提交者: Kumar Gala

ppc/85xx: Fix up eSDHC controller clock frequency in the device tree

Signed-off-by: NDipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
上级 2abbd31d
......@@ -27,6 +27,9 @@
#include <libfdt.h>
#include <fdt_support.h>
#include <asm/processor.h>
#ifdef CONFIG_FSL_ESDHC
#include <fsl_esdhc.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
......@@ -326,4 +329,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
#endif
ft_fixup_cache(blob);
#if defined(CONFIG_FSL_ESDHC)
fdt_fixup_esdhc(blob, bd);
#endif
}
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