提交 d5914017 编写于 作者: M Marek Vasut 提交者: Albert Aribaud

iMX5: EfikaMX: Preliminary board support

Supported:
MMC
IDE
PMIC
SPI flash
LEDs

I can boot the kernel supplied by freescale/genesi with this from MMC card
and/or PATA disk.
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com>
上级 8a1edd7d
...@@ -833,6 +833,7 @@ Marek Vasut <marek.vasut@gmail.com> ...@@ -833,6 +833,7 @@ Marek Vasut <marek.vasut@gmail.com>
palmtc xscale palmtc xscale
vpac270 xscale vpac270 xscale
zipitz2 xscale zipitz2 xscale
efikamx i.MX51
Hugo Villeneuve <hugo.villeneuve@lyrtech.com> Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
......
#
# Copyright (C) 2010, Marek Vasut <marek.vasut@gmail.com>
#
# BASED ON: imx51evk
#
# Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
#
# (C) Copyright 2009 Freescale Semiconductor, Inc.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
COBJS := efikamx.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(call cmd_link_o_target, $(OBJS) $(SOBJS))
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
#
# Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
CONFIG_SYS_TEXT_BASE = 0x97800000
IMX_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/imximage.cfg
ALL += $(obj)u-boot.imx
此差异已折叠。
#
# Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
#
# BASED ON: imx51evk
#
# (C) Copyright 2009
# Stefano Babic DENX Software Engineering sbabic@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not write to the Free Software
# Foundation Inc. 51 Franklin Street Fifth Floor Boston,
# MA 02110-1301 USA
#
# Refer docs/README.imxmage for more details about how-to configure
# and create imximage boot image
#
# The syntax is taken as close as possible with the kwbimage
# Boot Device : one of
# spi, sd (the board has no nand neither onenand)
BOOT_FROM spi
# Device Configuration Data (DCD)
#
# Each entry must have the format:
# Addr-type Address Value
#
# where:
# Addr-type register length (1,2 or 4 bytes)
# Address absolute address of the register
# value value to be stored in the register
# Setting IOMUXC
DATA 4 0x73fa88a0 0x000
DATA 4 0x73fa850c 0x20c5
DATA 4 0x73fa8510 0x20c5
DATA 4 0x73fa883c 0x5
DATA 4 0x73fa8848 0x5
DATA 4 0x73fa84b8 0xe7
DATA 4 0x73fa84bc 0x45
DATA 4 0x73fa84c0 0x45
DATA 4 0x73fa84c4 0x45
DATA 4 0x73fa84c8 0x45
DATA 4 0x73fa8820 0x0
DATA 4 0x73fa84a4 0x5
DATA 4 0x73fa84a8 0x5
DATA 4 0x73fa84ac 0xe5
DATA 4 0x73fa84b0 0xe5
DATA 4 0x73fa84b4 0xe5
DATA 4 0x73fa84cc 0xe5
DATA 4 0x73fa84d0 0xe4
DATA 4 0x73fa882c 0x4
DATA 4 0x73fa88a4 0x4
DATA 4 0x73fa88ac 0x4
DATA 4 0x73fa88b8 0x4
# Setting DDR for micron
# 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model
# CAS=3 BL=4
# ESDCTL_ESDCTL0
DATA 4 0x83fd9000 0x82a20000
# ESDCTL_ESDCTL1
DATA 4 0x83fd9008 0x82a20000
# ESDCTL_ESDMISC
DATA 4 0x83fd9010 0xcaaaf6d0
# ESDCTL_ESDCFG0
DATA 4 0x83fd9004 0x3f3574aa
# ESDCTL_ESDCFG1
DATA 4 0x83fd900c 0x3f3574aa
# Init DRAM on CS0
# ESDCTL_ESDSCR
DATA 4 0x83fd9014 0x04008008
DATA 4 0x83fd9014 0x0000801a
DATA 4 0x83fd9014 0x0000801b
DATA 4 0x83fd9014 0x00448019
DATA 4 0x83fd9014 0x07328018
DATA 4 0x83fd9014 0x04008008
DATA 4 0x83fd9014 0x00008010
DATA 4 0x83fd9014 0x00008010
DATA 4 0x83fd9014 0x06328018
DATA 4 0x83fd9014 0x03808019
DATA 4 0x83fd9014 0x00408019
DATA 4 0x83fd9014 0x00008000
# Init DRAM on CS1
DATA 4 0x83fd9014 0x0400800c
DATA 4 0x83fd9014 0x0000801e
DATA 4 0x83fd9014 0x0000801f
DATA 4 0x83fd9014 0x0000801d
DATA 4 0x83fd9014 0x0732801c
DATA 4 0x83fd9014 0x0400800c
DATA 4 0x83fd9014 0x00008014
DATA 4 0x83fd9014 0x00008014
DATA 4 0x83fd9014 0x0632801c
DATA 4 0x83fd9014 0x0380801d
DATA 4 0x83fd9014 0x0040801d
DATA 4 0x83fd9014 0x00008004
# Write to CTL0
DATA 4 0x83fd9000 0xb2a20000
# Write to CTL1
DATA 4 0x83fd9008 0xb2a20000
# ESDMISC
DATA 4 0x83fd9010 0x000ad6d0
#ESDCTL_ESDCDLYGD
DATA 4 0x83fd9034 0x90000000
DATA 4 0x83fd9014 0x00000000
...@@ -105,6 +105,7 @@ magnesium arm arm926ejs imx27lite logicpd ...@@ -105,6 +105,7 @@ magnesium arm arm926ejs imx27lite logicpd
omap5912osk arm arm926ejs - ti omap omap5912osk arm arm926ejs - ti omap
edminiv2 arm arm926ejs - LaCie orion5x edminiv2 arm arm926ejs - LaCie orion5x
ca9x4_ct_vxp arm armv7 vexpress armltd ca9x4_ct_vxp arm armv7 vexpress armltd
efikamx arm armv7 efikamx - mx5
mx51evk arm armv7 mx51evk freescale mx5 mx51evk arm armv7 mx51evk freescale mx5
mx53evk arm armv7 mx53evk freescale mx5 mx53evk arm armv7 mx53evk freescale mx5
vision2 arm armv7 vision2 ttcontrol mx5 vision2 arm armv7 vision2 ttcontrol mx5
......
/*
* Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
*
* (C) Copyright 2009 Freescale Semiconductor, Inc.
*
* Configuration settings for the MX51EVK Board
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include <config_cmd_default.h>
/*
* High Level Board Configuration Options
*/
/* An i.MX51 CPU */
#define CONFIG_MX51
#include <asm/arch/imx-regs.h>
#define CONFIG_SYS_MX5_HCLK 24000000
#define CONFIG_SYS_MX5_CLK32 32768
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_L2_OFF
/*
* Bootloader Components Configuration
*/
#define CONFIG_CMD_SPI
#define CONFIG_CMD_SF
#define CONFIG_CMD_MMC
#define CONFIG_CMD_FAT
#define CONFIG_CMD_IDE
#undef CONFIG_CMD_IMLS
/*
* Environmental settings
*/
#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
#define CONFIG_ENV_SECT_SIZE (1 * 64 * 1024)
#define CONFIG_ENV_SIZE (4 * 1024)
/*
* ATAG setup
*/
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/*
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
#define CONFIG_BOARD_EARLY_INIT_F
#define BOARD_LATE_INIT
/*
* Hardware drivers
*/
#define CONFIG_MXC_UART
#define CONFIG_SYS_MX51_UART1
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
#define CONFIG_MXC_GPIO
/*
* SPI Interface
*/
#ifdef CONFIG_CMD_SPI
#define CONFIG_HARD_SPI
#define CONFIG_MXC_SPI
#define CONFIG_DEFAULT_SPI_BUS 1
#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
/* SPI FLASH */
#ifdef CONFIG_CMD_SF
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_SST
#define CONFIG_SPI_FLASH_CS (1 | 121 << 8)
#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
#define CONFIG_SF_DEFAULT_SPEED 25000000
#define CONFIG_ENV_SPI_CS (1 | 121 << 8)
#define CONFIG_ENV_SPI_BUS 0
#define CONFIG_ENV_SPI_MAX_HZ 25000000
#define CONFIG_ENV_SPI_MODE (SPI_MODE_0)
#define CONFIG_FSL_ENV_IN_SF
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_SYS_NO_FLASH
#else
#define CONFIG_ENV_IS_NOWHERE
#endif
/* SPI PMIC */
#define CONFIG_FSL_PMIC
#define CONFIG_FSL_PMIC_BUS 0
#define CONFIG_FSL_PMIC_CS (0 | 120 << 8)
#define CONFIG_FSL_PMIC_CLK 25000000
#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
#define CONFIG_RTC_MC13783
#endif
/*
* MMC Configs
*/
#ifdef CONFIG_CMD_MMC
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_ESDHC_NUM 2
#endif
/*
* ATA/IDE
*/
#ifdef CONFIG_CMD_IDE
#define CONFIG_LBA48
#undef CONFIG_IDE_LED
#undef CONFIG_IDE_RESET
#define CONFIG_MX51_PATA
#define __io
#define CONFIG_SYS_IDE_MAXBUS 1
#define CONFIG_SYS_IDE_MAXDEVICE 1
#define CONFIG_SYS_ATA_BASE_ADDR 0x83fe0000
#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
#define CONFIG_SYS_ATA_DATA_OFFSET 0xa0
#define CONFIG_SYS_ATA_REG_OFFSET 0xa0
#define CONFIG_SYS_ATA_ALT_OFFSET 0xd8
#define CONFIG_SYS_ATA_STRIDE 4
#define CONFIG_IDE_PREINIT
#define CONFIG_MXC_ATA_PIO_MODE 4
#endif
/*
* Filesystems
*/
#ifdef CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
#endif
#undef CONFIG_CMD_PING
#undef CONFIG_CMD_DHCP
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#define CONFIG_CMD_DATE
/*
* Miscellaneous configurable options
*/
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BOOTDELAY 3
#define CONFIG_LOADADDR 0x90800000
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_PROMPT "Efika> "
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_MEMTEST_START 0x90000000
#define CONFIG_SYS_MEMTEST_END 0x10000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
#define CONFIG_CMDLINE_EDITING
/*-----------------------------------------------------------------------
* Stack sizes
*
* The stack sizes are set up in start.S using the settings below
*/
#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 CSD0_BASE_ADDR
#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_DDR_CLKSEL 0
#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
#endif
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