提交 ca935128 编写于 作者: W Wolfgang Denk

Merge branch 'master' of git://www.denx.de/git/u-boot-net

......@@ -1561,6 +1561,10 @@ The following options need to be configured:
before giving up the operation. If not defined, a
default value of 5 is used.
CONFIG_ARP_TIMEOUT
Timeout waiting for an ARP reply in milliseconds.
- Command Interpreter:
CONFIG_AUTO_COMPLETE
......
......@@ -42,7 +42,10 @@ COBJS-y += lan91c96.o
COBJS-y += macb.o
COBJS-y += mcffec.o
COBJS-y += natsemi.o
COBJS-$(CONFIG_DRIVER_NE2000) += ne2000.o
ifeq ($(CONFIG_DRIVER_NE2000),y)
COBJS-y += ne2000.o
COBJS-$(CONFIG_DRIVER_AX88796L) += ax88796.o
endif
COBJS-y += netarm_eth.o
COBJS-y += netconsole.o
COBJS-y += ns7520_eth.o
......
/*
* (c) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <common.h>
#include "ax88796.h"
/*
* Set 1 bit data
*/
static void ax88796_bitset(u32 bit)
{
/* DATA1 */
if( bit )
EEDI_HIGH;
else
EEDI_LOW;
EECLK_LOW;
udelay(1000);
EECLK_HIGH;
udelay(1000);
EEDI_LOW;
}
/*
* Get 1 bit data
*/
static u8 ax88796_bitget(void)
{
u8 bit;
EECLK_LOW;
udelay(1000);
/* DATA */
bit = EEDO;
EECLK_HIGH;
udelay(1000);
return bit;
}
/*
* Send COMMAND to EEPROM
*/
static void ax88796_eep_cmd(u8 cmd)
{
ax88796_bitset(BIT_DUMMY);
switch(cmd){
case MAC_EEP_READ:
ax88796_bitset(1);
ax88796_bitset(1);
ax88796_bitset(0);
break;
case MAC_EEP_WRITE:
ax88796_bitset(1);
ax88796_bitset(0);
ax88796_bitset(1);
break;
case MAC_EEP_ERACE:
ax88796_bitset(1);
ax88796_bitset(1);
ax88796_bitset(1);
break;
case MAC_EEP_EWEN:
ax88796_bitset(1);
ax88796_bitset(0);
ax88796_bitset(0);
break;
case MAC_EEP_EWDS:
ax88796_bitset(1);
ax88796_bitset(0);
ax88796_bitset(0);
break;
default:
break;
}
}
static void ax88796_eep_setaddr(u16 addr)
{
int i ;
for( i = 7 ; i >= 0 ; i-- )
ax88796_bitset(addr & (1 << i));
}
/*
* Get data from EEPROM
*/
static u16 ax88796_eep_getdata(void)
{
ushort data = 0;
int i;
ax88796_bitget(); /* DUMMY */
for( i = 0 ; i < 16 ; i++ ){
data <<= 1;
data |= ax88796_bitget();
}
return data;
}
static void ax88796_mac_read(u8 *buff)
{
int i ;
u16 data;
u16 addr = 0;
for( i = 0 ; i < 3; i++ )
{
EECS_HIGH;
EEDI_LOW;
udelay(1000);
/* READ COMMAND */
ax88796_eep_cmd(MAC_EEP_READ);
/* ADDRESS */
ax88796_eep_setaddr(addr++);
/* GET DATA */
data = ax88796_eep_getdata();
*buff++ = (uchar)(data & 0xff);
*buff++ = (uchar)((data >> 8) & 0xff);
EECLK_LOW;
EEDI_LOW;
EECS_LOW;
}
}
int get_prom(u8* mac_addr)
{
u8 prom[32];
int i;
ax88796_mac_read(prom);
for (i = 0; i < 6; i++){
mac_addr[i] = prom[i];
}
return 1;
}
......@@ -78,140 +78,4 @@
#define DP_OUT_DATA(_b_, _d_) *( (vu_short *) ((_b_)+ISA_OFFSET)) = (_d_)
#endif
/*
* Set 1 bit data
*/
static void ax88796_bitset(u32 bit)
{
/* DATA1 */
if( bit )
EEDI_HIGH;
else
EEDI_LOW;
EECLK_LOW;
udelay(1000);
EECLK_HIGH;
udelay(1000);
EEDI_LOW;
}
/*
* Get 1 bit data
*/
static u8 ax88796_bitget(void)
{
u8 bit;
EECLK_LOW;
udelay(1000);
/* DATA */
bit = EEDO;
EECLK_HIGH;
udelay(1000);
return bit;
}
/*
* Send COMMAND to EEPROM
*/
static void ax88796_eep_cmd(u8 cmd)
{
ax88796_bitset(BIT_DUMMY);
switch(cmd){
case MAC_EEP_READ:
ax88796_bitset(1);
ax88796_bitset(1);
ax88796_bitset(0);
break;
case MAC_EEP_WRITE:
ax88796_bitset(1);
ax88796_bitset(0);
ax88796_bitset(1);
break;
case MAC_EEP_ERACE:
ax88796_bitset(1);
ax88796_bitset(1);
ax88796_bitset(1);
break;
case MAC_EEP_EWEN:
ax88796_bitset(1);
ax88796_bitset(0);
ax88796_bitset(0);
break;
case MAC_EEP_EWDS:
ax88796_bitset(1);
ax88796_bitset(0);
ax88796_bitset(0);
break;
default:
break;
}
}
static void ax88796_eep_setaddr(u16 addr)
{
int i ;
for( i = 7 ; i >= 0 ; i-- )
ax88796_bitset(addr & (1 << i));
}
/*
* Get data from EEPROM
*/
static u16 ax88796_eep_getdata(void)
{
ushort data = 0;
int i;
ax88796_bitget(); /* DUMMY */
for( i = 0 ; i < 16 ; i++ ){
data <<= 1;
data |= ax88796_bitget();
}
return data;
}
static void ax88796_mac_read(u8 *buff)
{
int i ;
u16 data, addr = 0;
for( i = 0 ; i < 3; i++ )
{
EECS_HIGH;
EEDI_LOW;
udelay(1000);
/* READ COMMAND */
ax88796_eep_cmd(MAC_EEP_READ);
/* ADDRESS */
ax88796_eep_setaddr(addr++);
/* GET DATA */
data = ax88796_eep_getdata();
*buff++ = (uchar)(data & 0xff);
*buff++ = (uchar)((data >> 8) & 0xff);
EECLK_LOW;
EEDI_LOW;
EECS_LOW;
}
}
int get_prom(u8* mac_addr)
{
u8 prom[32];
int i;
ax88796_mac_read(prom);
for (i = 0; i < 6; i++){
mac_addr[i] = prom[i];
}
return 1;
}
#endif /* __DRIVERS_AX88796L_H__ */
......@@ -65,14 +65,14 @@ static unsigned short get_reg_init_bus (int regno)
c = CS8900_BUS16_0;
CS8900_PPTR = regno;
return (unsigned short) CS8900_PDATA;
return CS8900_PDATA;
}
#endif
static unsigned short get_reg (int regno)
{
CS8900_PPTR = regno;
return (unsigned short) CS8900_PDATA;
return CS8900_PDATA;
}
......@@ -131,7 +131,7 @@ void cs8900_get_enetaddr (uchar * addr)
if (get_reg_init_bus (PP_ChipID) != 0x630e)
return;
eth_reset ();
if ((get_reg (PP_SelfST) & (PP_SelfSTAT_EEPROM | PP_SelfSTAT_EEPROM_OK)) ==
if ((get_reg (PP_SelfSTAT) & (PP_SelfSTAT_EEPROM | PP_SelfSTAT_EEPROM_OK)) ==
(PP_SelfSTAT_EEPROM | PP_SelfSTAT_EEPROM_OK)) {
/* Load the MAC from EEPROM */
......@@ -168,7 +168,6 @@ void cs8900_get_enetaddr (uchar * addr)
debug ("### Set environment from HW MAC addr = \"%s\"\n", ethaddr);
setenv ("ethaddr", ethaddr);
}
}
}
......@@ -183,7 +182,6 @@ void eth_halt (void)
int eth_init (bd_t * bd)
{
/* verify chip id */
if (get_reg_init_bus (PP_ChipID) != 0x630e) {
printf ("CS8900 Ethernet chip not found?!\n");
......@@ -201,7 +199,7 @@ int eth_init (bd_t * bd)
}
/* Get a data block via Ethernet */
extern int eth_rx (void)
int eth_rx (void)
{
int i;
unsigned short rxlen;
......@@ -233,7 +231,7 @@ extern int eth_rx (void)
}
/* Send a data block via Ethernet. */
extern int eth_send (volatile void *packet, int length)
int eth_send (volatile void *packet, int length)
{
volatile unsigned short *addr;
int tmo;
......@@ -281,7 +279,8 @@ retry:
static void cs8900_e2prom_ready(void)
{
while(get_reg(PP_SelfST) & SI_BUSY);
while (get_reg(PP_SelfSTAT) & SI_BUSY)
;
}
/***********************************************************/
......
......@@ -243,7 +243,6 @@
/* EEPROM Kram */
#define SI_BUSY 0x0100
#define PP_SelfST 0x0136 /* Self State register */
#define PP_EECMD 0x0040 /* NVR Interface Command register */
#define PP_EEData 0x0042 /* NVR Interface Data Register */
#define EEPROM_WRITE_EN 0x00F0
......
......@@ -126,6 +126,9 @@ dp83902a_init(void)
{
dp83902a_priv_data_t *dp = &nic;
u8* base;
#if defined(NE2000_BASIC_INIT)
int i;
#endif
DEBUG_FUNCTION();
......@@ -755,8 +758,6 @@ static hw_info_t hw_info[] = {
#define NR_INFO (sizeof(hw_info)/sizeof(hw_info_t))
static hw_info_t default_info = { 0, 0, 0, 0, 0 };
u8 dev_addr[6];
#define PCNET_CMD 0x00
......@@ -764,6 +765,93 @@ u8 dev_addr[6];
#define PCNET_RESET 0x1f /* Issue a read to reset, a write to clear. */
#define PCNET_MISC 0x18 /* For IBM CCAE and Socket EA cards */
static void pcnet_reset_8390(void)
{
int i, r;
PRINTK("nic base is %lx\n", nic_base);
n2k_outb(E8390_NODMA + E8390_PAGE0+E8390_STOP, E8390_CMD);
PRINTK("cmd (at %lx) is %x\n", nic_base + E8390_CMD, n2k_inb(E8390_CMD));
n2k_outb(E8390_NODMA+E8390_PAGE1+E8390_STOP, E8390_CMD);
PRINTK("cmd (at %lx) is %x\n", nic_base + E8390_CMD, n2k_inb(E8390_CMD));
n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
PRINTK("cmd (at %lx) is %x\n", nic_base + E8390_CMD, n2k_inb(E8390_CMD));
n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
n2k_outb(n2k_inb(PCNET_RESET), PCNET_RESET);
for (i = 0; i < 100; i++) {
if ((r = (n2k_inb(EN0_ISR) & ENISR_RESET)) != 0)
break;
PRINTK("got %x in reset\n", r);
udelay(100);
}
n2k_outb(ENISR_RESET, EN0_ISR); /* Ack intr. */
if (i == 100)
printf("pcnet_reset_8390() did not complete.\n");
} /* pcnet_reset_8390 */
int get_prom(u8* mac_addr) __attribute__ ((weak, alias ("__get_prom")));
int __get_prom(u8* mac_addr)
{
u8 prom[32];
int i, j;
struct {
u_char value, offset;
} program_seq[] = {
{E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD}, /* Select page 0*/
{0x48, EN0_DCFG}, /* Set byte-wide (0x48) access. */
{0x00, EN0_RCNTLO}, /* Clear the count regs. */
{0x00, EN0_RCNTHI},
{0x00, EN0_IMR}, /* Mask completion irq. */
{0xFF, EN0_ISR},
{E8390_RXOFF, EN0_RXCR}, /* 0x20 Set to monitor */
{E8390_TXOFF, EN0_TXCR}, /* 0x02 and loopback mode. */
{32, EN0_RCNTLO},
{0x00, EN0_RCNTHI},
{0x00, EN0_RSARLO}, /* DMA starting at 0x0000. */
{0x00, EN0_RSARHI},
{E8390_RREAD+E8390_START, E8390_CMD},
};
PRINTK ("trying to get MAC via prom reading\n");
pcnet_reset_8390 ();
mdelay (10);
for (i = 0; i < sizeof (program_seq) / sizeof (program_seq[0]); i++)
n2k_outb (program_seq[i].value, program_seq[i].offset);
PRINTK ("PROM:");
for (i = 0; i < 32; i++) {
prom[i] = n2k_inb (PCNET_DATAPORT);
PRINTK (" %02x", prom[i]);
}
PRINTK ("\n");
for (i = 0; i < NR_INFO; i++) {
if ((prom[0] == hw_info[i].a0) &&
(prom[2] == hw_info[i].a1) &&
(prom[4] == hw_info[i].a2)) {
PRINTK ("matched board %d\n", i);
break;
}
}
if ((i < NR_INFO) || ((prom[28] == 0x57) && (prom[30] == 0x57))) {
PRINTK ("on exit i is %d/%ld\n", i, NR_INFO);
PRINTK ("MAC address is ");
for (j = 0; j < 6; j++) {
mac_addr[j] = prom[j << 1];
PRINTK ("%02x:", mac_addr[i]);
}
PRINTK ("\n");
return (i < NR_INFO) ? i : 0;
}
return 0;
}
u32 nic_base;
/* U-boot specific routines */
......@@ -790,7 +878,7 @@ void uboot_push_tx_done(int key, int val) {
}
int eth_init(bd_t *bd) {
static hw_info_t * r;
int r;
char ethaddr[20];
PRINTK("### eth_init\n");
......
......@@ -81,6 +81,7 @@ are GPL, so this is, of course, GPL.
#define DP_DATA 0x10
#define START_PG 0x50 /* First page of TX buffer */
#define START_PG2 0x48
#define STOP_PG 0x80 /* Last page +1 of RX ring */
#define RX_START 0x50
......@@ -90,90 +91,4 @@ are GPL, so this is, of course, GPL.
#define DP_OUT(_b_, _o_, _d_) *( (vu_char *) ((_b_)+(_o_))) = (_d_)
#define DP_IN_DATA(_b_, _d_) (_d_) = *( (vu_char *) ((_b_)))
#define DP_OUT_DATA(_b_, _d_) *( (vu_char *) ((_b_))) = (_d_)
static void pcnet_reset_8390(void)
{
int i, r;
PRINTK("nic base is %lx\n", nic_base);
n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
PRINTK("cmd (at %lx) is %x\n", nic_base+ E8390_CMD, n2k_inb(E8390_CMD));
n2k_outb(E8390_NODMA+E8390_PAGE1+E8390_STOP, E8390_CMD);
PRINTK("cmd (at %lx) is %x\n", nic_base+ E8390_CMD, n2k_inb(E8390_CMD));
n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
PRINTK("cmd (at %lx) is %x\n", nic_base+ E8390_CMD, n2k_inb(E8390_CMD));
n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
n2k_outb(n2k_inb(PCNET_RESET), PCNET_RESET);
for (i = 0; i < 100; i++) {
if ((r = (n2k_inb(EN0_ISR) & ENISR_RESET)) != 0)
break;
PRINTK("got %x in reset\n", r);
udelay(100);
}
n2k_outb(ENISR_RESET, EN0_ISR); /* Ack intr. */
if (i == 100)
printf("pcnet_reset_8390() did not complete.\n");
} /* pcnet_reset_8390 */
int get_prom(u8* mac_addr)
{
u8 prom[32];
int i, j;
struct {
u_char value, offset;
} program_seq[] = {
{E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD}, /* Select page 0*/
{0x48, EN0_DCFG}, /* Set byte-wide (0x48) access. */
{0x00, EN0_RCNTLO}, /* Clear the count regs. */
{0x00, EN0_RCNTHI},
{0x00, EN0_IMR}, /* Mask completion irq. */
{0xFF, EN0_ISR},
{E8390_RXOFF, EN0_RXCR}, /* 0x20 Set to monitor */
{E8390_TXOFF, EN0_TXCR}, /* 0x02 and loopback mode. */
{32, EN0_RCNTLO},
{0x00, EN0_RCNTHI},
{0x00, EN0_RSARLO}, /* DMA starting at 0x0000. */
{0x00, EN0_RSARHI},
{E8390_RREAD+E8390_START, E8390_CMD},
};
PRINTK ("trying to get MAC via prom reading\n");
pcnet_reset_8390 ();
mdelay (10);
for (i = 0; i < sizeof (program_seq) / sizeof (program_seq[0]); i++)
n2k_outb (program_seq[i].value, program_seq[i].offset);
PRINTK ("PROM:");
for (i = 0; i < 32; i++) {
prom[i] = n2k_inb (PCNET_DATAPORT);
PRINTK (" %02x", prom[i]);
}
PRINTK ("\n");
for (i = 0; i < NR_INFO; i++) {
if ((prom[0] == hw_info[i].a0) &&
(prom[2] == hw_info[i].a1) &&
(prom[4] == hw_info[i].a2)) {
PRINTK ("matched board %d\n", i);
break;
}
}
if ((i < NR_INFO) || ((prom[28] == 0x57) && (prom[30] == 0x57))) {
PRINTK ("on exit i is %d/%ld\n", i, NR_INFO);
PRINTK ("MAC address is ");
for (j = 0; j < 6; j++) {
mac_addr[j] = prom[j << 1];
PRINTK ("%02x:", mac_addr[i]);
}
PRINTK ("\n");
return (i < NR_INFO) ? i : 0;
}
return NULL;
}
#endif /* __DRIVERS_NE2000_H__ */
......@@ -122,7 +122,6 @@ typedef struct dp83902a_priv_data {
/*
* Some forward declarations
*/
int get_prom( u8* mac_addr);
static void dp83902a_poll(void);
/* ------------------------------------------------------------------------ */
......
......@@ -94,11 +94,22 @@
DECLARE_GLOBAL_DATA_PTR;
#define ARP_TIMEOUT 5UL /* Seconds before trying ARP again */
#ifndef CONFIG_ARP_TIMEOUT
# define ARP_TIMEOUT 50UL /* Deciseconds before trying ARP again */
#elif (CONFIG_ARP_TIMEOUT < 100)
# error "Due to possible overflow CONFIG_ARP_TIMEOUT must be greater than 100ms"
#else
# if (CONFIG_ARP_TIMEOUT % 100)
# warning "Supported ARP_TIMEOUT precision is 100ms"
# endif
# define ARP_TIMEOUT (CONFIG_ARP_TIMEOUT / 100)
#endif
#ifndef CONFIG_NET_RETRY_COUNT
# define ARP_TIMEOUT_COUNT 5 /* # of timeouts before giving up */
# define ARP_TIMEOUT_COUNT 5 /* # of timeouts before giving up */
#else
# define ARP_TIMEOUT_COUNT (CONFIG_NET_RETRY_COUNT)
# define ARP_TIMEOUT_COUNT CONFIG_NET_RETRY_COUNT
#endif
#if 0
......@@ -129,7 +140,7 @@ uchar NetOurEther[6]; /* Our ethernet address */
uchar NetServerEther[6] = /* Boot server enet address */
{ 0, 0, 0, 0, 0, 0 };
IPaddr_t NetOurIP; /* Our IP addr (0 = unknown) */
IPaddr_t NetServerIP; /* Our IP addr (0 = unknown) */
IPaddr_t NetServerIP; /* Server IP addr (0 = unknown) */
volatile uchar *NetRxPkt; /* Current receive packet */
int NetRxPktLen; /* Current rx packet length */
unsigned NetIPID; /* IP packet ID */
......@@ -253,7 +264,7 @@ void ArpTimeoutCheck(void)
t = get_timer(0);
/* check for arp timeout */
if ((t - NetArpWaitTimerStart) > ARP_TIMEOUT * CFG_HZ) {
if ((t - NetArpWaitTimerStart) > ARP_TIMEOUT * CFG_HZ / 10) {
NetArpWaitTry++;
if (NetArpWaitTry >= ARP_TIMEOUT_COUNT) {
......@@ -494,7 +505,7 @@ restart:
* Check the ethernet for a new packet. The ethernet
* receive routine will process it.
*/
eth_rx();
eth_rx();
/*
* Abort if ctrl-c was pressed.
......
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