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体验新版 GitCode,发现更多精彩内容 >>
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c97b6df1
编写于
4月 12, 2013
作者:
A
Albert ARIBAUD
浏览文件
操作
浏览文件
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差异文件
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
上级
60442b30
eef6da03
变更
10
隐藏空白更改
内联
并排
Showing
10 changed file
with
80 addition
and
43 deletion
+80
-43
arch/arm/cpu/arm926ejs/omap/timer.c
arch/arm/cpu/arm926ejs/omap/timer.c
+8
-7
arch/arm/cpu/armv7/omap4/hw_data.c
arch/arm/cpu/armv7/omap4/hw_data.c
+4
-4
arch/arm/include/asm/arch-am33xx/ddr_defs.h
arch/arm/include/asm/arch-am33xx/ddr_defs.h
+10
-10
arch/arm/include/asm/arch-am33xx/spl.h
arch/arm/include/asm/arch-am33xx/spl.h
+5
-0
board/ti/am335x/board.c
board/ti/am335x/board.c
+1
-1
board/ti/omap5912osk/config.mk
board/ti/omap5912osk/config.mk
+6
-6
board/ti/omap5912osk/lowlevel_init.S
board/ti/omap5912osk/lowlevel_init.S
+20
-0
board/ti/omap5912osk/omap5912osk.c
board/ti/omap5912osk/omap5912osk.c
+16
-7
include/configs/omap5912osk.h
include/configs/omap5912osk.h
+9
-6
include/configs/omap5_uevm.h
include/configs/omap5_uevm.h
+1
-2
未找到文件。
arch/arm/cpu/arm926ejs/omap/timer.c
浏览文件 @
c97b6df1
...
...
@@ -36,11 +36,14 @@
*/
#include <common.h>
#include <asm/io.h>
#define TIMER_LOAD_VAL 0xffffffff
#define TIMER_CLOCK (CONFIG_SYS_CLK_FREQ / (2 << CONFIG_SYS_PTV))
#define TIMER_LOAD_VAL 0xffffffff
/* macro to read the 32 bit timer */
#define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+8))
#define READ_TIMER readl(CONFIG_SYS_TIMERBASE+8) \
/ (TIMER_CLOCK / CONFIG_SYS_HZ)
DECLARE_GLOBAL_DATA_PTR
;
...
...
@@ -114,7 +117,8 @@ ulong get_timer_masked (void)
* (TLV-now) amount of time after passing though -1
* nts = new "advancing time stamp"...it could also roll and cause problems.
*/
timestamp
+=
lastdec
+
TIMER_LOAD_VAL
-
now
;
timestamp
+=
lastdec
+
(
TIMER_LOAD_VAL
/
(
TIMER_CLOCK
/
CONFIG_SYS_HZ
))
-
now
;
}
lastdec
=
now
;
...
...
@@ -160,8 +164,5 @@ unsigned long long get_ticks(void)
*/
ulong
get_tbclk
(
void
)
{
ulong
tbclk
;
tbclk
=
CONFIG_SYS_HZ
;
return
tbclk
;
return
CONFIG_SYS_HZ
;
}
arch/arm/cpu/armv7/omap4/hw_data.c
浏览文件 @
c97b6df1
...
...
@@ -216,14 +216,14 @@ struct dplls omap4460_dplls = {
struct
pmic_data
twl6030_4430es1
=
{
.
base_offset
=
PHOENIX_SMPS_BASE_VOLT_STD_MODE_UV
,
.
step
=
12660
,
/* 1
0
mV represented in uV */
.
step
=
12660
,
/* 1
2.66
mV represented in uV */
/* The code starts at 1 not 0 */
.
start_code
=
1
,
};
struct
pmic_data
twl6030
=
{
.
base_offset
=
PHOENIX_SMPS_BASE_VOLT_STD_MODE_WITH_OFFSET_UV
,
.
step
=
12660
,
/* 1
0
mV represented in uV */
.
step
=
12660
,
/* 1
2.66
mV represented in uV */
/* The code starts at 1 not 0 */
.
start_code
=
1
,
};
...
...
@@ -271,11 +271,11 @@ struct vcores_data omap4460_volts = {
.
core
.
value
=
1200
,
.
core
.
addr
=
SMPS_REG_ADDR_VCORE1
,
.
core
.
pmic
=
&
t
ps62361
,
.
core
.
pmic
=
&
t
wl6030
,
.
mm
.
value
=
1200
,
.
mm
.
addr
=
SMPS_REG_ADDR_VCORE2
,
.
mm
.
pmic
=
&
t
ps62361
,
.
mm
.
pmic
=
&
t
wl6030
,
};
/*
...
...
arch/arm/include/asm/arch-am33xx/ddr_defs.h
浏览文件 @
c97b6df1
...
...
@@ -84,19 +84,19 @@
#define MT41J256M8HX15E_IOCTRL_VALUE 0x18B
/* Micron MT41K256M16HA-125E */
#define MT41K256M16HA125E_EMIF_READ_LATENCY 0x10000
6
#define MT41K256M16HA125E_EMIF_TIM1 0x0
888A39
B
#define MT41K256M16HA125E_EMIF_TIM2 0x26
51
7FDA
#define MT41K256M16HA125E_EMIF_TIM3 0x501F8
4E
F
#define MT41K256M16HA125E_EMIF_SDCFG 0x61C0
4B
B2
#define MT41K256M16HA125E_EMIF_SDREF 0x
0000093B
#define MT41K256M16HA125E_EMIF_READ_LATENCY 0x10000
7
#define MT41K256M16HA125E_EMIF_TIM1 0x0
AAAD4D
B
#define MT41K256M16HA125E_EMIF_TIM2 0x26
43
7FDA
#define MT41K256M16HA125E_EMIF_TIM3 0x501F8
3F
F
#define MT41K256M16HA125E_EMIF_SDCFG 0x61C0
52
B2
#define MT41K256M16HA125E_EMIF_SDREF 0x
C30
#define MT41K256M16HA125E_ZQ_CFG 0x50074BE4
#define MT41K256M16HA125E_DLL_LOCK_DIFF 0x1
#define MT41K256M16HA125E_RATIO 0x
4
0
#define MT41K256M16HA125E_RATIO 0x
8
0
#define MT41K256M16HA125E_INVERT_CLKOUT 0x0
#define MT41K256M16HA125E_RD_DQS 0x3
C
#define MT41K256M16HA125E_WR_DQS 0x4
5
#define MT41K256M16HA125E_PHY_WR_DATA 0x7
F
#define MT41K256M16HA125E_RD_DQS 0x3
A
#define MT41K256M16HA125E_WR_DQS 0x4
2
#define MT41K256M16HA125E_PHY_WR_DATA 0x7
E
#define MT41K256M16HA125E_PHY_FIFO_WE 0x9B
#define MT41K256M16HA125E_IOCTRL_VALUE 0x18B
...
...
arch/arm/include/asm/arch-am33xx/spl.h
浏览文件 @
c97b6df1
...
...
@@ -38,6 +38,11 @@
#define BOOT_DEVICE_CPGMAC 70
#define BOOT_DEVICE_MMC2_2 0xFF
#ifdef CONFIG_AM33XX
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2
#elif defined(CONFIG_TI814X)
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC2
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC1
#endif
#endif
board/ti/am335x/board.c
浏览文件 @
c97b6df1
...
...
@@ -379,7 +379,7 @@ void s_init(void)
config_ddr
(
303
,
MT41J128MJT125_IOCTRL_VALUE
,
&
ddr3_data
,
&
ddr3_cmd_ctrl_data
,
&
ddr3_emif_reg_data
,
0
);
else
if
(
board_is_bone_lt
())
config_ddr
(
303
,
MT41K256M16HA125E_IOCTRL_VALUE
,
config_ddr
(
400
,
MT41K256M16HA125E_IOCTRL_VALUE
,
&
ddr3_beagleblack_data
,
&
ddr3_beagleblack_cmd_ctrl_data
,
&
ddr3_beagleblack_emif_reg_data
,
0
);
...
...
board/ti/omap5912osk/config.mk
浏览文件 @
c97b6df1
...
...
@@ -14,17 +14,17 @@
# TI OSK board with OMAP5912 (ARM925EJS) cpu
# see http://www.ti.com/ for more information on Texas Instruments
#
# OSK has 1 bank of
256
MB SDRAM
# OSK has 1 bank of
32
MB SDRAM
# Physical Address:
# 1000'0000 to
20
00'0000
# 1000'0000 to
12
00'0000
#
#
# Linux-Kernel is expected to be at 1000'8000, entry 1000'8000
# (mem base + reserved)
#
# we load ourself to 1108'0000
# When running from RAM use address 1108'0000, otherwise when
# booting from NOR flash link to address 0000'0000.
#
#
CONFIG_SYS_TEXT_BASE
=
0x11080000
CONFIG_SYS_TEXT_BASE
=
0x00000000
#CONFIG_SYS_TEXT_BASE = 0x11080000
board/ti/omap5912osk/lowlevel_init.S
浏览文件 @
c97b6df1
...
...
@@ -306,6 +306,23 @@ common_tc:
ldr
r1
,
VAL_MPU_CNTL_TIMER
str
r1
,
[
r0
]
/
*
*
Setup
a
temporary
stack
*/
ldr
sp
,
SRAM_STACK
bic
sp
,
sp
,
#
7
/*
8
-
byte
alignment
for
ABI
compliance
*/
/
*
*
Save
the
old
lr
(
passed
in
ip
)
and
the
current
lr
to
stack
*/
push
{
ip
,
lr
}
/
*
*
go
setup
pll
,
mux
,
memory
*/
bl
s_init
pop
{
ip
,
pc
}
/
*
back
to
arch
calling
code
*/
mov
pc
,
lr
...
...
@@ -470,6 +487,9 @@ VAL_ARM_IDLECT2:
VAL_ARM_IDLECT3
:
.
word
0x00000015
SRAM_STACK
:
.
word
CONFIG_SYS_INIT_SP_ADDR
/*
command
values
*/
.
equ
CMD_SDRAM_NOP
,
0x00000000
.
equ
CMD_SDRAM_PRECHARGE
,
0x00000001
...
...
board/ti/omap5912osk/omap5912osk.c
浏览文件 @
c97b6df1
...
...
@@ -66,6 +66,14 @@ int board_init (void)
/* adress of boot parameters */
gd
->
bd
->
bi_boot_params
=
0x10000100
;
flash__init
();
ether__init
();
return
0
;
}
void
s_init
(
void
)
{
/* Configure MUX settings */
set_muxconf_regs
();
peripheral_power_enable
();
...
...
@@ -75,10 +83,6 @@ int board_init (void)
* ... rkw ...
*/
icache_enable
();
flash__init
();
ether__init
();
return
0
;
}
/******************************
...
...
@@ -128,14 +132,19 @@ void ether__init (void)
Routine:
Description:
******************************/
int
dram_init
(
void
)
int
dram_init
(
void
)
{
gd
->
bd
->
bi_dram
[
0
].
start
=
PHYS_SDRAM_1
;
gd
->
bd
->
bi_dram
[
0
].
size
=
PHYS_SDRAM_1_SIZE
;
gd
->
ram_size
=
get_ram_size
((
long
*
)
PHYS_SDRAM_1
,
PHYS_SDRAM_1_SIZE
);
return
0
;
}
void
dram_init_banksize
(
void
)
{
gd
->
bd
->
bi_dram
[
0
].
start
=
PHYS_SDRAM_1
;
gd
->
bd
->
bi_dram
[
0
].
size
=
PHYS_SDRAM_1_SIZE
;
}
/******************************************************
Routine: set_muxconf_regs
Description: Setting up the configuration Mux registers
...
...
include/configs/omap5912osk.h
浏览文件 @
c97b6df1
...
...
@@ -134,7 +134,7 @@
*/
#define CONFIG_SYS_TIMERBASE 0xFFFEC500
/* use timer 1 */
#define CONFIG_SYS_PTV 7
/* 2^(PTV+1), divide by 256 */
#define CONFIG_SYS_HZ
((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
#define CONFIG_SYS_HZ
1000
/*-----------------------------------------------------------------------
* Physical Memory Map
...
...
@@ -178,12 +178,15 @@
*/
#define CONFIG_ENV_IS_IN_FLASH 1
/* addr of environment */
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE +
0x020000
)
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE +
CONFIG_ENV_OFFSET
)
#define CONFIG_ENV_SIZE 0x20000
/* Total Size of Environment Sector */
#define CONFIG_ENV_OFFSET 0x
2
0000
/* environment starts here */
#define CONFIG_ENV_SIZE
0x20000
/* Total Size of Environment Sector */
#define CONFIG_ENV_OFFSET 0x
4
0000
/* environment starts here */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR PHYS_SRAM
#define CONFIG_SYS_INIT_RAM_SIZE (250 * 1024)
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE)
#endif
/* __CONFIG_H */
include/configs/omap5_uevm.h
浏览文件 @
c97b6df1
...
...
@@ -31,8 +31,7 @@
/* Define the default GPT table for eMMC */
#define PARTS_DEFAULT \
"uuid_disk=${uuid_gpt_disk};" \
"name=u-boot,size=1792KiB,uuid=${uuid_gpt_u-boot};" \
"name=rootfs,size=-,uuid=${uuid_gpt_rootfs}"
"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}"
#include <configs/omap5_common.h>
...
...
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