arm: socfpga: reset: correct dma, qspi, and sdmmc reset bit defines
The DMA, QSPI, and SD/MMC reset bits are located in the permodrst register,
not the mpumodrst. So the bank for these reset bits should be 1, not 0.
Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com>
Showing
想要评论请 注册 或 登录