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c06088b3
编写于
11月 26, 2018
作者:
T
Tom Rini
浏览文件
操作
浏览文件
下载
差异文件
Merge branch 'master' of
git://git.denx.de/u-boot-sunxi
上级
ef0b75d3
9b16ede4
变更
5
隐藏空白更改
内联
并排
Showing
5 changed file
with
47 addition
and
14 deletion
+47
-14
arch/arm/mach-sunxi/Kconfig
arch/arm/mach-sunxi/Kconfig
+2
-0
arch/arm/mach-sunxi/dram_sun8i_a33.c
arch/arm/mach-sunxi/dram_sun8i_a33.c
+1
-1
drivers/mmc/Kconfig
drivers/mmc/Kconfig
+4
-0
drivers/mmc/sunxi_mmc.c
drivers/mmc/sunxi_mmc.c
+9
-10
drivers/net/sun8i_emac.c
drivers/net/sun8i_emac.c
+31
-3
未找到文件。
arch/arm/mach-sunxi/Kconfig
浏览文件 @
c06088b3
...
...
@@ -230,6 +230,7 @@ config MACH_SUN8I_A83T
select PHY_SUN4I_USB
select SUNXI_GEN_SUN6I
select MMC_SUNXI_HAS_NEW_MODE
select MMC_SUNXI_HAS_MODE_SWITCH
select SUPPORT_SPL
config MACH_SUN8I_H3
...
...
@@ -281,6 +282,7 @@ config MACH_SUN50I
select SUN6I_PRCM
select SUNXI_DE2
select SUNXI_GEN_SUN6I
select MMC_SUNXI_HAS_NEW_MODE
select SUPPORT_SPL
select SUNXI_DRAM_DW
select SUNXI_DRAM_DW_32BIT
...
...
arch/arm/mach-sunxi/dram_sun8i_a33.c
浏览文件 @
c06088b3
...
...
@@ -334,7 +334,7 @@ unsigned long sunxi_dram_init(void)
struct
dram_para
para
=
{
.
cs1
=
0
,
.
bank
=
1
,
.
rank
=
1
,
.
rank
=
2
,
.
rows
=
15
,
.
bus_width
=
16
,
.
page_size
=
2048
,
...
...
drivers/mmc/Kconfig
浏览文件 @
c06088b3
...
...
@@ -569,6 +569,10 @@ config MMC_SUNXI_HAS_NEW_MODE
bool
depends on MMC_SUNXI
config MMC_SUNXI_HAS_MODE_SWITCH
bool
depends on MMC_SUNXI
config GENERIC_ATMEL_MCI
bool "Atmel Multimedia Card Interface support"
depends on DM_MMC && BLK && ARCH_AT91
...
...
drivers/mmc/sunxi_mmc.c
浏览文件 @
c06088b3
...
...
@@ -98,24 +98,21 @@ static int mmc_resource_init(int sdc_no)
static
int
mmc_set_mod_clk
(
struct
sunxi_mmc_priv
*
priv
,
unsigned
int
hz
)
{
unsigned
int
pll
,
pll_hz
,
div
,
n
,
oclk_dly
,
sclk_dly
;
bool
new_mode
=
fals
e
;
bool
new_mode
=
tru
e
;
bool
calibrate
=
false
;
u32
val
=
0
;
if
(
IS_ENABLED
(
CONFIG_MMC_SUNXI_HAS_NEW_MODE
)
&&
(
priv
->
mmc_no
==
2
))
new_mode
=
true
;
if
(
!
IS_ENABLED
(
CONFIG_MMC_SUNXI_HAS_NEW_MODE
))
new_mode
=
false
;
/* A83T support new mode only on eMMC */
if
(
IS_ENABLED
(
CONFIG_MACH_SUN8I_A83T
)
&&
priv
->
mmc_no
!=
2
)
new_mode
=
false
;
#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H6)
calibrate
=
true
;
#endif
/*
* The MMC clock has an extra /2 post-divider when operating in the new
* mode.
*/
if
(
new_mode
)
hz
=
hz
*
2
;
if
(
hz
<=
24000000
)
{
pll
=
CCM_MMC_CTRL_OSCM24
;
pll_hz
=
24000000
;
...
...
@@ -176,7 +173,9 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz)
if
(
new_mode
)
{
#ifdef CONFIG_MMC_SUNXI_HAS_NEW_MODE
#ifdef CONFIG_MMC_SUNXI_HAS_MODE_SWITCH
val
=
CCM_MMC_CTRL_MODE_SEL_NEW
;
#endif
setbits_le32
(
&
priv
->
reg
->
ntsr
,
SUNXI_MMC_NTSR_MODE_SEL_NEW
);
#endif
}
else
if
(
!
calibrate
)
{
...
...
drivers/net/sun8i_emac.c
浏览文件 @
c06088b3
...
...
@@ -60,6 +60,10 @@
#define SC_ETCS_MASK GENMASK(1, 0)
#define SC_ETCS_EXT_GMII 0x1
#define SC_ETCS_INT_GMII 0x2
#define SC_ETXDC_MASK GENMASK(12, 10)
#define SC_ETXDC_OFFSET 10
#define SC_ERXDC_MASK GENMASK(9, 5)
#define SC_ERXDC_OFFSET 5
#define CONFIG_MDIO_TIMEOUT (3 * CONFIG_SYS_HZ)
...
...
@@ -140,6 +144,8 @@ struct emac_eth_dev {
struct
sun8i_eth_pdata
{
struct
eth_pdata
eth_pdata
;
u32
reset_delays
[
3
];
int
tx_delay_ps
;
int
rx_delay_ps
;
};
...
...
@@ -273,7 +279,8 @@ static int sun8i_emac_set_syscon_ephy(struct emac_eth_dev *priv, u32 *reg)
return
0
;
}
static
int
sun8i_emac_set_syscon
(
struct
emac_eth_dev
*
priv
)
static
int
sun8i_emac_set_syscon
(
struct
sun8i_eth_pdata
*
pdata
,
struct
emac_eth_dev
*
priv
)
{
int
ret
;
u32
reg
;
...
...
@@ -312,6 +319,14 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)
return
-
EINVAL
;
}
if
(
pdata
->
tx_delay_ps
)
reg
|=
((
pdata
->
tx_delay_ps
/
100
)
<<
SC_ETXDC_OFFSET
)
&
SC_ETXDC_MASK
;
if
(
pdata
->
rx_delay_ps
)
reg
|=
((
pdata
->
rx_delay_ps
/
100
)
<<
SC_ERXDC_OFFSET
)
&
SC_ERXDC_MASK
;
writel
(
reg
,
priv
->
sysctl_reg
+
0x30
);
return
0
;
...
...
@@ -784,13 +799,14 @@ static void sun8i_emac_eth_stop(struct udevice *dev)
static
int
sun8i_emac_eth_probe
(
struct
udevice
*
dev
)
{
struct
eth_pdata
*
pdata
=
dev_get_platdata
(
dev
);
struct
sun8i_eth_pdata
*
sun8i_pdata
=
dev_get_platdata
(
dev
);
struct
eth_pdata
*
pdata
=
&
sun8i_pdata
->
eth_pdata
;
struct
emac_eth_dev
*
priv
=
dev_get_priv
(
dev
);
priv
->
mac_reg
=
(
void
*
)
pdata
->
iobase
;
sun8i_emac_board_setup
(
priv
);
sun8i_emac_set_syscon
(
priv
);
sun8i_emac_set_syscon
(
sun8i_pdata
,
priv
);
sun8i_mdio_init
(
dev
->
name
,
dev
);
priv
->
bus
=
miiphy_get_dev_by_name
(
dev
->
name
);
...
...
@@ -891,6 +907,18 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)
if
(
!
priv
->
use_internal_phy
)
parse_phy_pins
(
dev
);
sun8i_pdata
->
tx_delay_ps
=
fdtdec_get_int
(
gd
->
fdt_blob
,
node
,
"allwinner,tx-delay-ps"
,
0
);
if
(
sun8i_pdata
->
tx_delay_ps
<
0
||
sun8i_pdata
->
tx_delay_ps
>
700
)
printf
(
"%s: Invalid TX delay value %d
\n
"
,
__func__
,
sun8i_pdata
->
tx_delay_ps
);
sun8i_pdata
->
rx_delay_ps
=
fdtdec_get_int
(
gd
->
fdt_blob
,
node
,
"allwinner,rx-delay-ps"
,
0
);
if
(
sun8i_pdata
->
rx_delay_ps
<
0
||
sun8i_pdata
->
rx_delay_ps
>
3100
)
printf
(
"%s: Invalid RX delay value %d
\n
"
,
__func__
,
sun8i_pdata
->
rx_delay_ps
);
#ifdef CONFIG_DM_GPIO
if
(
fdtdec_get_bool
(
gd
->
fdt_blob
,
dev_of_offset
(
dev
),
"snps,reset-active-low"
))
...
...
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