提交 bf7bd4e7 编写于 作者: M Mugunthan V N 提交者: Tom Rini

driver: net: keystone_net: fix phy mode configuration

Phy mode is a board property and it can be different between
multiple board and ports, so it should not be hardcoded in
driver to one specific mode. So adding a field in eth_priv_t
structure to pass phy mode to driver.
Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
上级 cddb3300
......@@ -11,6 +11,7 @@
#define _KEYSTONE_NET_H_
#include <asm/io.h>
#include <phy.h>
/* EMAC */
#ifdef CONFIG_KSNET_NETCP_V1_0
......@@ -243,6 +244,7 @@ struct eth_priv_t {
int phy_addr;
int slave_port;
int sgmii_link_type;
phy_interface_t phy_if;
struct phy_device *phy_dev;
};
......
......@@ -82,6 +82,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 0,
.slave_port = 1,
.sgmii_link_type = SGMII_LINK_MAC_PHY,
.phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC1",
......@@ -89,6 +90,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 1,
.slave_port = 2,
.sgmii_link_type = SGMII_LINK_MAC_PHY,
.phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC2",
......@@ -96,6 +98,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 2,
.slave_port = 3,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
.phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC3",
......@@ -103,6 +106,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 3,
.slave_port = 4,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
.phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC4",
......@@ -110,6 +114,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 4,
.slave_port = 5,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
.phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC5",
......@@ -117,6 +122,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 5,
.slave_port = 6,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
.phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC6",
......@@ -124,6 +130,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 6,
.slave_port = 7,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
.phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC7",
......@@ -131,6 +138,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 7,
.slave_port = 8,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
.phy_if = PHY_INTERFACE_MODE_SGMII,
},
};
......
......@@ -76,6 +76,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 0,
.slave_port = 1,
.sgmii_link_type = SGMII_LINK_MAC_PHY,
.phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2HK_EMAC1",
......@@ -83,6 +84,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 1,
.slave_port = 2,
.sgmii_link_type = SGMII_LINK_MAC_PHY,
.phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2HK_EMAC2",
......@@ -90,6 +92,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 2,
.slave_port = 3,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
.phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2HK_EMAC3",
......@@ -97,6 +100,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 3,
.slave_port = 4,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
.phy_if = PHY_INTERFACE_MODE_SGMII,
},
};
......
......@@ -75,6 +75,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 0,
.slave_port = 1,
.sgmii_link_type = SGMII_LINK_MAC_PHY,
.phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2L_EMAC1",
......@@ -82,6 +83,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 1,
.slave_port = 2,
.sgmii_link_type = SGMII_LINK_MAC_PHY,
.phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2L_EMAC2",
......@@ -89,6 +91,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 2,
.slave_port = 3,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
.phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2L_EMAC3",
......@@ -96,6 +99,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 3,
.slave_port = 4,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
.phy_if = PHY_INTERFACE_MODE_SGMII,
},
};
......
......@@ -569,11 +569,11 @@ int keystone2_emac_initialize(struct eth_priv_t *eth_priv)
/* Create phy device and bind it with driver */
#ifdef CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
phy_dev = phy_connect(mdio_bus, eth_priv->phy_addr,
dev, PHY_INTERFACE_MODE_SGMII);
dev, eth_priv->phy_if);
phy_config(phy_dev);
#else
phy_dev = phy_find_by_mask(mdio_bus, 1 << eth_priv->phy_addr,
PHY_INTERFACE_MODE_SGMII);
eth_priv->phy_if);
phy_dev->dev = dev;
#endif
eth_priv->phy_dev = phy_dev;
......
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