imx: mx6 correct is_soc_rev usage

is_soc_rev should return a bool value, so use "==", but not "-",
change (is_soc_rev(CHIP_REV_1_0) > 0) to (soc_rev() > CHIP_REV_1_0).
This patch also add space between "&" for cpu_type(rev) macro.
Signed-off-by: NPeng Fan <Peng.Fan@freescale.com>

arch/arm/imx-common/timer.c

@@ -44,8 +44,8 @@ static inline int gpt_has_clk_source_osc(void)
 {
 #if defined(CONFIG_MX6)
 	if (((is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) &&
-	     (is_soc_rev(CHIP_REV_1_0) > 0)) || is_cpu_type(MXC_CPU_MX6DL) ||
-	      is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6SX))
+	    (soc_rev() > CHIP_REV_1_0)) || is_cpu_type(MXC_CPU_MX6DL) ||
+	     is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6SX))
 		return 1;
 
 	return 0;

arch/arm/include/asm/arch-mx6/sys_proto.h

@@ -12,7 +12,7 @@
 #include "../arch-imx/cpu.h"
 
 #define soc_rev() (get_cpu_rev() & 0xFF)
-#define is_soc_rev(rev)        (soc_rev() - rev)
+#define is_soc_rev(rev) (soc_rev() == rev)
 
 u32 get_nr_cpus(void);
 u32 get_cpu_rev(void);
@@ -20,7 +20,7 @@ u32 get_cpu_speed_grade_hz(void);
 u32 get_cpu_temp_grade(int *minc, int *maxc);
 
 /* returns MXC_CPU_ value */
-#define cpu_type(rev) (((rev) >> 12)&0xff)
+#define cpu_type(rev) (((rev) >> 12) & 0xff)
 
 /* both macros return/take MXC_CPU_ constants */
 #define get_cpu_type()	(cpu_type(get_cpu_rev()))