提交 b24065c4 编写于 作者: T Tom Rini
......@@ -22,6 +22,7 @@ config OMAP34XX
imply SPL_NAND_SUPPORT
imply SPL_POWER_SUPPORT
imply SPL_SERIAL_SUPPORT
imply SYS_I2C_OMAP24XX
imply SYS_THUMB_BUILD
imply TWL4030_POWER
......@@ -40,6 +41,7 @@ config OMAP44XX
imply SPL_NAND_SUPPORT
imply SPL_POWER_SUPPORT
imply SPL_SERIAL_SUPPORT
imply SYS_I2C_OMAP24XX
imply SYS_THUMB_BUILD
config OMAP54XX
......@@ -59,6 +61,7 @@ config OMAP54XX
imply SPL_NAND_SUPPORT
imply SPL_POWER_SUPPORT
imply SPL_SERIAL_SUPPORT
imply SYS_I2C_OMAP24XX
config TI814X
bool "TI814X SoC"
......@@ -82,6 +85,7 @@ config AM43XX
imply SPL_OF_TRANSLATE
imply SPL_SEPARATE_BSS
imply SPL_SYS_MALLOC_SIMPLE
imply SYS_I2C_OMAP24XX
imply SYS_THUMB_BUILD
help
Support for AM43xx SOC from Texas Instruments.
......@@ -92,6 +96,7 @@ config AM43XX
config AM33XX
bool "AM33XX SoC"
imply SYS_I2C_OMAP24XX
imply SYS_THUMB_BUILD
imply USE_TINY_PRINTF
help
......
......@@ -772,7 +772,7 @@ void per_clocks_enable(void)
setbits_le32(&prcm_base->iclken_per, 0x00020000);
#endif
#ifdef CONFIG_SYS_I2C_OMAP34XX
#ifdef CONFIG_SYS_I2C_OMAP24XX
/* Turn on all 3 I2C clocks */
setbits_le32(&prcm_base->fclken1_core, 0x00038000);
setbits_le32(&prcm_base->iclken1_core, 0x00038000); /* I2C1,2,3 = on */
......
......@@ -398,7 +398,7 @@ void board_mmc_power_init(void)
}
#endif
#ifdef CONFIG_SYS_I2C_OMAP34XX
#ifdef CONFIG_SYS_I2C_OMAP24XX
/*
* Routine: reset_net_chip
* Description: reset the Ethernet controller via TPS65930 GPIO
......
......@@ -105,7 +105,7 @@ int misc_init_r(void)
volatile unsigned int ctr;
u32 reset;
#ifdef CONFIG_SYS_I2C_OMAP34XX
#ifdef CONFIG_SYS_I2C_OMAP24XX
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
......
......@@ -43,7 +43,7 @@ int board_init(void)
*/
int misc_init_r(void)
{
#ifdef CONFIG_SYS_I2C_OMAP34XX
#ifdef CONFIG_SYS_I2C_OMAP24XX
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
......
......@@ -147,7 +147,7 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
int misc_init_r(void)
{
#ifdef CONFIG_SYS_I2C_OMAP34XX
#ifdef CONFIG_SYS_I2C_OMAP24XX
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
......
......@@ -39,6 +39,7 @@ CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_OMAP24XX=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
# CONFIG_USE_PRIVATE_LIBGCC is not set
......@@ -145,6 +145,12 @@ config SYS_I2C_MXC
channels and operating on standard mode upto 100 kbits/s and fast
mode upto 400 kbits/s.
config SYS_I2C_OMAP24XX
bool "TI OMAP2+ I2C driver"
depends on ARCH_OMAP2PLUS
help
Add support for the OMAP2+ I2C driver.
config SYS_I2C_ROCKCHIP
bool "Rockchip I2C driver"
depends on DM_I2C
......
......@@ -31,7 +31,6 @@ obj-$(CONFIG_SYS_I2C_MVTWSI) += mvtwsi.o
obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
obj-$(CONFIG_SYS_I2C_MXS) += mxs_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP34XX) += omap24xx_i2c.o
obj-$(CONFIG_SYS_I2C_RCAR) += rcar_i2c.o
obj-$(CONFIG_SYS_I2C_ROCKCHIP) += rk_i2c.o
obj-$(CONFIG_SYS_I2C_S3C24X0) += s3c24x0_i2c.o exynos_hs_i2c.o
......
......@@ -199,7 +199,7 @@ static int at91_i2c_enable_clk(struct udevice *dev)
return 0;
}
static int at91_i2c_probe(struct udevice *dev, uint chip, uint chip_flags)
static int at91_i2c_probe_chip(struct udevice *dev, uint chip, uint chip_flags)
{
struct at91_i2c_bus *bus = dev_get_priv(dev);
struct at91_i2c_regs *reg = bus->regs;
......@@ -254,11 +254,32 @@ static int at91_i2c_ofdata_to_platdata(struct udevice *dev)
static const struct dm_i2c_ops at91_i2c_ops = {
.xfer = at91_i2c_xfer,
.probe_chip = at91_i2c_probe,
.probe_chip = at91_i2c_probe_chip,
.set_bus_speed = at91_i2c_set_bus_speed,
.get_bus_speed = at91_i2c_get_bus_speed,
};
static int at91_i2c_probe(struct udevice *dev)
{
struct at91_i2c_bus *bus = dev_get_priv(dev);
struct at91_i2c_regs *reg = bus->regs;
int ret;
ret = at91_i2c_enable_clk(dev);
if (ret)
return ret;
writel(TWI_CR_SWRST, &reg->cr);
at91_calc_i2c_clock(dev, bus->clock_frequency);
writel(bus->cwgr_val, &reg->cwgr);
writel(TWI_CR_MSEN, &reg->cr);
writel(TWI_CR_SVDIS, &reg->cr);
return 0;
}
static const struct at91_i2c_pdata at91rm9200_config = {
.clk_max_div = 5,
.clk_offset = 3,
......@@ -315,6 +336,7 @@ U_BOOT_DRIVER(i2c_at91) = {
.name = "i2c_at91",
.id = UCLASS_I2C,
.of_match = at91_i2c_ids,
.probe = at91_i2c_probe,
.ofdata_to_platdata = at91_i2c_ofdata_to_platdata,
.per_child_auto_alloc_size = sizeof(struct dm_i2c_chip),
.priv_auto_alloc_size = sizeof(struct at91_i2c_bus),
......
......@@ -374,7 +374,8 @@ static void __dw_i2c_init(struct i2c_regs *i2c_base, int speed, int slaveaddr)
/* Disable i2c */
dw_i2c_enable(i2c_base, false);
writel((IC_CON_SD | IC_CON_SPD_FS | IC_CON_MM), &i2c_base->ic_con);
writel(IC_CON_SD | IC_CON_RE | IC_CON_SPD_FS | IC_CON_MM,
&i2c_base->ic_con);
writel(IC_RX_TL, &i2c_base->ic_rx_tl);
writel(IC_TX_TL, &i2c_base->ic_tx_tl);
writel(IC_STOP_DET, &i2c_base->ic_intr_mask);
......
......@@ -103,7 +103,6 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
/*
* Board NAND Info.
......
......@@ -91,7 +91,6 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
/* Ethernet */
#define CONFIG_DRIVER_TI_EMAC
......
......@@ -72,7 +72,6 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP24XX
/*
* Our platforms make use of SPL to initalize the hardware (primarily
......
......@@ -93,7 +93,6 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_I2C_EEPROM_BUS 0
......
......@@ -101,7 +101,6 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_I2C_EEPROM_BUS 0
......
......@@ -17,7 +17,6 @@
#include <configs/ti_omap5_common.h>
/* EEPROM related defines */
#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_I2C_EEPROM_BUS 0
......
......@@ -65,8 +65,6 @@
#undef CONFIG_OMAP3_SPI
/* I2C */
#undef CONFIG_SYS_I2C_OMAP24XX
#define CONFIG_SYS_I2C_OMAP34XX
/* TWL4030 */
#define CONFIG_TWL4030_LED 1
......
......@@ -60,7 +60,6 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP24XX
#define CONFIG_I2C_MULTI_BUS
/*
......
......@@ -86,7 +86,6 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
/* RTC */
#define CONFIG_RTC_DS1337
......
......@@ -112,7 +112,6 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
/*
* TWL4030
......
......@@ -143,7 +143,6 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
/*
* PISMO support
......
......@@ -53,7 +53,6 @@
#define CONFIG_USB_OMAP3
/* I2C */
#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */
/* USB */
......
......@@ -34,7 +34,6 @@
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 15))
/* I2C Support */
#define CONFIG_SYS_I2C_OMAP34XX
/* TWL4030 LED */
#define CONFIG_TWL4030_LED
......
......@@ -29,9 +29,6 @@
* Hardware drivers
*/
/* I2C Support */
#define CONFIG_SYS_I2C_OMAP34XX
/* TWL4030 LED */
#define CONFIG_TWL4030_LED
......
......@@ -63,9 +63,6 @@
#endif
#endif
#undef CONFIG_SYS_I2C_OMAP24XX
#define CONFIG_SYS_I2C_OMAP34XX
/*
* TWL4030
*/
......
......@@ -104,7 +104,6 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP24XX
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
......
......@@ -62,7 +62,6 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_I2C_MULTI_BUS
/*
......
......@@ -71,7 +71,6 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
......
......@@ -69,7 +69,6 @@
"4m(kernel),-(fs)"
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_I2C_MULTI_BUS
......
......@@ -15,7 +15,6 @@
/* I2C IP block */
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP24XX
/* SPI IP Block */
#define CONFIG_OMAP3_SPI
......
......@@ -150,7 +150,6 @@
#ifdef CONFIG_SPL_BUILD
/* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */
#undef CONFIG_SYS_I2C
#undef CONFIG_SYS_I2C_OMAP24XX
#endif
#endif /* __CONFIG_TI_OMAP4_COMMON_H */
......@@ -62,7 +62,6 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
/* EEPROM */
......
......@@ -3530,8 +3530,6 @@ CONFIG_SYS_I2C_MXC_I2C4
CONFIG_SYS_I2C_NCT72_ADDR
CONFIG_SYS_I2C_NOPROBES
CONFIG_SYS_I2C_OFFSET
CONFIG_SYS_I2C_OMAP24XX
CONFIG_SYS_I2C_OMAP34XX
CONFIG_SYS_I2C_PCA953X_ADDR
CONFIG_SYS_I2C_PCA953X_ADDR0
CONFIG_SYS_I2C_PCA953X_ADDR1
......
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