提交 af35be6a 编写于 作者: P Paul Gortmaker 提交者: Kumar Gala

Revert "SBC8548: fix address mask to allow 64M flash"

This reverts commit ccf1ad53.

The commit "SBC8548: fix address mask to allow 64M flash"
essentially made this change:

  * OR6:
- *    Addr Mask = 64M = OR6[0:16] = 1111 1100 0000 0000 0
+ *    Addr Mask = 64M = OR6[0:16] = 1111 1000 0000 0000 0

But this makes no sense, as section 13.3.1.2.1 in the
MPC8548ERM v2 clearly indicates the masks:

	1111_1111_1000_0000_0	8 Mbytes
	1111_1100_0000_0000_0	64 Mbytes
	1111_1000_0000_0000_0	128 Mbytes

So the original value was correct, and the commit was invalid,
causing a 128MB mapping for a 64MB flash device.  The problem
rears its head when trying to configure u-boot to have access
to both flash, since the default memory map is:

	FB80_0000 – FF7F_FFFF 32-bits 64MB FLASH SODIMM
	FF80_0000 – FFFF_FFFF 8-bits 8MB FLASH

By extending the mapping of the 64MB flash to 128MB, it now
conflicts with the normal 8MB boot flash, causing issues.
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
上级 1667013d
......@@ -173,7 +173,7 @@
* 1111 1111 1000 0000 0110 1110 0110 0101 = ff806e65 OR0
*
* OR6:
* Addr Mask = 64M = OR6[0:16] = 1111 1000 0000 0000 0
* Addr Mask = 64M = OR6[0:16] = 1111 1100 0000 0000 0
* XAM = OR6[17:18] = 11
* CSNT = OR6[20] = 1
* ACS = half cycle delay = OR6[21:22] = 11
......@@ -182,7 +182,7 @@
* EAD = use external address latch delay = OR6[31] = 1
*
* 0 4 8 12 16 20 24 28
* 1111 1000 0000 0000 0110 1110 0110 0101 = f8006e65 OR6
* 1111 1100 0000 0000 0110 1110 0110 0101 = fc006e65 OR6
*/
#define CONFIG_SYS_BOOT_BLOCK 0xff800000 /* start of 8MB Flash */
......@@ -193,7 +193,7 @@
#define CONFIG_SYS_BR6_PRELIM 0xfb801801
#define CONFIG_SYS_OR0_PRELIM 0xff806e65
#define CONFIG_SYS_OR6_PRELIM 0xf8006e65
#define CONFIG_SYS_OR6_PRELIM 0xfc006e65
#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, \
CONFIG_SYS_ALT_FLASH}
......
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