提交 9e6ed1a3 编写于 作者: M Marek Vasut

ARM: dts: socfpga: Keep FPGA bridge entries in SPL DT

Keep the FPGA bridge entries in SPL DT to let do_bridge_reset() toggle
the bridges on/off as needed according to the handoff file.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
上级 917bd8a8
......@@ -64,4 +64,28 @@
u-boot,dm-pre-reloc;
};
};
fpgabridge@0 {
u-boot,dm-pre-reloc;
};
fpgabridge@1 {
u-boot,dm-pre-reloc;
};
fpgabridge@2 {
u-boot,dm-pre-reloc;
};
fpgabridge@3 {
u-boot,dm-pre-reloc;
};
fpgabridge@4 {
u-boot,dm-pre-reloc;
};
fpgabridge@5 {
u-boot,dm-pre-reloc;
};
};
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