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提交 9c9cbe78 编写于 作者: D Detlev Zundel 提交者： Wolfgang Denk
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mpc82xx: Remove SL8245 board and the now orpahned sk98lin network driver. 

This code has compile problems and the company does not even exist any
more.  So we take the liberty to drop support for it.
Signed-off-by: NDetlev Zundel <dzu@denx.de>
CC: Wolfgang Denk <wd@denx.de>
CC: Ben Warren <biggerbadderben@gmail.com>
上级 ca02f6f8
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内联 并排
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MAINTAINERS
浏览文件 @ 9c9cbe78
......@@ -118,7 +118,6 @@ Wolfgang Denk <wd@denx.de>
CU824 MPC8240
Sandpoint8240 MPC8240
SL8245 MPC8245
ATC MPC8250
PM825 MPC8250
......
MAKEALL
浏览文件 @ 9c9cbe78
......@@ -312,7 +312,6 @@ LIST_824x=" \
Sandpoint8240 \
Sandpoint8245 \
sbc8240 \
SL8245 \
utx8245 \
"
......
Makefile
浏览文件 @ 9c9cbe78
......@@ -218,7 +218,6 @@ LIBS += drivers/mtd/ubi/libubi.a
LIBS += drivers/mtd/spi/libspi_flash.a
LIBS += drivers/net/libnet.a
LIBS += drivers/net/phy/libphy.a
LIBS += drivers/net/sk98lin/libsk98lin.a
LIBS += drivers/pci/libpci.a
LIBS += drivers/pcmcia/libpcmcia.a
LIBS += drivers/power/libpower.a
......@@ -1741,9 +1740,6 @@ Sandpoint8245_config: unconfig
sbc8240_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc824x sbc8240
SL8245_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc824x sl8245
utx8245_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc824x utx8245
......
board/sl8245/Makefile 已删除 100644 → 0
浏览文件 @ ca02f6f8
#
# (C) Copyright 2001-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS = $(BOARD).o flash.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
board/sl8245/config.mk 已删除 100644 → 0
浏览文件 @ ca02f6f8
#
# (C) Copyright 2001 - 2003
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#
# SL8245 board
#
TEXT_BASE = 0xFFF00000
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
PLATFORM_LIBS += $(shell $(CC) -print-libgcc-file-name)
board/sl8245/flash.c 已删除 100644 → 0
浏览文件 @ ca02f6f8
/*
* (C) Copyright 2001 - 2003
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <mpc824x.h>
#include <asm/processor.h>
#if defined(CONFIG_ENV_IS_IN_FLASH)
# ifndef CONFIG_ENV_ADDR
# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
# endif
# ifndef CONFIG_ENV_SIZE
# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
# endif
# ifndef CONFIG_ENV_SECT_SIZE
# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
# endif
#endif
#define FLASH_BANK_SIZE 0x800000
#define MAIN_SECT_SIZE 0x40000
#define PARAM_SECT1_SIZE 0x20000
#define PARAM_SECT23_SIZE 0x8000
#define PARAM_SECT4_SIZE 0x10000
flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
static int write_data (flash_info_t *info, ulong dest, ulong *data);
static void write_via_fpu(vu_long *addr, ulong *data);
static __inline__ unsigned long get_msr(void);
static __inline__ void set_msr(unsigned long msr);
/*---------------------------------------------------------------------*/
#undef DEBUG_FLASH
/*---------------------------------------------------------------------*/
#ifdef DEBUG_FLASH
#define DEBUGF(fmt,args...) printf(fmt ,##args)
#else
#define DEBUGF(fmt,args...)
#endif
/*---------------------------------------------------------------------*/
#define __align__ __attribute__ ((aligned (8)))
static __align__ ulong precmd0[2] = { 0x00aa00aa, 0x00aa00aa };
static __align__ ulong precmd1[2] = { 0x00550055, 0x00550055 };
static __align__ ulong cmdid[2] = { 0x00900090, 0x00900090 };
static __align__ ulong cmderase[2] = { 0x00800080, 0x00800080 };
static __align__ ulong cmdersusp[2] = { 0x00b000b0, 0x00b000b0 };
static __align__ ulong cmdsecter[2] = { 0x00300030, 0x00300030 };
static __align__ ulong cmdprog[2] = { 0x00a000a0, 0x00a000a0 };
static __align__ ulong cmdres[2] = { 0x00f000f0, 0x00f000f0 };
/*-----------------------------------------------------------------------
*/
unsigned long flash_init (void)
{
int i, j;
ulong size = 0;
for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
vu_long *addr = (vu_long *) (CONFIG_SYS_FLASH_BASE + i * FLASH_BANK_SIZE);
write_via_fpu (&addr[0xaaa], precmd0);
write_via_fpu (&addr[0x554], precmd1);
write_via_fpu (&addr[0xaaa], cmdid);
DEBUGF ("Flash bank # %d:\n"
"\tManuf. ID @ 0x%08lX: 0x%08lX\n"
"\tDevice ID @ 0x%08lX: 0x%08lX\n",
i,
(ulong) (&addr[0]), addr[0],
(ulong) (&addr[2]), addr[2]);
if ((addr[0] == addr[1]) && (addr[0] == AMD_MANUFACT) &&
(addr[2] == addr[3]) && (addr[2] == AMD_ID_LV160T)) {
flash_info[i].flash_id = (FLASH_MAN_AMD & FLASH_VENDMASK) |
(FLASH_AM160T & FLASH_TYPEMASK);
} else {
flash_info[i].flash_id = FLASH_UNKNOWN;
write_via_fpu (addr, cmdres);
goto Done;
}
DEBUGF ("flash_id = 0x%08lX\n", flash_info[i].flash_id);
write_via_fpu (addr, cmdres);
flash_info[i].size = FLASH_BANK_SIZE;
flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
for (j = 0; j < 32; j++) {
flash_info[i].start[j] = CONFIG_SYS_FLASH_BASE +
i * FLASH_BANK_SIZE + j * MAIN_SECT_SIZE;
}
flash_info[i].start[32] =
flash_info[i].start[31] + PARAM_SECT1_SIZE;
flash_info[i].start[33] =
flash_info[i].start[32] + PARAM_SECT23_SIZE;
flash_info[i].start[34] =
flash_info[i].start[33] + PARAM_SECT23_SIZE;
size += flash_info[i].size;
}
/* Protect monitor and environment sectors
*/
#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE + FLASH_BANK_SIZE
flash_protect ( FLAG_PROTECT_SET,
CONFIG_SYS_MONITOR_BASE,
CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
&flash_info[1]);
#else
flash_protect ( FLAG_PROTECT_SET,
CONFIG_SYS_MONITOR_BASE,
CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
&flash_info[0]);
#endif
#endif
#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR)
#if CONFIG_ENV_ADDR >= CONFIG_SYS_FLASH_BASE + FLASH_BANK_SIZE
flash_protect ( FLAG_PROTECT_SET,
CONFIG_ENV_ADDR,
CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[1]);
#else
flash_protect ( FLAG_PROTECT_SET,
CONFIG_ENV_ADDR,
CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
#endif
#endif
Done:
return size;
}
/*-----------------------------------------------------------------------
*/
void flash_print_info (flash_info_t * info)
{
int i;
switch ((i = info->flash_id & FLASH_VENDMASK)) {
case (FLASH_MAN_AMD & FLASH_VENDMASK):
printf ("Intel: ");
break;
default:
printf ("Unknown Vendor 0x%04x ", i);
break;
}
switch ((i = info->flash_id & FLASH_TYPEMASK)) {
case (FLASH_AM160T & FLASH_TYPEMASK):
printf ("AM29LV160BT (16Mbit)\n");
break;
default:
printf ("Unknown Chip Type 0x%04x\n", i);
goto Done;
break;
}
printf (" Size: %ld MB in %d Sectors\n",
info->size >> 20, info->sector_count);
printf (" Sector Start Addresses:");
for (i = 0; i < info->sector_count; i++) {
if ((i % 5) == 0) {
printf ("\n ");
}
printf (" %08lX%s", info->start[i],
info->protect[i] ? " (RO)" : " ");
}
printf ("\n");
Done:
return;
}
/*-----------------------------------------------------------------------
*/
int flash_erase (flash_info_t * info, int s_first, int s_last)
{
int flag, prot, sect;
ulong start, now, last;
DEBUGF ("Erase flash bank %d sect %d ... %d\n",
info - &flash_info[0], s_first, s_last);
if ((s_first < 0) || (s_first > s_last)) {
if (info->flash_id == FLASH_UNKNOWN) {
printf ("- missing\n");
} else {
printf ("- no sectors to erase\n");
}
return 1;
}
if ((info->flash_id & FLASH_VENDMASK) !=
(FLASH_MAN_AMD & FLASH_VENDMASK)) {
printf ("Can erase only AMD flash types - aborted\n");
return 1;
}
prot = 0;
for (sect = s_first; sect <= s_last; ++sect) {
if (info->protect[sect]) {
prot++;
}
}
if (prot) {
printf ("- Warning: %d protected sectors will not be erased!\n",
prot);
} else {
printf ("\n");
}
start = get_timer (0);
last = start;
/* Start erase on unprotected sectors */
for (sect = s_first; sect <= s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
vu_long *addr = (vu_long *) (info->start[sect]);
DEBUGF ("Erase sect %d @ 0x%08lX\n", sect, (ulong) addr);
/* Disable interrupts which might cause a timeout
* here.
*/
flag = disable_interrupts ();
write_via_fpu (&addr[0xaaa], precmd0);
write_via_fpu (&addr[0x554], precmd1);
write_via_fpu (&addr[0xaaa], cmderase);
write_via_fpu (&addr[0xaaa], precmd0);
write_via_fpu (&addr[0x554], precmd1);
write_via_fpu (&addr[0xaaa], cmdsecter);
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts ();
/* wait at least 80us - let's wait 1 ms */
udelay (1000);
while (((addr[0] & 0x00800080) != 0x00800080) ||
((addr[1] & 0x00800080) != 0x00800080)) {
if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
write_via_fpu (addr, cmdersusp);
write_via_fpu (addr, cmdres);
return 1;
}
/* show that we're waiting */
if ((now - last) > 1000) { /* every second */
putc ('.');
last = now;
}
}
write_via_fpu (addr, cmdres);
}
}
printf (" done\n");
return 0;
}
/*-----------------------------------------------------------------------
* Copy memory to flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
* 4 - Flash not identified
*/
#define FLASH_WIDTH 8 /* flash bus width in bytes */
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
{
ulong wp, cp, msr;
int l, rc, i;
ulong data[2];
ulong *datah = &data[0];
ulong *datal = &data[1];
DEBUGF ("Flash write_buff: @ 0x%08lx, src 0x%08lx len %ld\n",
addr, (ulong) src, cnt);
if (info->flash_id == FLASH_UNKNOWN) {
return 4;
}
msr = get_msr ();
set_msr (msr | MSR_FP);
wp = (addr & ~(FLASH_WIDTH - 1)); /* get lower aligned address */
/*
* handle unaligned start bytes
*/
if ((l = addr - wp) != 0) {
*datah = *datal = 0;
for (i = 0, cp = wp; i < l; i++, cp++) {
if (i >= 4) {
*datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
}
*datal = (*datal << 8) | (*(uchar *) cp);
}
for (; i < FLASH_WIDTH && cnt > 0; ++i) {
char tmp;
tmp = *src;
src++;
if (i >= 4) {
*datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
}
*datal = (*datal << 8) | tmp;
--cnt;
++cp;
}
for (; cnt == 0 && i < FLASH_WIDTH; ++i, ++cp) {
if (i >= 4) {
*datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
}
*datal = (*datah << 8) | (*(uchar *) cp);
}
if ((rc = write_data (info, wp, data)) != 0) {
set_msr (msr);
return (rc);
}
wp += FLASH_WIDTH;
}
/*
* handle FLASH_WIDTH aligned part
*/
while (cnt >= FLASH_WIDTH) {
*datah = *(ulong *) src;
*datal = *(ulong *) (src + 4);
if ((rc = write_data (info, wp, data)) != 0) {
set_msr (msr);
return (rc);
}
wp += FLASH_WIDTH;
cnt -= FLASH_WIDTH;
src += FLASH_WIDTH;
}
if (cnt == 0) {
set_msr (msr);
return (0);
}
/*
* handle unaligned tail bytes
*/
*datah = *datal = 0;
for (i = 0, cp = wp; i < FLASH_WIDTH && cnt > 0; ++i, ++cp) {
char tmp;
tmp = *src;
src++;
if (i >= 4) {
*datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
}
*datal = (*datal << 8) | tmp;
--cnt;
}
for (; i < FLASH_WIDTH; ++i, ++cp) {
if (i >= 4) {
*datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
}
*datal = (*datal << 8) | (*(uchar *) cp);
}
rc = write_data (info, wp, data);
set_msr (msr);
return (rc);
}
/*-----------------------------------------------------------------------
* Write a word to Flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
*/
static int write_data (flash_info_t * info, ulong dest, ulong * data)
{
vu_long *chip = (vu_long *) (info->start[0]);
vu_long *addr = (vu_long *) dest;
ulong start;
int flag;
/* Check if Flash is (sufficiently) erased */
if (((addr[0] & data[0]) != data[0]) ||
((addr[1] & data[1]) != data[1])) {
return (2);
}
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts ();
write_via_fpu (&chip[0xaaa], precmd0);
write_via_fpu (&chip[0x554], precmd1);
write_via_fpu (&chip[0xaaa], cmdprog);
write_via_fpu (addr, data);
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts ();
start = get_timer (0);
while (((addr[0] & 0x00800080) != (data[0] & 0x00800080)) ||
((addr[1] & 0x00800080) != (data[1] & 0x00800080))) {
if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
write_via_fpu (chip, cmdres);
return (1);
}
}
write_via_fpu (chip, cmdres);
return (0);
}
/*-----------------------------------------------------------------------
*/
static void write_via_fpu (vu_long * addr, ulong * data)
{
__asm__ __volatile__ ("lfd 1, 0(%0)"::"r" (data));
__asm__ __volatile__ ("stfd 1, 0(%0)"::"r" (addr));
}
/*-----------------------------------------------------------------------
*/
static __inline__ unsigned long get_msr (void)
{
unsigned long msr;
__asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
return msr;
}
static __inline__ void set_msr (unsigned long msr)
{
__asm__ __volatile__ ("mtmsr %0"::"r" (msr));
}
board/sl8245/sl8245.c 已删除 100644 → 0
浏览文件 @ ca02f6f8
/*
* (C) Copyright 2003
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <mpc824x.h>
#include <pci.h>
#include <netdev.h>
int checkboard (void)
{
ulong busfreq = get_bus_freq(0);
char buf[32];
printf("Board: SL8245, local bus @ %s MHz\n", strmhz(buf, busfreq));
return 0;
}
phys_size_t initdram (int board_type)
{
#ifndef CONFIG_SYS_RAMBOOT
long size;
long new_bank0_end;
long mear1;
long emear1;
size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
new_bank0_end = size - 1;
mear1 = mpc824x_mpc107_getreg(MEAR1);
emear1 = mpc824x_mpc107_getreg(EMEAR1);
mear1 = (mear1 & 0xFFFFFF00) |
((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
emear1 = (emear1 & 0xFFFFFF00) |
((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
mpc824x_mpc107_setreg(MEAR1, mear1);
mpc824x_mpc107_setreg(EMEAR1, emear1);
return (size);
#else
return CONFIG_SYS_MAX_RAM_SIZE;
#endif
}
static struct pci_controller hose;
void pci_init_board(void)
{
pci_mpc824x_init(&hose);
}
int board_eth_init(bd_t *bis)
{
int rc = 0;
#if defined(CONFIG_SK98)
rc = skge_initialize(bis);
#endif
return rc;
}
drivers/net/sk98lin/Makefile 已删除 100644 → 0
浏览文件 @ ca02f6f8
#
# (C) Copyright 2003-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
# File: drivers/net/sk98lin/Makefile
#
# Makefile for the SysKonnect SK-98xx device driver.
#
include $(TOPDIR)/config.mk
LIB := $(obj)libsk98lin.a
COBJS-$(CONFIG_SK98) += skge.o skaddr.o skgehwt.o skgeinit.o skgepnmi.o \
skgesirq.o ski2c.o sklm80.o skqueue.o skrlmt.o sktimer.o \
skvpd.o skxmac2.o skcsum.o
#COBJS-y += skproc.o
COBJS-$(CONFIG_SK98) += uboot_skb.o uboot_drv.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
# DBGDEF = \
# -DDEBUG
ifdef DEBUG
DBGDEF += \
-DSK_DEBUG_CHKMOD=0x00000000L \
-DSK_DEBUG_CHKCAT=0x00000000L
endif
# **** possible debug modules for SK_DEBUG_CHKMOD *****************
# SK_DBGMOD_MERR 0x00000001L /* general module error indication */
# SK_DBGMOD_HWM 0x00000002L /* Hardware init module */
# SK_DBGMOD_RLMT 0x00000004L /* RLMT module */
# SK_DBGMOD_VPD 0x00000008L /* VPD module */
# SK_DBGMOD_I2C 0x00000010L /* I2C module */
# SK_DBGMOD_PNMI 0x00000020L /* PNMI module */
# SK_DBGMOD_CSUM 0x00000040L /* CSUM module */
# SK_DBGMOD_ADDR 0x00000080L /* ADDR module */
# SK_DBGMOD_DRV 0x00010000L /* DRV module */
# **** possible debug categories for SK_DEBUG_CHKCAT **************
# *** common modules ***
# SK_DBGCAT_INIT 0x00000001L module/driver initialization
# SK_DBGCAT_CTRL 0x00000002L controlling: add/rmv MCA/MAC and other controls (IOCTL)
# SK_DBGCAT_ERR 0x00000004L error handling paths
# SK_DBGCAT_TX 0x00000008L transmit path
# SK_DBGCAT_RX 0x00000010L receive path
# SK_DBGCAT_IRQ 0x00000020L general IRQ handling
# SK_DBGCAT_QUEUE 0x00000040L any queue management
# SK_DBGCAT_DUMP 0x00000080L large data output e.g. hex dump
# SK_DBGCAT_FATAL 0x00000100L large data output e.g. hex dump
# *** driver (file skge.c) ***
# SK_DBGCAT_DRV_ENTRY 0x00010000 entry points
# SK_DBGCAT_DRV_??? 0x00020000 not used
# SK_DBGCAT_DRV_MCA 0x00040000 multicast
# SK_DBGCAT_DRV_TX_PROGRESS 0x00080000 tx path
# SK_DBGCAT_DRV_RX_PROGRESS 0x00100000 rx path
# SK_DBGCAT_DRV_PROGRESS 0x00200000 general runtime
# SK_DBGCAT_DRV_??? 0x00400000 not used
# SK_DBGCAT_DRV_PROM 0x00800000 promiscuous mode
# SK_DBGCAT_DRV_TX_FRAME 0x01000000 display tx frames
# SK_DBGCAT_DRV_ERROR 0x02000000 error conditions
# SK_DBGCAT_DRV_INT_SRC 0x04000000 interrupts sources
# SK_DBGCAT_DRV_EVENT 0x08000000 driver events
EXTRA_CFLAGS += -I. -DSK_USE_CSUM $(DBGDEF)
CFLAGS += $(EXTRA_CFLAGS)
HOSTCFLAGS += $(EXTRA_CFLAGS)
all: $(LIB)
$(LIB): $(obj).depend $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
drivers/net/sk98lin/h/lm80.h 已删除 100644 → 0
浏览文件 @ ca02f6f8
/******************************************************************************
*
* Name: lm80.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.4 $
* Date: $Date: 2002/04/25 11:04:10 $
* Purpose: Contains all defines for the LM80 Chip
* (National Semiconductor).
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/******************************************************************************
*
* History:
* $Log: lm80.h,v $
* Revision 1.4 2002/04/25 11:04:10 rschmidt
* Editorial changes
*
* Revision 1.3 1999/11/22 13:41:19 cgoos
* Changed license header to GPL.
*
* Revision 1.2 1999/03/12 13:26:51 malthoff
* remove __STDC__.
*
* Revision 1.1 1998/06/19 09:28:31 malthoff
* created.
*
*
******************************************************************************/
#ifndef __INC_LM80_H
#define __INC_LM80_H
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/* defines ********************************************************************/
/*
* LM80 register definition
*
* All registers are 8 bit wide
*/
#define LM80_CFG 0x00 /* Configuration Register */
#define LM80_ISRC_1 0x01 /* Interrupt Status Register 1 */
#define LM80_ISRC_2 0x02 /* Interrupt Status Register 2 */
#define LM80_IMSK_1 0x03 /* Interrupt Mask Register 1 */
#define LM80_IMSK_2 0x04 /* Interrupt Mask Register 2 */
#define LM80_FAN_CTRL 0x05 /* Fan Devisor/RST#/OS# Register */
#define LM80_TEMP_CTRL 0x06 /* OS# Config, Temp Res. Reg */
/* 0x07 - 0x1f reserved */
/* current values */
#define LM80_VT0_IN 0x20 /* current Voltage 0 value */
#define LM80_VT1_IN 0x21 /* current Voltage 1 value */
#define LM80_VT2_IN 0x22 /* current Voltage 2 value */
#define LM80_VT3_IN 0x23 /* current Voltage 3 value */
#define LM80_VT4_IN 0x24 /* current Voltage 4 value */
#define LM80_VT5_IN 0x25 /* current Voltage 5 value */
#define LM80_VT6_IN 0x26 /* current Voltage 6 value */
#define LM80_TEMP_IN 0x27 /* current Temperature value */
#define LM80_FAN1_IN 0x28 /* current Fan 1 count */
#define LM80_FAN2_IN 0x29 /* current Fan 2 count */
/* limit values */
#define LM80_VT0_HIGH_LIM 0x2a /* high limit val for Voltage 0 */
#define LM80_VT0_LOW_LIM 0x2b /* low limit val for Voltage 0 */
#define LM80_VT1_HIGH_LIM 0x2c /* high limit val for Voltage 1 */
#define LM80_VT1_LOW_LIM 0x2d /* low limit val for Voltage 1 */
#define LM80_VT2_HIGH_LIM 0x2e /* high limit val for Voltage 2 */
#define LM80_VT2_LOW_LIM 0x2f /* low limit val for Voltage 2 */
#define LM80_VT3_HIGH_LIM 0x30 /* high limit val for Voltage 3 */
#define LM80_VT3_LOW_LIM 0x31 /* low limit val for Voltage 3 */
#define LM80_VT4_HIGH_LIM 0x32 /* high limit val for Voltage 4 */
#define LM80_VT4_LOW_LIM 0x33 /* low limit val for Voltage 4 */
#define LM80_VT5_HIGH_LIM 0x34 /* high limit val for Voltage 5 */
#define LM80_VT5_LOW_LIM 0x35 /* low limit val for Voltage 5 */
#define LM80_VT6_HIGH_LIM 0x36 /* high limit val for Voltage 6 */
#define LM80_VT6_LOW_LIM 0x37 /* low limit val for Voltage 6 */
#define LM80_THOT_LIM_UP 0x38 /* hot temperature limit (high) */
#define LM80_THOT_LIM_LO 0x39 /* hot temperature limit (low) */
#define LM80_TOS_LIM_UP 0x3a /* OS temperature limit (high) */
#define LM80_TOS_LIM_LO 0x3b /* OS temperature limit (low) */
#define LM80_FAN1_COUNT_LIM 0x3c /* Fan 1 count limit (high) */
#define LM80_FAN2_COUNT_LIM 0x3d /* Fan 2 count limit (low) */
/* 0x3e - 0x3f reserved */
/*
* LM80 bit definitions
*/
/* LM80_CFG Configuration Register */
#define LM80_CFG_START (1<<0) /* start monitoring operation */
#define LM80_CFG_INT_ENA (1<<1) /* enables the INT# Interrupt output */
#define LM80_CFG_INT_POL (1<<2) /* INT# pol: 0 act low, 1 act high */
#define LM80_CFG_INT_CLR (1<<3) /* disables INT#/RST_OUT#/OS# outputs */
#define LM80_CFG_RESET (1<<4) /* signals a reset */
#define LM80_CFG_CHASS_CLR (1<<5) /* clears Chassis Intrusion (CI) pin */
#define LM80_CFG_GPO (1<<6) /* drives the GPO# pin */
#define LM80_CFG_INIT (1<<7) /* restore power on defaults */
/* LM80_ISRC_1 Interrupt Status Register 1 */
/* LM80_IMSK_1 Interrupt Mask Register 1 */
#define LM80_IS_VT0 (1<<0) /* limit exceeded for Voltage 0 */
#define LM80_IS_VT1 (1<<1) /* limit exceeded for Voltage 1 */
#define LM80_IS_VT2 (1<<2) /* limit exceeded for Voltage 2 */
#define LM80_IS_VT3 (1<<3) /* limit exceeded for Voltage 3 */
#define LM80_IS_VT4 (1<<4) /* limit exceeded for Voltage 4 */
#define LM80_IS_VT5 (1<<5) /* limit exceeded for Voltage 5 */
#define LM80_IS_VT6 (1<<6) /* limit exceeded for Voltage 6 */
#define LM80_IS_INT_IN (1<<7) /* state of INT_IN# */
/* LM80_ISRC_2 Interrupt Status Register 2 */
/* LM80_IMSK_2 Interrupt Mask Register 2 */
#define LM80_IS_TEMP (1<<0) /* HOT temperature limit exceeded */
#define LM80_IS_BTI (1<<1) /* state of BTI# pin */
#define LM80_IS_FAN1 (1<<2) /* count limit exceeded for Fan 1 */
#define LM80_IS_FAN2 (1<<3) /* count limit exceeded for Fan 2 */
#define LM80_IS_CI (1<<4) /* Chassis Intrusion occured */
#define LM80_IS_OS (1<<5) /* OS temperature limit exceeded */
/* bit 6 and 7 are reserved in LM80_ISRC_2 */
#define LM80_IS_HT_IRQ_MD (1<<6) /* Hot temperature interrupt mode */
#define LM80_IS_OT_IRQ_MD (1<<7) /* OS temperature interrupt mode */
/* LM80_FAN_CTRL Fan Devisor/RST#/OS# Register */
#define LM80_FAN1_MD_SEL (1<<0) /* Fan 1 mode select */
#define LM80_FAN2_MD_SEL (1<<1) /* Fan 2 mode select */
#define LM80_FAN1_PRM_CTL (3<<2) /* Fan 1 speed control */
#define LM80_FAN2_PRM_CTL (3<<4) /* Fan 2 speed control */
#define LM80_FAN_OS_ENA (1<<6) /* enable OS mode on RST_OUT#/OS# pins*/
#define LM80_FAN_RST_ENA (1<<7) /* sets RST_OUT#/OS# pins in RST mode */
/* LM80_TEMP_CTRL OS# Config, Temp Res. Reg */
#define LM80_TEMP_OS_STAT (1<<0) /* mirrors the state of RST_OUT#/OS# */
#define LM80_TEMP_OS_POL (1<<1) /* select OS# polarity */
#define LM80_TEMP_OS_MODE (1<<2) /* selects Interrupt mode */
#define LM80_TEMP_RES (1<<3) /* selects 9 or 11 bit temp resulution*/
#define LM80_TEMP_LSB (0xf<<4)/* 4 LSBs of 11 bit temp data */
#define LM80_TEMP_LSB_9 (1<<7) /* LSB of 9 bit temperature data */
/* 0x07 - 0x1f reserved */
/* LM80_VT0_IN current Voltage 0 value */
/* LM80_VT1_IN current Voltage 1 value */
/* LM80_VT2_IN current Voltage 2 value */
/* LM80_VT3_IN current Voltage 3 value */
/* LM80_VT4_IN current Voltage 4 value */
/* LM80_VT5_IN current Voltage 5 value */
/* LM80_VT6_IN current Voltage 6 value */
/* LM80_TEMP_IN current temperature value */
/* LM80_FAN1_IN current Fan 1 count */
/* LM80_FAN2_IN current Fan 2 count */
/* LM80_VT0_HIGH_LIM high limit val for Voltage 0 */
/* LM80_VT0_LOW_LIM low limit val for Voltage 0 */
/* LM80_VT1_HIGH_LIM high limit val for Voltage 1 */
/* LM80_VT1_LOW_LIM low limit val for Voltage 1 */
/* LM80_VT2_HIGH_LIM high limit val for Voltage 2 */
/* LM80_VT2_LOW_LIM low limit val for Voltage 2 */
/* LM80_VT3_HIGH_LIM high limit val for Voltage 3 */
/* LM80_VT3_LOW_LIM low limit val for Voltage 3 */
/* LM80_VT4_HIGH_LIM high limit val for Voltage 4 */
/* LM80_VT4_LOW_LIM low limit val for Voltage 4 */
/* LM80_VT5_HIGH_LIM high limit val for Voltage 5 */
/* LM80_VT5_LOW_LIM low limit val for Voltage 5 */
/* LM80_VT6_HIGH_LIM high limit val for Voltage 6 */
/* LM80_VT6_LOW_LIM low limit val for Voltage 6 */
/* LM80_THOT_LIM_UP hot temperature limit (high) */
/* LM80_THOT_LIM_LO hot temperature limit (low) */
/* LM80_TOS_LIM_UP OS temperature limit (high) */
/* LM80_TOS_LIM_LO OS temperature limit (low) */
/* LM80_FAN1_COUNT_LIM Fan 1 count limit (high) */
/* LM80_FAN2_COUNT_LIM Fan 2 count limit (low) */
/* 0x3e - 0x3f reserved */
#define LM80_ADDR 0x28 /* LM80 default addr */
/* typedefs *******************************************************************/
/* function prototypes ********************************************************/
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __INC_LM80_H */
drivers/net/sk98lin/h/skaddr.h 已删除 100644 → 0
浏览文件 @ ca02f6f8
/******************************************************************************
*
* Name: skaddr.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.26 $
* Date: $Date: 2002/11/15 07:24:42 $
* Purpose: Header file for Address Management (MC, UC, Prom).
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2001 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/******************************************************************************
*
* History:
*
* $Log: skaddr.h,v $
* Revision 1.26 2002/11/15 07:24:42 tschilli
* SK_ADDR_EQUAL macro fixed.
*
* Revision 1.25 2002/06/10 13:55:18 tschilli
* Changes for handling YUKON.
* All changes are internally and not visible to the programmer
* using this module.
*
* Revision 1.24 2001/01/22 13:41:34 rassmann
* Supporting two nets on dual-port adapters.
*
* Revision 1.23 2000/08/10 11:27:50 rassmann
* Editorial changes.
* Preserving 32-bit alignment in structs for the adapter context.
*
* Revision 1.22 2000/08/07 11:10:40 rassmann
* Editorial changes.
*
* Revision 1.21 2000/05/04 09:39:59 rassmann
* Editorial changes.
* Corrected multicast address hashing.
*
* Revision 1.20 1999/11/22 13:46:14 cgoos
* Changed license header to GPL.
* Allowing overwrite for SK_ADDR_EQUAL.
*
* Revision 1.19 1999/05/28 10:56:07 rassmann
* Editorial changes.
*
* Revision 1.18 1999/04/06 17:22:04 rassmann
* Added private "ActivePort".
*
* Revision 1.17 1999/01/14 16:18:19 rassmann
* Corrected multicast initialization.
*
* Revision 1.16 1999/01/04 10:30:36 rassmann
* SkAddrOverride only possible after SK_INIT_IO phase.
*
* Revision 1.15 1998/12/29 13:13:11 rassmann
* An address override is now preserved in the SK_INIT_IO phase.
* All functions return an int now.
* Extended parameter checking.
*
* Revision 1.14 1998/11/24 12:39:45 rassmann
* Reserved multicast entry for BPDU address.
* 13 multicast entries left for protocol.
*
* Revision 1.13 1998/11/13 17:24:32 rassmann
* Changed return value of SkAddrOverride to int.
*
* Revision 1.12 1998/11/13 16:56:19 rassmann
* Added macro SK_ADDR_COMPARE.
* Changed return type of SkAddrOverride to SK_BOOL.
*
* Revision 1.11 1998/10/28 18:16:35 rassmann
* Avoiding I/Os before SK_INIT_RUN level.
* Aligning InexactFilter.
*
* Revision 1.10 1998/10/22 11:39:10 rassmann
* Corrected signed/unsigned mismatches.
*
* Revision 1.9 1998/10/15 15:15:49 rassmann
* Changed Flags Parameters from SK_U8 to int.
* Checked with lint.
*
* Revision 1.8 1998/09/24 19:15:12 rassmann
* Code cleanup.
*
* Revision 1.7 1998/09/18 20:22:13 rassmann
* Added HW access.
*
* Revision 1.6 1998/09/04 19:40:20 rassmann
* Interface enhancements.
*
* Revision 1.5 1998/09/04 12:40:57 rassmann
* Interface cleanup.
*
* Revision 1.4 1998/09/04 12:14:13 rassmann
* Interface cleanup.
*
* Revision 1.3 1998/09/02 16:56:40 rassmann
* Updated interface.
*
* Revision 1.2 1998/08/27 14:26:09 rassmann
* Updated interface.
*
* Revision 1.1 1998/08/21 08:31:08 rassmann
* First public version.
*
******************************************************************************/
/******************************************************************************
*
* Description:
*
* This module is intended to manage multicast addresses and promiscuous mode
* on GEnesis adapters.
*
* Include File Hierarchy:
*
* "skdrv1st.h"
* ...
* "sktypes.h"
* "skqueue.h"
* "skaddr.h"
* ...
* "skdrv2nd.h"
*
******************************************************************************/
#ifndef __INC_SKADDR_H
#define __INC_SKADDR_H
#ifdef __cplusplus
#error C++ is not yet supported.
extern "C" {
#endif /* cplusplus */
/* defines ********************************************************************/
#define SK_MAC_ADDR_LEN 6 /* Length of MAC address. */
#define SK_MAX_ADDRS 14 /* #Addrs for exact match. */
/* ----- Common return values ----- */
#define SK_ADDR_SUCCESS 0 /* Function returned successfully. */
#define SK_ADDR_ILLEGAL_PORT 100 /* Port number too high. */
#define SK_ADDR_TOO_EARLY 101 /* Function called too early. */
/* ----- Clear/Add flag bits ----- */
#define SK_ADDR_PERMANENT 1 /* RLMT Address */
/* ----- Additional Clear flag bits ----- */
#define SK_MC_SW_ONLY 2 /* Do not update HW when clearing. */
/* ----- Override flag bits ----- */
#define SK_ADDR_LOGICAL_ADDRESS 0
#define SK_ADDR_VIRTUAL_ADDRESS (SK_ADDR_LOGICAL_ADDRESS) /* old */
#define SK_ADDR_PHYSICAL_ADDRESS 1
#define SK_ADDR_CLEAR_LOGICAL 2
#define SK_ADDR_SET_LOGICAL 4
/* ----- Override return values ----- */
#define SK_ADDR_OVERRIDE_SUCCESS (SK_ADDR_SUCCESS)
#define SK_ADDR_DUPLICATE_ADDRESS 1
#define SK_ADDR_MULTICAST_ADDRESS 2
/* ----- Partitioning of excact match table ----- */
#define SK_ADDR_EXACT_MATCHES 16 /* #Exact match entries. */
#define SK_ADDR_FIRST_MATCH_RLMT 1
#define SK_ADDR_LAST_MATCH_RLMT 2
#define SK_ADDR_FIRST_MATCH_DRV 3
#define SK_ADDR_LAST_MATCH_DRV (SK_ADDR_EXACT_MATCHES - 1)
/* ----- SkAddrMcAdd/SkAddrMcUpdate return values ----- */
#define SK_MC_FILTERING_EXACT 0 /* Exact filtering. */
#define SK_MC_FILTERING_INEXACT 1 /* Inexact filtering. */
/* ----- Additional SkAddrMcAdd return values ----- */
#define SK_MC_ILLEGAL_ADDRESS 2 /* Illegal address. */
#define SK_MC_ILLEGAL_PORT 3 /* Illegal port (not the active one). */
#define SK_MC_RLMT_OVERFLOW 4 /* Too many RLMT mc addresses. */
/* Promiscuous mode bits ----- */
#define SK_PROM_MODE_NONE 0 /* Normal receive. */
#define SK_PROM_MODE_LLC 1 /* Receive all LLC frames. */
#define SK_PROM_MODE_ALL_MC 2 /* Receive all multicast frames. */
/* #define SK_PROM_MODE_NON_LLC 4 */ /* Receive all non-LLC frames. */
/* Macros */
#if 0
#ifndef SK_ADDR_EQUAL
/*
* "&" instead of "&&" allows better optimization on IA-64.
* The replacement is safe here, as all bytes exist.
*/
#ifndef SK_ADDR_DWORD_COMPARE
#define SK_ADDR_EQUAL(A1,A2) ( \
(((SK_U8 *)(A1))[5] == ((SK_U8 *)(A2))[5]) & \
(((SK_U8 *)(A1))[4] == ((SK_U8 *)(A2))[4]) & \
(((SK_U8 *)(A1))[3] == ((SK_U8 *)(A2))[3]) & \
(((SK_U8 *)(A1))[2] == ((SK_U8 *)(A2))[2]) & \
(((SK_U8 *)(A1))[1] == ((SK_U8 *)(A2))[1]) & \
(((SK_U8 *)(A1))[0] == ((SK_U8 *)(A2))[0]))
#else /* SK_ADDR_DWORD_COMPARE */
#define SK_ADDR_EQUAL(A1,A2) ( \
(*(SK_U32 *)&(((SK_U8 *)(A1))[2]) == *(SK_U32 *)&(((SK_U8 *)(A2))[2])) & \
(*(SK_U32 *)&(((SK_U8 *)(A1))[0]) == *(SK_U32 *)&(((SK_U8 *)(A2))[0])))
#endif /* SK_ADDR_DWORD_COMPARE */
#endif /* SK_ADDR_EQUAL */
#endif /* 0 */
#ifndef SK_ADDR_EQUAL
#ifndef SK_ADDR_DWORD_COMPARE
#define SK_ADDR_EQUAL(A1,A2) ( \
(((SK_U8 *)(A1))[5] == ((SK_U8 *)(A2))[5]) & \
(((SK_U8 *)(A1))[4] == ((SK_U8 *)(A2))[4]) & \
(((SK_U8 *)(A1))[3] == ((SK_U8 *)(A2))[3]) & \
(((SK_U8 *)(A1))[2] == ((SK_U8 *)(A2))[2]) & \
(((SK_U8 *)(A1))[1] == ((SK_U8 *)(A2))[1]) & \
(((SK_U8 *)(A1))[0] == ((SK_U8 *)(A2))[0]))
#else /* SK_ADDR_DWORD_COMPARE */
#define SK_ADDR_EQUAL(A1,A2) ( \
(*(SK_U16 *)&(((SK_U8 *)(A1))[4]) == *(SK_U16 *)&(((SK_U8 *)(A2))[4])) && \
(*(SK_U32 *)&(((SK_U8 *)(A1))[0]) == *(SK_U32 *)&(((SK_U8 *)(A2))[0])))
#endif /* SK_ADDR_DWORD_COMPARE */
#endif /* SK_ADDR_EQUAL */
/* typedefs *******************************************************************/
typedef struct s_MacAddr {
SK_U8 a[SK_MAC_ADDR_LEN];
} SK_MAC_ADDR;
/* SK_FILTER is used to ensure alignment of the filter. */
typedef union s_InexactFilter {
SK_U8 Bytes[8];
SK_U64 Val; /* Dummy entry for alignment only. */
} SK_FILTER64;
typedef struct s_AddrNet SK_ADDR_NET;
typedef struct s_AddrPort {
/* ----- Public part (read-only) ----- */
SK_MAC_ADDR CurrentMacAddress; /* Current physical MAC Address. */
SK_MAC_ADDR PermanentMacAddress; /* Permanent physical MAC Address. */
int PromMode; /* Promiscuous Mode. */
/* ----- Private part ----- */
SK_MAC_ADDR PreviousMacAddress; /* Prev. phys. MAC Address. */
SK_BOOL CurrentMacAddressSet; /* CurrentMacAddress is set. */
SK_U8 Align01;
SK_U32 FirstExactMatchRlmt;
SK_U32 NextExactMatchRlmt;
SK_U32 FirstExactMatchDrv;
SK_U32 NextExactMatchDrv;
SK_MAC_ADDR Exact[SK_ADDR_EXACT_MATCHES];
SK_FILTER64 InexactFilter; /* For 64-bit hash register. */
SK_FILTER64 InexactRlmtFilter; /* For 64-bit hash register. */
SK_FILTER64 InexactDrvFilter; /* For 64-bit hash register. */
} SK_ADDR_PORT;
struct s_AddrNet {
/* ----- Public part (read-only) ----- */
SK_MAC_ADDR CurrentMacAddress; /* Logical MAC Address. */
SK_MAC_ADDR PermanentMacAddress; /* Logical MAC Address. */
/* ----- Private part ----- */
SK_U32 ActivePort; /* View of module ADDR. */
SK_BOOL CurrentMacAddressSet; /* CurrentMacAddress is set. */
SK_U8 Align01;
SK_U16 Align02;
};
typedef struct s_Addr {
/* ----- Public part (read-only) ----- */
SK_ADDR_NET Net[SK_MAX_NETS];
SK_ADDR_PORT Port[SK_MAX_MACS];
/* ----- Private part ----- */
} SK_ADDR;
/* function prototypes ********************************************************/
#ifndef SK_KR_PROTO
/* Functions provided by SkAddr */
/* ANSI/C++ compliant function prototypes */
extern int SkAddrInit(
SK_AC *pAC,
SK_IOC IoC,
int Level);
extern int SkAddrMcClear(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
int Flags);
extern int SkAddrXmacMcClear(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
int Flags);
extern int SkAddrGmacMcClear(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
int Flags);
extern int SkAddrMcAdd(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
SK_MAC_ADDR *pMc,
int Flags);
extern int SkAddrXmacMcAdd(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
SK_MAC_ADDR *pMc,
int Flags);
extern int SkAddrGmacMcAdd(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
SK_MAC_ADDR *pMc,
int Flags);
extern int SkAddrMcUpdate(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber);
extern int SkAddrXmacMcUpdate(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber);
extern int SkAddrGmacMcUpdate(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber);
extern int SkAddrOverride(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
SK_MAC_ADDR *pNewAddr,
int Flags);
extern int SkAddrPromiscuousChange(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
int NewPromMode);
extern int SkAddrXmacPromiscuousChange(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
int NewPromMode);
extern int SkAddrGmacPromiscuousChange(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
int NewPromMode);
extern int SkAddrSwap(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 FromPortNumber,
SK_U32 ToPortNumber);
#else /* defined(SK_KR_PROTO)) */
/* Non-ANSI/C++ compliant function prototypes */
#error KR-style prototypes are not yet provided.
#endif /* defined(SK_KR_PROTO)) */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __INC_SKADDR_H */
drivers/net/sk98lin/h/skcsum.h 已删除 100644 → 0
浏览文件 @ ca02f6f8
/******************************************************************************
*
* Name: skcsum.h
* Project: GEnesis - SysKonnect SK-NET Gigabit Ethernet (SK-98xx)
* Version: $Revision: 1.9 $
* Date: $Date: 2001/02/06 11:21:39 $
* Purpose: Store/verify Internet checksum in send/receive packets.
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2001 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/******************************************************************************
*
* History:
*
* $Log: skcsum.h,v $
* Revision 1.9 2001/02/06 11:21:39 rassmann
* Editorial changes.
*
* Revision 1.8 2001/02/06 11:15:36 rassmann
* Supporting two nets on dual-port adapters.
*
* Revision 1.7 2000/06/29 13:17:05 rassmann
* Corrected reception of a packet with UDP checksum == 0 (which means there
* is no UDP checksum).
*
* Revision 1.6 2000/02/28 12:33:44 cgoos
* Changed C++ style comments to C style.
*
* Revision 1.5 2000/02/21 12:10:05 cgoos
* Fixed license comment.
*
* Revision 1.4 2000/02/21 11:08:37 cgoos
* Merged changes back into common source.
*
* Revision 1.1 1999/07/26 14:47:49 mkarl
* changed from common source to windows specific source
* added return SKCS_STATUS_IP_CSUM_ERROR_UDP and
* SKCS_STATUS_IP_CSUM_ERROR_TCP to pass the NidsTester
* changes for Tx csum offload
*
* Revision 1.2 1998/09/04 12:16:34 mhaveman
* Checked in for Stephan to allow compilation.
* -Added definition SK_CSUM_EVENT_CLEAR_PROTO_STATS to clear statistic
* -Added prototype for SkCsEvent()
*
* Revision 1.1 1998/09/01 15:36:53 swolf
* initial revision
*
* 01-Sep-1998 sw Created.
*
******************************************************************************/
/******************************************************************************
*
* Description:
*
* Public header file for the "GEnesis" common module "CSUM".
*
* "GEnesis" is an abbreviation of "Gigabit Ethernet Network System in Silicon"
* and is the code name of this SysKonnect project.
*
* Compilation Options:
*
* SK_USE_CSUM - Define if CSUM is to be used. Otherwise, CSUM will be an
* empty module.
*
* SKCS_OVERWRITE_PROTO - Define to overwrite the default protocol id
* definitions. In this case, all SKCS_PROTO_xxx definitions must be made
* external.
*
* SKCS_OVERWRITE_STATUS - Define to overwrite the default return status
* definitions. In this case, all SKCS_STATUS_xxx definitions must be made
* external.
*
* Include File Hierarchy:
*
* "h/skcsum.h"
* "h/sktypes.h"
* "h/skqueue.h"
*
******************************************************************************/
#ifndef __INC_SKCSUM_H
#define __INC_SKCSUM_H
#include "h/sktypes.h"
#include "h/skqueue.h"
/* defines ********************************************************************/
/*
* Define the default bit flags for 'SKCS_PACKET_INFO.ProtocolFlags' if no user
* overwrite.
*/
#ifndef SKCS_OVERWRITE_PROTO /* User overwrite? */
#define SKCS_PROTO_IP 0x1 /* IP (Internet Protocol version 4) */
#define SKCS_PROTO_TCP 0x2 /* TCP (Transmission Control Protocol) */
#define SKCS_PROTO_UDP 0x4 /* UDP (User Datagram Protocol) */
/* Indices for protocol statistics. */
#define SKCS_PROTO_STATS_IP 0
#define SKCS_PROTO_STATS_UDP 1
#define SKCS_PROTO_STATS_TCP 2
#define SKCS_NUM_PROTOCOLS 3 /* Number of supported protocols. */
#endif /* !SKCS_OVERWRITE_PROTO */
/*
* Define the default SKCS_STATUS type and values if no user overwrite.
*
* SKCS_STATUS_UNKNOWN_IP_VERSION - Not an IP v4 frame.
* SKCS_STATUS_IP_CSUM_ERROR - IP checksum error.
* SKCS_STATUS_IP_CSUM_ERROR_TCP - IP checksum error in TCP frame.
* SKCS_STATUS_IP_CSUM_ERROR_UDP - IP checksum error in UDP frame
* SKCS_STATUS_IP_FRAGMENT - IP fragment (IP checksum ok).
* SKCS_STATUS_IP_CSUM_OK - IP checksum ok (not a TCP or UDP frame).
* SKCS_STATUS_TCP_CSUM_ERROR - TCP checksum error (IP checksum ok).
* SKCS_STATUS_UDP_CSUM_ERROR - UDP checksum error (IP checksum ok).
* SKCS_STATUS_TCP_CSUM_OK - IP and TCP checksum ok.
* SKCS_STATUS_UDP_CSUM_OK - IP and UDP checksum ok.
* SKCS_STATUS_IP_CSUM_OK_NO_UDP - IP checksum OK and no UDP checksum.
*/
#ifndef SKCS_OVERWRITE_STATUS /* User overwrite? */
#define SKCS_STATUS int /* Define status type. */
#define SKCS_STATUS_UNKNOWN_IP_VERSION 1
#define SKCS_STATUS_IP_CSUM_ERROR 2
#define SKCS_STATUS_IP_FRAGMENT 3
#define SKCS_STATUS_IP_CSUM_OK 4
#define SKCS_STATUS_TCP_CSUM_ERROR 5
#define SKCS_STATUS_UDP_CSUM_ERROR 6
#define SKCS_STATUS_TCP_CSUM_OK 7
#define SKCS_STATUS_UDP_CSUM_OK 8
/* needed for Microsoft */
#define SKCS_STATUS_IP_CSUM_ERROR_UDP 9
#define SKCS_STATUS_IP_CSUM_ERROR_TCP 10
/* UDP checksum may be omitted */
#define SKCS_STATUS_IP_CSUM_OK_NO_UDP 11
#endif /* !SKCS_OVERWRITE_STATUS */
/* Clear protocol statistics event. */
#define SK_CSUM_EVENT_CLEAR_PROTO_STATS 1
/*
* Add two values in one's complement.
*
* Note: One of the two input values may be "longer" than 16-bit, but then the
* resulting sum may be 17 bits long. In this case, add zero to the result using
* SKCS_OC_ADD() again.
*
* Result = Value1 + Value2
*/
#define SKCS_OC_ADD(Result, Value1, Value2) { \
unsigned long Sum; \
\
Sum = (unsigned long) (Value1) + (unsigned long) (Value2); \
/* Add-in any carry. */ \
(Result) = (Sum & 0xffff) + (Sum >> 16); \
}
/*
* Subtract two values in one's complement.
*
* Result = Value1 - Value2
*/
#define SKCS_OC_SUB(Result, Value1, Value2) \
SKCS_OC_ADD((Result), (Value1), ~(Value2) & 0xffff)
/* typedefs *******************************************************************/
/*
* SKCS_PROTO_STATS - The CSUM protocol statistics structure.
*
* There is one instance of this structure for each protocol supported.
*/
typedef struct s_CsProtocolStatistics {
SK_U64 RxOkCts; /* Receive checksum ok. */
SK_U64 RxUnableCts; /* Unable to verify receive checksum. */
SK_U64 RxErrCts; /* Receive checksum error. */
SK_U64 TxOkCts; /* Transmit checksum ok. */
SK_U64 TxUnableCts; /* Unable to calculate checksum in hw. */
} SKCS_PROTO_STATS;
/*
* s_Csum - The CSUM module context structure.
*/
typedef struct s_Csum {
/* Enabled receive SK_PROTO_XXX bit flags. */
unsigned ReceiveFlags[SK_MAX_NETS];
#ifdef TX_CSUM
unsigned TransmitFlags[SK_MAX_NETS];
#endif /* TX_CSUM */
/* The protocol statistics structure; one per supported protocol. */
SKCS_PROTO_STATS ProtoStats[SK_MAX_NETS][SKCS_NUM_PROTOCOLS];
} SK_CSUM;
/*
* SKCS_PACKET_INFO - The packet information structure.
*/
typedef struct s_CsPacketInfo {
/* Bit field specifiying the desired/found protocols. */
unsigned ProtocolFlags;
/* Length of complete IP header, including any option fields. */
unsigned IpHeaderLength;
/* IP header checksum. */
unsigned IpHeaderChecksum;
/* TCP/UDP pseudo header checksum. */
unsigned PseudoHeaderChecksum;
} SKCS_PACKET_INFO;
/* function prototypes ********************************************************/
#ifndef SkCsCalculateChecksum
extern unsigned SkCsCalculateChecksum(
void *pData,
unsigned Length);
#endif
extern int SkCsEvent(
SK_AC *pAc,
SK_IOC Ioc,
SK_U32 Event,
SK_EVPARA Param);
extern SKCS_STATUS SkCsGetReceiveInfo(
SK_AC *pAc,
void *pIpHeader,
unsigned Checksum1,
unsigned Checksum2,
int NetNumber);
extern void SkCsGetSendInfo(
SK_AC *pAc,
void *pIpHeader,
SKCS_PACKET_INFO *pPacketInfo,
int NetNumber);
extern void SkCsSetReceiveFlags(
SK_AC *pAc,
unsigned ReceiveFlags,
unsigned *pChecksum1Offset,
unsigned *pChecksum2Offset,
int NetNumber);
#endif /* __INC_SKCSUM_H */
drivers/net/sk98lin/h/skdebug.h 已删除 100644 → 0
浏览文件 @ ca02f6f8
/******************************************************************************
*
* Name: skdebug.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.12 $
* Date: $Date: 2002/07/15 15:37:13 $
* Purpose: SK specific DEBUG support
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/******************************************************************************
*
* History:
* $Log: skdebug.h,v $
* Revision 1.12 2002/07/15 15:37:13 rschmidt
* Power Management support
* Editorial changes
*
* Revision 1.11 2002/04/25 11:04:39 rschmidt
* Editorial changes
*
* Revision 1.10 1999/11/22 13:47:40 cgoos
* Changed license header to GPL.
*
* Revision 1.9 1999/09/14 14:02:43 rwahl
* Added SK_DBGMOD_PECP.
*
* Revision 1.8 1998/11/25 08:31:54 gklug
* fix: no C++ comments allowed in common sources
*
* Revision 1.7 1998/11/24 16:47:24 swolf
* Driver may now define its own SK_DBG_MSG() (eg. in "h/skdrv1st.h").
*
* Revision 1.6 1998/10/28 10:23:55 rassmann
* ADDED SK_DBGMOD_ADDR.
*
* Revision 1.5 1998/10/22 09:43:55 gklug
* add: CSUM module
*
* Revision 1.4 1998/10/01 07:54:44 gklug
* add: PNMI debug module
*
* Revision 1.3 1998/09/18 08:32:34 afischer
* Macros changed according ssr-spec.:
* SK_DBG_MODCHK -> SK_DBG_CHKMOD
* SK_DBG_CATCHK -> SK_DBG_CHKCAT
*
* Revision 1.2 1998/07/03 14:38:25 malthoff
* Add category SK_DBGCAT_FATAL.
*
* Revision 1.1 1998/06/19 13:39:01 malthoff
* created.
*
*
******************************************************************************/
#ifndef __INC_SKDEBUG_H
#define __INC_SKDEBUG_H
#ifdef DEBUG
#ifndef SK_DBG_MSG
#define SK_DBG_MSG(pAC,comp,cat,arg) \
if ( ((comp) & SK_DBG_CHKMOD(pAC)) && \
((cat) & SK_DBG_CHKCAT(pAC)) ) { \
SK_DBG_PRINTF arg ; \
}
#endif
#else
#define SK_DBG_MSG(pAC,comp,lev,arg)
#endif
/* PLS NOTE:
* =========
* Due to any restrictions of kernel printf routines do not use other
* format identifiers as: %x %d %c %s .
* Never use any combined format identifiers such as: %lx %ld in your
* printf - argument (arg) because some OS specific kernel printfs may
* only support some basic identifiers.
*/
/* Debug modules */
#define SK_DBGMOD_MERR 0x00000001L /* general module error indication */
#define SK_DBGMOD_HWM 0x00000002L /* Hardware init module */
#define SK_DBGMOD_RLMT 0x00000004L /* RLMT module */
#define SK_DBGMOD_VPD 0x00000008L /* VPD module */
#define SK_DBGMOD_I2C 0x00000010L /* I2C module */
#define SK_DBGMOD_PNMI 0x00000020L /* PNMI module */
#define SK_DBGMOD_CSUM 0x00000040L /* CSUM module */
#define SK_DBGMOD_ADDR 0x00000080L /* ADDR module */
#define SK_DBGMOD_PECP 0x00000100L /* PECP module */
#define SK_DBGMOD_POWM 0x00000200L /* Power Management module */
/* Debug events */
#define SK_DBGCAT_INIT 0x00000001L /* module/driver initialization */
#define SK_DBGCAT_CTRL 0x00000002L /* controlling devices */
#define SK_DBGCAT_ERR 0x00000004L /* error handling paths */
#define SK_DBGCAT_TX 0x00000008L /* transmit path */
#define SK_DBGCAT_RX 0x00000010L /* receive path */
#define SK_DBGCAT_IRQ 0x00000020L /* general IRQ handling */
#define SK_DBGCAT_QUEUE 0x00000040L /* any queue management */
#define SK_DBGCAT_DUMP 0x00000080L /* large data output e.g. hex dump */
#define SK_DBGCAT_FATAL 0x00000100L /* fatal error */
#endif /* __INC_SKDEBUG_H */
drivers/net/sk98lin/h/skdrv1st.h 已删除 100644 → 0
浏览文件 @ ca02f6f8
/******************************************************************************
*
* Name: skdrv1st.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.11 $
* Date: $Date: 2003/02/25 14:16:40 $
* Purpose: First header file for driver and all other modules
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2003 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/******************************************************************************
*
* History:
*
* $Log: skdrv1st.h,v $
* Revision 1.11 2003/02/25 14:16:40 mlindner
* Fix: Copyright statement
*
* Revision 1.10 2002/10/02 12:46:02 mlindner
* Add: Support for Yukon
*
* Revision 1.9.2.2 2001/12/07 12:06:42 mlindner
* Fix: malloc -> slab changes
*
* Revision 1.9.2.1 2001/03/12 16:50:59 mlindner
* chg: kernel 2.4 adaption
*
* Revision 1.9 2001/01/22 14:16:04 mlindner
* added ProcFs functionality
* Dual Net functionality integrated
* Rlmt networks added
*
* Revision 1.8 2000/02/21 12:19:18 cgoos
* Added default for SK_DEBUG_CHKMOD/_CHKCAT
*
* Revision 1.7 1999/11/22 13:50:00 cgoos
* Changed license header to GPL.
* Added overwrite for several functions.
* Removed linux 2.0.x definitions.
* Removed PCI vendor ID definition (now in kernel).
*
* Revision 1.6 1999/07/27 08:03:33 cgoos
* Changed SK_IN/OUT macros to readX/writeX instead of memory
* accesses (necessary for ALPHA).
*
* Revision 1.5 1999/07/23 12:10:21 cgoos
* Removed SK_RLMT_SLOW_LOOKAHEAD define.
*
* Revision 1.4 1999/07/14 12:31:13 cgoos
* Added SK_RLMT_SLOW_LOOKAHEAD define.
*
* Revision 1.3 1999/04/07 10:12:54 cgoos
* Added check for KERNEL and OPTIMIZATION defines.
*
* Revision 1.2 1999/03/01 08:51:47 cgoos
* Fixed pcibios_read/write definitions.
*
* Revision 1.1 1999/02/16 07:40:49 cgoos
* First version.
*
*
*
******************************************************************************/
/******************************************************************************
*
* Description:
*
* This is the first include file of the driver, which includes all
* neccessary system header files and some of the GEnesis header files.
* It also defines some basic items.
*
* Include File Hierarchy:
*
* see skge.c
*
******************************************************************************/
#ifndef __INC_SKDRV1ST_H
#define __INC_SKDRV1ST_H
#if 0
/* Check kernel version */
#include <linux/version.h>
#if (LINUX_VERSION_CODE > 0x020300)
#endif
#endif
typedef struct s_AC SK_AC;
/* override some default functions with optimized linux functions */
#define SK_PNMI_STORE_U16(p,v) memcpy((char*)(p),(char*)&(v),2)
#define SK_PNMI_STORE_U32(p,v) memcpy((char*)(p),(char*)&(v),4)
#define SK_PNMI_STORE_U64(p,v) memcpy((char*)(p),(char*)&(v),8)
#define SK_PNMI_READ_U16(p,v) memcpy((char*)&(v),(char*)(p),2)
#define SK_PNMI_READ_U32(p,v) memcpy((char*)&(v),(char*)(p),2)
#define SK_PNMI_READ_U64(p,v) memcpy((char*)&(v),(char*)(p),2)
#define SkCsCalculateChecksum(p,l) ((~ip_compute_csum(p, l)) & 0xffff)
#define SK_ADDR_EQUAL(a1,a2) (!memcmp(a1,a2,6))
#if !defined(__OPTIMIZE__) || !defined(__KERNEL__)
#warning You must compile this file with the correct options!
#warning See the last lines of the source file.
#error You must compile this driver with "-O".
#endif
#if 0
#include <linux/version.h>
#endif
#include <linux/types.h>
#if 0
#include <linux/kernel.h>
#endif
#include <linux/string.h>
#if 0
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#endif
#include <asm/byteorder.h>
#include <asm/bitops.h>
#include <asm/io.h>
#if 0
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/init.h>
#include <asm/uaccess.h>
#include <net/checksum.h>
#endif
#include "h/sktypes.h"
#include "h/skerror.h"
#include "h/skdebug.h"
#include "h/lm80.h"
#include "h/xmac_ii.h"
#include "u-boot_compat.h"
#ifdef __LITTLE_ENDIAN
#define SK_LITTLE_ENDIAN
#else
#define SK_BIG_ENDIAN
#endif
#if 0
#define SK_NET_DEVICE net_device
#else
#define SK_NET_DEVICE eth_device
#endif
/* we use gethrtime(), return unit: nanoseconds */
#if 0
#define SK_TICKS_PER_SEC HZ
#else
#define SK_TICKS_PER_SEC CONFIG_SYS_HZ
#endif
#define SK_MEM_MAPPED_IO
/* #define SK_RLMT_SLOW_LOOKAHEAD */
#define SK_MAX_MACS 2
#define SK_MAX_NETS 2
#define SK_IOC char*
typedef struct s_DrvRlmtMbuf SK_MBUF;
#define SK_CONST64 INT64_C
#define SK_CONSTU64 UINT64_C
#define SK_MEMCPY(dest,src,size) memcpy(dest,src,size)
#define SK_MEMCMP(s1,s2,size) memcmp(s1,s2,size)
#define SK_MEMSET(dest,val,size) memset(dest,val,size)
#define SK_STRLEN(pStr) strlen((char*)(pStr))
#define SK_STRNCPY(pDest,pSrc,size) strncpy((char*)(pDest),(char*)(pSrc),size)
#define SK_STRCMP(pStr1,pStr2) strcmp((char*)(pStr1),(char*)(pStr2))
/* macros to access the adapter */
#define SK_OUT8(b,a,v) writeb((v), ((b)+(a)))
#define SK_OUT16(b,a,v) writew((v), ((b)+(a)))
#define SK_OUT32(b,a,v) writel((v), ((b)+(a)))
#define SK_IN8(b,a,pv) (*(pv) = readb((b)+(a)))
#define SK_IN16(b,a,pv) (*(pv) = readw((b)+(a)))
#define SK_IN32(b,a,pv) (*(pv) = readl((b)+(a)))
#define int8_t char
#define int16_t short
#define int32_t long
#define int64_t long long
#define uint8_t u_char
#define uint16_t u_short
#define uint32_t u_long
#define uint64_t unsigned long long
#define t_scalar_t int
#define t_uscalar_t unsigned int
#define uintptr_t unsigned long
#define __CONCAT__(A,B) A##B
#define INT32_C(a) __CONCAT__(a,L)
#define INT64_C(a) __CONCAT__(a,LL)
#define UINT32_C(a) __CONCAT__(a,UL)
#define UINT64_C(a) __CONCAT__(a,ULL)
#ifdef DEBUG
#define SK_DBG_PRINTF printk
#ifndef SK_DEBUG_CHKMOD
#define SK_DEBUG_CHKMOD 0
#endif
#ifndef SK_DEBUG_CHKCAT
#define SK_DEBUG_CHKCAT 0
#endif
/* those come from the makefile */
#define SK_DBG_CHKMOD(pAC) (SK_DEBUG_CHKMOD)
#define SK_DBG_CHKCAT(pAC) (SK_DEBUG_CHKCAT)
extern void SkDbgPrintf(const char *format,...);
#define SK_DBGMOD_DRV 0x00010000
/**** possible driver debug categories ********************************/
#define SK_DBGCAT_DRV_ENTRY 0x00010000
#define SK_DBGCAT_DRV_SAP 0x00020000
#define SK_DBGCAT_DRV_MCA 0x00040000
#define SK_DBGCAT_DRV_TX_PROGRESS 0x00080000
#define SK_DBGCAT_DRV_RX_PROGRESS 0x00100000
#define SK_DBGCAT_DRV_PROGRESS 0x00200000
#define SK_DBGCAT_DRV_MSG 0x00400000
#define SK_DBGCAT_DRV_PROM 0x00800000
#define SK_DBGCAT_DRV_TX_FRAME 0x01000000
#define SK_DBGCAT_DRV_ERROR 0x02000000
#define SK_DBGCAT_DRV_INT_SRC 0x04000000
#define SK_DBGCAT_DRV_EVENT 0x08000000
#endif
#define SK_ERR_LOG SkErrorLog
extern void SkErrorLog(SK_AC*, int, int, char*);
#endif
drivers/net/sk98lin/h/skdrv2nd.h 已删除 100644 → 0
浏览文件 @ ca02f6f8
/******************************************************************************
*
* Name: skdrv2nd.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.15 $
* Date: $Date: 2003/02/25 14:16:40 $
* Purpose: Second header file for driver and all other modules
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2003 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/******************************************************************************
*
* History:
*
* $Log: skdrv2nd.h,v $
* Revision 1.15 2003/02/25 14:16:40 mlindner
* Fix: Copyright statement
*
* Revision 1.14 2003/02/25 13:26:26 mlindner
* Add: Support for various vendors
*
* Revision 1.13 2002/10/02 12:46:02 mlindner
* Add: Support for Yukon
*
* Revision 1.12.2.2 2001/09/05 12:14:50 mlindner
* add: New hardware revision int
*
* Revision 1.12.2.1 2001/03/12 16:50:59 mlindner
* chg: kernel 2.4 adaption
*
* Revision 1.12 2001/03/01 12:52:15 mlindner
* Fixed ring size
*
* Revision 1.11 2001/02/19 13:28:02 mlindner
* Changed PNMI parameter values
*
* Revision 1.10 2001/01/22 14:16:04 mlindner
* added ProcFs functionality
* Dual Net functionality integrated
* Rlmt networks added
*
* Revision 1.1 2000/10/05 19:46:50 phargrov
* Add directory src/vipk_devs_nonlbl/vipk_sk98lin/
* This is the SysKonnect SK-98xx Gigabit Ethernet driver,
* contributed by SysKonnect.
*
* Revision 1.9 2000/02/21 10:39:55 cgoos
* Added flag for jumbo support usage.
*
* Revision 1.8 1999/11/22 13:50:44 cgoos
* Changed license header to GPL.
* Fixed two comments.
*
* Revision 1.7 1999/09/28 12:38:21 cgoos
* Added CheckQueue to SK_AC.
*
* Revision 1.6 1999/07/27 08:04:05 cgoos
* Added checksumming variables to SK_AC.
*
* Revision 1.5 1999/03/29 12:33:26 cgoos
* Rreversed to fine lock granularity.
*
* Revision 1.4 1999/03/15 12:14:02 cgoos
* Added DriverLock to SK_AC.
* Removed other locks.
*
* Revision 1.3 1999/03/01 08:52:27 cgoos
* Changed pAC->PciDev declaration.
*
* Revision 1.2 1999/02/18 10:57:14 cgoos
* Removed SkDrvTimeStamp prototype.
* Fixed SkGeOsGetTime prototype.
*
* Revision 1.1 1999/02/16 07:41:01 cgoos
* First version.
*
*
*
******************************************************************************/
/******************************************************************************
*
* Description:
*
* This is the second include file of the driver, which includes all other
* neccessary files and defines all structures and constants used by the
* driver and the common modules.
*
* Include File Hierarchy:
*
* see skge.c
*
******************************************************************************/
#ifndef __INC_SKDRV2ND_H
#define __INC_SKDRV2ND_H
#include "h/skqueue.h"
#include "h/skgehwt.h"
#include "h/sktimer.h"
#include "h/ski2c.h"
#include "h/skgepnmi.h"
#include "h/skvpd.h"
#include "h/skgehw.h"
#include "h/skgeinit.h"
#include "h/skaddr.h"
#include "h/skgesirq.h"
#include "h/skcsum.h"
#include "h/skrlmt.h"
#include "h/skgedrv.h"
#define SK_PCI_ISCOMPLIANT(result, pdev) { \
result = SK_FALSE; /* default */ \
/* 3Com (0x10b7) */ \
if (pdev->vendor == 0x10b7) { \
/* Gigabit Ethernet Adapter (0x1700) */ \
if ((pdev->device == 0x1700)) { \
result = SK_TRUE; \
} \
/* SysKonnect (0x1148) */ \
} else if (pdev->vendor == 0x1148) { \
/* SK-98xx Gigabit Ethernet Server Adapter (0x4300) */ \
/* SK-98xx V2 Gigabit Ethernet Adapter (0x4320) */ \
if ((pdev->device == 0x4300) || \
(pdev->device == 0x4320)) { \
result = SK_TRUE; \
} \
/* D-Link (0x1186) */ \
} else if (pdev->vendor == 0x1186) { \
/* Gigabit Ethernet Adapter (0x4c00) */ \
if ((pdev->device == 0x4c00)) { \
result = SK_TRUE; \
} \
/* CNet (0x1371) */ \
} else if (pdev->vendor == 0x1371) { \
/* GigaCard Network Adapter (0x434e) */ \
if ((pdev->device == 0x434e)) { \
result = SK_TRUE; \
} \
/* Linksys (0x1737) */ \
} else if (pdev->vendor == 0x1737) { \
/* Gigabit Network Adapter (0x1032) */ \
/* Gigabit Network Adapter (0x1064) */ \
if ((pdev->device == 0x1032) || \
(pdev->device == 0x1064)) { \
result = SK_TRUE; \
} \
} else { \
result = SK_FALSE; \
} \
}
extern SK_MBUF *SkDrvAllocRlmtMbuf(SK_AC*, SK_IOC, unsigned);
extern void SkDrvFreeRlmtMbuf(SK_AC*, SK_IOC, SK_MBUF*);
extern SK_U64 SkOsGetTime(SK_AC*);
extern int SkPciReadCfgDWord(SK_AC*, int, SK_U32*);
extern int SkPciReadCfgWord(SK_AC*, int, SK_U16*);
extern int SkPciReadCfgByte(SK_AC*, int, SK_U8*);
extern int SkPciWriteCfgDWord(SK_AC*, int, SK_U32);
extern int SkPciWriteCfgWord(SK_AC*, int, SK_U16);
extern int SkPciWriteCfgByte(SK_AC*, int, SK_U8);
extern int SkDrvEvent(SK_AC*, SK_IOC IoC, SK_U32, SK_EVPARA);
struct s_DrvRlmtMbuf {
SK_MBUF *pNext; /* Pointer to next RLMT Mbuf. */
SK_U8 *pData; /* Data buffer (virtually contig.). */
unsigned Size; /* Data buffer size. */
unsigned Length; /* Length of packet (<= Size). */
SK_U32 PortIdx; /* Receiving/transmitting port. */
#ifdef SK_RLMT_MBUF_PRIVATE
SK_RLMT_MBUF Rlmt; /* Private part for RLMT. */
#endif /* SK_RLMT_MBUF_PRIVATE */
struct sk_buff *pOs; /* Pointer to message block */
};
/*
* ioctl definitions
*/
#define SK_IOCTL_BASE (SIOCDEVPRIVATE)
#define SK_IOCTL_GETMIB (SK_IOCTL_BASE + 0)
#define SK_IOCTL_SETMIB (SK_IOCTL_BASE + 1)
#define SK_IOCTL_PRESETMIB (SK_IOCTL_BASE + 2)
typedef struct s_IOCTL SK_GE_IOCTL;
struct s_IOCTL {
char* pData;
unsigned int Len;
};
/*
* define sizes of descriptor rings in bytes
*/
#if 0
#define TX_RING_SIZE (8*1024)
#define RX_RING_SIZE (24*1024)
#else
#define TX_RING_SIZE (10 * 40)
#define RX_RING_SIZE (10 * 40)
#endif
/*
* Buffer size for ethernet packets
*/
#define ETH_BUF_SIZE 1540
#define ETH_MAX_MTU 1514
#define ETH_MIN_MTU 60
#define ETH_MULTICAST_BIT 0x01
#define SK_JUMBO_MTU 9000
/*
* transmit priority selects the queue: LOW=asynchron, HIGH=synchron
*/
#define TX_PRIO_LOW 0
#define TX_PRIO_HIGH 1
/*
* alignment of rx/tx descriptors
*/
#define DESCR_ALIGN 8
/*
* definitions for pnmi. TODO
*/
#define SK_DRIVER_RESET(pAC, IoC) 0
#define SK_DRIVER_SENDEVENT(pAC, IoC) 0
#define SK_DRIVER_SELFTEST(pAC, IoC) 0
/* For get mtu you must add an own function */
#define SK_DRIVER_GET_MTU(pAc,IoC,i) 0
#define SK_DRIVER_SET_MTU(pAc,IoC,i,v) 0
#define SK_DRIVER_PRESET_MTU(pAc,IoC,i,v) 0
/* TX and RX descriptors *****************************************************/
typedef struct s_RxD RXD; /* the receive descriptor */
struct s_RxD {
volatile SK_U32 RBControl; /* Receive Buffer Control */
SK_U32 VNextRxd; /* Next receive descriptor,low dword */
SK_U32 VDataLow; /* Receive buffer Addr, low dword */
SK_U32 VDataHigh; /* Receive buffer Addr, high dword */
SK_U32 FrameStat; /* Receive Frame Status word */
SK_U32 TimeStamp; /* Time stamp from XMAC */
SK_U32 TcpSums; /* TCP Sum 2 / TCP Sum 1 */
SK_U32 TcpSumStarts; /* TCP Sum Start 2 / TCP Sum Start 1 */
RXD *pNextRxd; /* Pointer to next Rxd */
struct sk_buff *pMBuf; /* Pointer to Linux' socket buffer */
};
typedef struct s_TxD TXD; /* the transmit descriptor */
struct s_TxD {
volatile SK_U32 TBControl; /* Transmit Buffer Control */
SK_U32 VNextTxd; /* Next transmit descriptor,low dword */
SK_U32 VDataLow; /* Transmit Buffer Addr, low dword */
SK_U32 VDataHigh; /* Transmit Buffer Addr, high dword */
SK_U32 FrameStat; /* Transmit Frame Status Word */
SK_U32 TcpSumOfs; /* Reserved / TCP Sum Offset */
SK_U16 TcpSumSt; /* TCP Sum Start */
SK_U16 TcpSumWr; /* TCP Sum Write */
SK_U32 TcpReserved; /* not used */
TXD *pNextTxd; /* Pointer to next Txd */
struct sk_buff *pMBuf; /* Pointer to Linux' socket buffer */
};
/* definition of flags in descriptor control field */
#define RX_CTRL_OWN_BMU UINT32_C(0x80000000)
#define RX_CTRL_STF UINT32_C(0x40000000)
#define RX_CTRL_EOF UINT32_C(0x20000000)
#define RX_CTRL_EOB_IRQ UINT32_C(0x10000000)
#define RX_CTRL_EOF_IRQ UINT32_C(0x08000000)
#define RX_CTRL_DEV_NULL UINT32_C(0x04000000)
#define RX_CTRL_STAT_VALID UINT32_C(0x02000000)
#define RX_CTRL_TIME_VALID UINT32_C(0x01000000)
#define RX_CTRL_CHECK_DEFAULT UINT32_C(0x00550000)
#define RX_CTRL_CHECK_CSUM UINT32_C(0x00560000)
#define RX_CTRL_LEN_MASK UINT32_C(0x0000FFFF)
#define TX_CTRL_OWN_BMU UINT32_C(0x80000000)
#define TX_CTRL_STF UINT32_C(0x40000000)
#define TX_CTRL_EOF UINT32_C(0x20000000)
#define TX_CTRL_EOB_IRQ UINT32_C(0x10000000)
#define TX_CTRL_EOF_IRQ UINT32_C(0x08000000)
#define TX_CTRL_ST_FWD UINT32_C(0x04000000)
#define TX_CTRL_DISAB_CRC UINT32_C(0x02000000)
#define TX_CTRL_SOFTWARE UINT32_C(0x01000000)
#define TX_CTRL_CHECK_DEFAULT UINT32_C(0x00550000)
#define TX_CTRL_CHECK_CSUM UINT32_C(0x00560000)
#define TX_CTRL_LEN_MASK UINT32_C(0x0000FFFF)
/* The offsets of registers in the TX and RX queue control io area ***********/
#define RX_Q_BUF_CTRL_CNT 0x00
#define RX_Q_NEXT_DESCR_LOW 0x04
#define RX_Q_BUF_ADDR_LOW 0x08
#define RX_Q_BUF_ADDR_HIGH 0x0c
#define RX_Q_FRAME_STAT 0x10
#define RX_Q_TIME_STAMP 0x14
#define RX_Q_CSUM_1_2 0x18
#define RX_Q_CSUM_START_1_2 0x1c
#define RX_Q_CUR_DESCR_LOW 0x20
#define RX_Q_DESCR_HIGH 0x24
#define RX_Q_CUR_ADDR_LOW 0x28
#define RX_Q_CUR_ADDR_HIGH 0x2c
#define RX_Q_CUR_BYTE_CNT 0x30
#define RX_Q_CTRL 0x34
#define RX_Q_FLAG 0x38
#define RX_Q_TEST1 0x3c
#define RX_Q_TEST2 0x40
#define RX_Q_TEST3 0x44
#define TX_Q_BUF_CTRL_CNT 0x00
#define TX_Q_NEXT_DESCR_LOW 0x04
#define TX_Q_BUF_ADDR_LOW 0x08
#define TX_Q_BUF_ADDR_HIGH 0x0c
#define TX_Q_FRAME_STAT 0x10
#define TX_Q_CSUM_START 0x14
#define TX_Q_CSUM_START_POS 0x18
#define TX_Q_RESERVED 0x1c
#define TX_Q_CUR_DESCR_LOW 0x20
#define TX_Q_DESCR_HIGH 0x24
#define TX_Q_CUR_ADDR_LOW 0x28
#define TX_Q_CUR_ADDR_HIGH 0x2c
#define TX_Q_CUR_BYTE_CNT 0x30
#define TX_Q_CTRL 0x34
#define TX_Q_FLAG 0x38
#define TX_Q_TEST1 0x3c
#define TX_Q_TEST2 0x40
#define TX_Q_TEST3 0x44
/* definition of flags in the queue control field */
#define RX_Q_CTRL_POLL_ON 0x00000080
#define RX_Q_CTRL_POLL_OFF 0x00000040
#define RX_Q_CTRL_STOP 0x00000020
#define RX_Q_CTRL_START 0x00000010
#define RX_Q_CTRL_CLR_I_PAR 0x00000008
#define RX_Q_CTRL_CLR_I_EOB 0x00000004
#define RX_Q_CTRL_CLR_I_EOF 0x00000002
#define RX_Q_CTRL_CLR_I_ERR 0x00000001
#define TX_Q_CTRL_POLL_ON 0x00000080
#define TX_Q_CTRL_POLL_OFF 0x00000040
#define TX_Q_CTRL_STOP 0x00000020
#define TX_Q_CTRL_START 0x00000010
#define TX_Q_CTRL_CLR_I_EOB 0x00000004
#define TX_Q_CTRL_CLR_I_EOF 0x00000002
#define TX_Q_CTRL_CLR_I_ERR 0x00000001
/* Interrupt bits in the interrupts source register **************************/
#define IRQ_HW_ERROR 0x80000000
#define IRQ_RESERVED 0x40000000
#define IRQ_PKT_TOUT_RX1 0x20000000
#define IRQ_PKT_TOUT_RX2 0x10000000
#define IRQ_PKT_TOUT_TX1 0x08000000
#define IRQ_PKT_TOUT_TX2 0x04000000
#define IRQ_I2C_READY 0x02000000
#define IRQ_SW 0x01000000
#define IRQ_EXTERNAL_REG 0x00800000
#define IRQ_TIMER 0x00400000
#define IRQ_MAC1 0x00200000
#define IRQ_LINK_SYNC_C_M1 0x00100000
#define IRQ_MAC2 0x00080000
#define IRQ_LINK_SYNC_C_M2 0x00040000
#define IRQ_EOB_RX1 0x00020000
#define IRQ_EOF_RX1 0x00010000
#define IRQ_CHK_RX1 0x00008000
#define IRQ_EOB_RX2 0x00004000
#define IRQ_EOF_RX2 0x00002000
#define IRQ_CHK_RX2 0x00001000
#define IRQ_EOB_SY_TX1 0x00000800
#define IRQ_EOF_SY_TX1 0x00000400
#define IRQ_CHK_SY_TX1 0x00000200
#define IRQ_EOB_AS_TX1 0x00000100
#define IRQ_EOF_AS_TX1 0x00000080
#define IRQ_CHK_AS_TX1 0x00000040
#define IRQ_EOB_SY_TX2 0x00000020
#define IRQ_EOF_SY_TX2 0x00000010
#define IRQ_CHK_SY_TX2 0x00000008
#define IRQ_EOB_AS_TX2 0x00000004
#define IRQ_EOF_AS_TX2 0x00000002
#define IRQ_CHK_AS_TX2 0x00000001
#define DRIVER_IRQS (IRQ_SW | IRQ_EOF_RX1 | IRQ_EOF_RX2 | \
IRQ_EOF_SY_TX1 | IRQ_EOF_AS_TX1 | \
IRQ_EOF_SY_TX2 | IRQ_EOF_AS_TX2)
#define SPECIAL_IRQS (IRQ_HW_ERROR | IRQ_PKT_TOUT_RX1 | IRQ_PKT_TOUT_RX2 | \
IRQ_PKT_TOUT_TX1 | IRQ_PKT_TOUT_TX2 | \
IRQ_I2C_READY | IRQ_EXTERNAL_REG | IRQ_TIMER | \
IRQ_MAC1 | IRQ_LINK_SYNC_C_M1 | \
IRQ_MAC2 | IRQ_LINK_SYNC_C_M2 | \
IRQ_CHK_RX1 | IRQ_CHK_RX2 | \
IRQ_CHK_SY_TX1 | IRQ_CHK_AS_TX1 | \
IRQ_CHK_SY_TX2 | IRQ_CHK_AS_TX2)
#define IRQ_MASK (IRQ_SW | IRQ_EOB_RX1 | IRQ_EOF_RX1 | \
IRQ_EOB_RX2 | IRQ_EOF_RX2 | \
IRQ_EOB_SY_TX1 | IRQ_EOF_SY_TX1 | \
IRQ_EOB_AS_TX1 | IRQ_EOF_AS_TX1 | \
IRQ_EOB_SY_TX2 | IRQ_EOF_SY_TX2 | \
IRQ_EOB_AS_TX2 | IRQ_EOF_AS_TX2 | \
IRQ_HW_ERROR | IRQ_PKT_TOUT_RX1 | IRQ_PKT_TOUT_RX2 | \
IRQ_PKT_TOUT_TX1 | IRQ_PKT_TOUT_TX2 | \
IRQ_I2C_READY | IRQ_EXTERNAL_REG | IRQ_TIMER | \
IRQ_MAC1 | \
IRQ_MAC2 | \
IRQ_CHK_RX1 | IRQ_CHK_RX2 | \
IRQ_CHK_SY_TX1 | IRQ_CHK_AS_TX1 | \
IRQ_CHK_SY_TX2 | IRQ_CHK_AS_TX2)
#define IRQ_HWE_MASK 0x00000FFF /* enable all HW irqs */
typedef struct s_DevNet DEV_NET;
struct s_DevNet {
int PortNr;
int NetNr;
int Mtu;
int Up;
SK_AC *pAC;
};
typedef struct s_TxPort TX_PORT;
struct s_TxPort {
/* the transmit descriptor rings */
caddr_t pTxDescrRing; /* descriptor area memory */
SK_U64 VTxDescrRing; /* descr. area bus virt. addr. */
TXD *pTxdRingHead; /* Head of Tx rings */
TXD *pTxdRingTail; /* Tail of Tx rings */
TXD *pTxdRingPrev; /* descriptor sent previously */
int TxdRingFree; /* # of free entrys */
#if 0
spinlock_t TxDesRingLock; /* serialize descriptor accesses */
#endif
caddr_t HwAddr; /* bmu registers address */
int PortIndex; /* index number of port (0 or 1) */
};
typedef struct s_RxPort RX_PORT;
struct s_RxPort {
/* the receive descriptor rings */
caddr_t pRxDescrRing; /* descriptor area memory */
SK_U64 VRxDescrRing; /* descr. area bus virt. addr. */
RXD *pRxdRingHead; /* Head of Rx rings */
RXD *pRxdRingTail; /* Tail of Rx rings */
RXD *pRxdRingPrev; /* descriptor given to BMU previously */
int RxdRingFree; /* # of free entrys */
#if 0
spinlock_t RxDesRingLock; /* serialize descriptor accesses */
#endif
int RxFillLimit; /* limit for buffers in ring */
caddr_t HwAddr; /* bmu registers address */
int PortIndex; /* index number of port (0 or 1) */
};
typedef struct s_PerStrm PER_STRM;
#define SK_ALLOC_IRQ 0x00000001
/****************************************************************************
* Per board structure / Adapter Context structure:
* Allocated within attach(9e) and freed within detach(9e).
* Contains all 'per device' necessary handles, flags, locks etc.:
*/
struct s_AC {
SK_GEINIT GIni; /* GE init struct */
SK_PNMI Pnmi; /* PNMI data struct */
SK_VPD vpd; /* vpd data struct */
SK_QUEUE Event; /* Event queue */
SK_HWT Hwt; /* Hardware Timer control struct */
SK_TIMCTRL Tim; /* Software Timer control struct */
SK_I2C I2c; /* I2C relevant data structure */
SK_ADDR Addr; /* for Address module */
SK_CSUM Csum; /* for checksum module */
SK_RLMT Rlmt; /* for rlmt module */
#if 0
spinlock_t SlowPathLock; /* Normal IRQ lock */
#endif
SK_PNMI_STRUCT_DATA PnmiStruct; /* structure to get all Pnmi-Data */
int RlmtMode; /* link check mode to set */
int RlmtNets; /* Number of nets */
SK_IOC IoBase; /* register set of adapter */
int BoardLevel; /* level of active hw init (0-2) */
char DeviceStr[80]; /* adapter string from vpd */
SK_U32 AllocFlag; /* flag allocation of resources */
#if 0
struct pci_dev *PciDev; /* for access to pci config space */
SK_U32 PciDevId; /* pci device id */
#else
int PciDev;
#endif
struct SK_NET_DEVICE *dev[2]; /* pointer to device struct */
char Name[30]; /* driver name */
struct SK_NET_DEVICE *Next; /* link all devices (for clearing) */
int RxBufSize; /* length of receive buffers */
#if 0
struct net_device_stats stats; /* linux 'netstat -i' statistics */
#endif
int Index; /* internal board index number */
/* adapter RAM sizes for queues of active port */
int RxQueueSize; /* memory used for receive queue */
int TxSQueueSize; /* memory used for sync. tx queue */
int TxAQueueSize; /* memory used for async. tx queue */
int PromiscCount; /* promiscuous mode counter */
int AllMultiCount; /* allmulticast mode counter */
int MulticCount; /* number of different MC */
/* addresses for this board */
/* (may be more than HW can)*/
int HWRevision; /* Hardware revision */
int ActivePort; /* the active XMAC port */
int MaxPorts; /* number of activated ports */
int TxDescrPerRing; /* # of descriptors per tx ring */
int RxDescrPerRing; /* # of descriptors per rx ring */
caddr_t pDescrMem; /* Pointer to the descriptor area */
dma_addr_t pDescrMemDMA; /* PCI DMA address of area */
/* the port structures with descriptor rings */
TX_PORT TxPort[SK_MAX_MACS][2];
RX_PORT RxPort[SK_MAX_MACS];
unsigned int CsOfs1; /* for checksum calculation */
unsigned int CsOfs2; /* for checksum calculation */
SK_U32 CsOfs; /* for checksum calculation */
SK_BOOL CheckQueue; /* check event queue soon */
/* Only for tests */
int PortUp;
int PortDown;
};
#endif /* __INC_SKDRV2ND_H */
drivers/net/sk98lin/h/skerror.h 已删除 100644 → 0
浏览文件 @ ca02f6f8
/******************************************************************************
*
* Name: skerror.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.5 $
* Date: $Date: 2002/04/25 11:05:10 $
* Purpose: SK specific Error log support
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/******************************************************************************
*
* History:
* $Log: skerror.h,v $
* Revision 1.5 2002/04/25 11:05:10 rschmidt
* Editorial changes
*
* Revision 1.4 1999/11/22 13:51:59 cgoos
* Changed license header to GPL.
*
* Revision 1.3 1999/09/14 14:04:42 rwahl
* Added error base SK_ERRBASE_PECP.
* Changed error base for driver.
*
* Revision 1.2 1998/08/11 11:15:41 gklug
* chg: comments
*
* Revision 1.1 1998/08/11 11:09:38 gklug
* add: error bases
* add: error Classes
* first version
*
*
*
******************************************************************************/
#ifndef _INC_SKERROR_H_
#define _INC_SKERROR_H_
/*
* Define Error Classes
*/
#define SK_ERRCL_OTHER (0) /* Other error */
#define SK_ERRCL_CONFIG (1L<<0) /* Configuration error */
#define SK_ERRCL_INIT (1L<<1) /* Initialization error */
#define SK_ERRCL_NORES (1L<<2) /* Out of Resources error */
#define SK_ERRCL_SW (1L<<3) /* Internal Software error */
#define SK_ERRCL_HW (1L<<4) /* Hardware Failure */
#define SK_ERRCL_COMM (1L<<5) /* Communication error */
/*
* Define Error Code Bases
*/
#define SK_ERRBASE_RLMT 100 /* Base Error number for RLMT */
#define SK_ERRBASE_HWINIT 200 /* Base Error number for HWInit */
#define SK_ERRBASE_VPD 300 /* Base Error number for VPD */
#define SK_ERRBASE_PNMI 400 /* Base Error number for PNMI */
#define SK_ERRBASE_CSUM 500 /* Base Error number for Checksum */
#define SK_ERRBASE_SIRQ 600 /* Base Error number for Special IRQ */
#define SK_ERRBASE_I2C 700 /* Base Error number for I2C module */
#define SK_ERRBASE_QUEUE 800 /* Base Error number for Scheduler */
#define SK_ERRBASE_ADDR 900 /* Base Error number for Address module */
#define SK_ERRBASE_PECP 1000 /* Base Error number for PECP */
#define SK_ERRBASE_DRV 1100 /* Base Error number for Driver */
#endif /* _INC_SKERROR_H_ */
drivers/net/sk98lin/h/skgedrv.h 已删除 100644 → 0
浏览文件 @ ca02f6f8
/******************************************************************************
*
* Name: skgedrv.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.6 $
* Date: $Date: 2002/07/15 15:38:01 $
* Purpose: Interface with the driver
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/******************************************************************************
*
* History:
*
* $Log: skgedrv.h,v $
* Revision 1.6 2002/07/15 15:38:01 rschmidt
* Power Management support
* Editorial changes
*
* Revision 1.5 2002/04/25 11:05:47 rschmidt
* Editorial changes
*
* Revision 1.4 1999/11/22 13:52:46 cgoos
* Changed license header to GPL.
*
* Revision 1.3 1998/12/01 13:31:39 cgoos
* SWITCH INTERN Event added.
*
* Revision 1.2 1998/11/25 08:28:38 gklug
* rmv: PORT SWITCH Event
*
* Revision 1.1 1998/09/29 06:14:07 gklug
* add: driver events (initial version)
*
*
******************************************************************************/
#ifndef __INC_SKGEDRV_H_
#define __INC_SKGEDRV_H_
/* defines ********************************************************************/
/*
* Define the driver events.
* Usually the events are defined by the destination module.
* In case of the driver we put the definition of the events here.
*/
#define SK_DRV_PORT_RESET 1 /* The port needs to be reset */
#define SK_DRV_NET_UP 2 /* The net is operational */
#define SK_DRV_NET_DOWN 3 /* The net is down */
#define SK_DRV_SWITCH_SOFT 4 /* Ports switch with both links connected */
#define SK_DRV_SWITCH_HARD 5 /* Port switch due to link failure */
#define SK_DRV_RLMT_SEND 6 /* Send a RLMT packet */
#define SK_DRV_ADAP_FAIL 7 /* The whole adapter fails */
#define SK_DRV_PORT_FAIL 8 /* One port fails */
#define SK_DRV_SWITCH_INTERN 9 /* Port switch by the driver itself */
#define SK_DRV_POWER_DOWN 10 /* Power down mode */
#endif /* __INC_SKGEDRV_H_ */
drivers/net/sk98lin/h/skgehw.h 已删除 100644 → 0
浏览文件 @ ca02f6f8
此差异已折叠。
drivers/net/sk98lin/h/skgehwt.h 已删除 100644 → 0
浏览文件 @ ca02f6f8
/******************************************************************************
*
* Name: skhwt.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.5 $
* Date: $Date: 1999/11/22 13:54:24 $
* Purpose: Defines for the hardware timer functions
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998,1999 SysKonnect,
* a business unit of Schneider & Koch & Co. Datensysteme GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/******************************************************************************
*
* History:
*
* $Log: skgehwt.h,v $
* Revision 1.5 1999/11/22 13:54:24 cgoos
* Changed license header to GPL.
*
* Revision 1.4 1998/08/19 09:50:58 gklug
* fix: remove struct keyword from c-code (see CCC) add typedefs
*
* Revision 1.3 1998/08/14 07:09:29 gklug
* fix: chg pAc -> pAC
*
* Revision 1.2 1998/08/07 12:54:21 gklug
* fix: first compiled version
*
* Revision 1.1 1998/08/07 09:32:58 gklug
* first version
*
*
*
*
*
******************************************************************************/
/*
* SKGEHWT.H contains all defines and types for the timer functions
*/
#ifndef _SKGEHWT_H_
#define _SKGEHWT_H_
/*
* SK Hardware Timer
* - needed wherever the HWT module is used
* - use in Adapters context name pAC->Hwt
*/
typedef struct s_Hwt {
SK_U32 TStart ; /* HWT start */
SK_U32 TStop ; /* HWT stop */
int TActive ; /* HWT: flag : active/inactive */
} SK_HWT;
extern void SkHwtInit(SK_AC *pAC, SK_IOC Ioc);
extern void SkHwtStart(SK_AC *pAC, SK_IOC Ioc, SK_U32 Time);
extern void SkHwtStop(SK_AC *pAC, SK_IOC Ioc);
extern SK_U32 SkHwtRead(SK_AC *pAC,SK_IOC Ioc);
extern void SkHwtIsr(SK_AC *pAC, SK_IOC Ioc);
#endif /* _SKGEHWT_H_ */
drivers/net/sk98lin/h/skgei2c.h 已删除 100644 → 0
浏览文件 @ ca02f6f8
/******************************************************************************
*
* Name: skgei2c.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.23 $
* Date: $Date: 2002/12/19 14:34:27 $
* Purpose: Special GEnesis defines for TWSI
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/******************************************************************************
*
* History:
*
* $Log: skgei2c.h,v $
* Revision 1.23 2002/12/19 14:34:27 rschmidt
* Added cast in macros SK_I2C_SET_BIT() and SK_I2C_CLR_BIT()
* Editorial changes (TWSI)
*
* Revision 1.22 2002/10/14 16:45:56 rschmidt
* Editorial changes (TWSI)
*
* Revision 1.21 2002/08/13 08:42:24 rschmidt
* Changed define for SK_MIN_SENSORS back to 5
* Merged defines for PHY PLL 3V3 voltage (A and B)
* Editorial changes
*
* Revision 1.20 2002/08/06 09:43:56 jschmalz
* Extensions and changes for Yukon
*
* Revision 1.19 2002/08/02 12:00:08 rschmidt
* Added defines for YUKON sensors
* Editorial changes
*
* Revision 1.18 2001/08/16 12:44:33 afischer
* LM80 sensor init values corrected
*
* Revision 1.17 1999/11/22 13:55:25 cgoos
* Changed license header to GPL.
*
* Revision 1.16 1999/11/12 08:24:10 malthoff
* Change voltage warning and error limits
* (warning +-5%, error +-10%).
*
* Revision 1.15 1999/09/14 14:14:43 malthoff
* The 1000BT Dual Link adapter has got only one Fan.
* The second Fan has been removed.
*
* Revision 1.14 1999/05/27 13:40:50 malthoff
* Fan Divisor = 1. Assuming fan with 6500 rpm.
*
* Revision 1.13 1999/05/20 14:56:55 malthoff
* Bug Fix: Missing brace in SK_LM80_FAN_FAKTOR.
*
* Revision 1.12 1999/05/20 09:22:00 cgoos
* Changes for 1000Base-T (Fan sensors).
*
* Revision 1.11 1998/10/14 05:57:22 cgoos
* Fixed compilation warnings.
*
* Revision 1.10 1998/09/04 08:37:00 malthoff
* bugfix: correct the SK_I2C_GET_CTL() macro.
*
* Revision 1.9 1998/08/25 06:10:03 gklug
* add: thresholds for all sensors
*
* Revision 1.8 1998/08/20 11:37:42 gklug
* chg: change Ioc to IoC
*
* Revision 1.7 1998/08/20 08:53:11 gklug
* fix: compiler errors
* add: Threshold values
*
* Revision 1.6 1998/08/17 11:37:09 malthoff
* Bugfix in SK_I2C_CTL macro. The parameter 'dev'
* has to be shifted 9 bits.
*
* Revision 1.5 1998/08/17 06:52:21 malthoff
* Remove unrequired macros.
* Add macros for accessing TWSI SW register.
*
* Revision 1.4 1998/08/13 08:30:18 gklug
* add: conversion factors for read values
* add: new state SEN_VALEXT to read extension value of temperature sensor
*
* Revision 1.3 1998/08/12 13:37:56 gklug
* rmv: error numbers and messages
*
* Revision 1.2 1998/08/11 07:54:38 gklug
* add: sensor states for GE sensors
* add: Macro to access TWSI hardware register
* chg: Error messages for TWSI errors
*
* Revision 1.1 1998/07/17 11:27:56 gklug
* Created.
*
*
*
******************************************************************************/
/*
* SKGEI2C.H contains all SK-98xx specific defines for the TWSI handling
*/
#ifndef _INC_SKGEI2C_H_
#define _INC_SKGEI2C_H_
/*
* Macros to access the B2_I2C_CTRL
*/
#define SK_I2C_CTL(IoC, flag, dev, reg, burst) \
SK_OUT32(IoC, B2_I2C_CTRL,\
(flag ? 0x80000000UL : 0x0L) | \
(((SK_U32) reg << 16) & I2C_ADDR) | \
(((SK_U32) dev << 9) & I2C_DEV_SEL) | \
(( burst << 4) & I2C_BURST_LEN))
#define SK_I2C_STOP(IoC) { \
SK_U32 I2cCtrl; \
SK_IN32(IoC, B2_I2C_CTRL, &I2cCtrl); \
SK_OUT32(IoC, B2_I2C_CTRL, I2cCtrl | I2C_STOP); \
}
#define SK_I2C_GET_CTL(IoC, pI2cCtrl) SK_IN32(IoC, B2_I2C_CTRL, pI2cCtrl)
/*
* Macros to access the TWSI SW Registers
*/
#define SK_I2C_SET_BIT(IoC, SetBits) { \
SK_U8 OrgBits; \
SK_IN8(IoC, B2_I2C_SW, &OrgBits); \
SK_OUT8(IoC, B2_I2C_SW, OrgBits | (SK_U8)(SetBits)); \
}
#define SK_I2C_CLR_BIT(IoC, ClrBits) { \
SK_U8 OrgBits; \
SK_IN8(IoC, B2_I2C_SW, &OrgBits); \
SK_OUT8(IoC, B2_I2C_SW, OrgBits & ~((SK_U8)(ClrBits))); \
}
#define SK_I2C_GET_SW(IoC, pI2cSw) SK_IN8(IoC, B2_I2C_SW, pI2cSw)
/*
* define the possible sensor states
*/
#define SK_SEN_IDLE 0 /* Idle: sensor not read */
#define SK_SEN_VALUE 1 /* Value Read cycle */
#define SK_SEN_VALEXT 2 /* Extended Value Read cycle */
/*
* Conversion factor to convert read Voltage sensor to milli Volt
* Conversion factor to convert read Temperature sensor to 10th degree Celsius
*/
#define SK_LM80_VT_LSB 22 /* 22mV LSB resolution */
#define SK_LM80_TEMP_LSB 10 /* 1 degree LSB resolution */
#define SK_LM80_TEMPEXT_LSB 5 /* 0.5 degree LSB resolution for the
* extension value
*/
#define SK_LM80_FAN_FAKTOR ((22500L*60)/(1*2))
/* formula: counter = (22500*60)/(rpm * divisor * pulses/2)
* assuming: 6500rpm, 4 pulses, divisor 1
*/
/*
* Define sensor management data
* Maximum is reached on copperfield with dual Broadcom.
* Board specific maximum is in pAC->I2c.MaxSens
*/
#define SK_MAX_SENSORS 8 /* maximal no. of installed sensors */
#define SK_MIN_SENSORS 5 /* minimal no. of installed sensors */
/*
* To watch the statemachine (JS) use the timer in two ways instead of one as hitherto
*/
#define SK_TIMER_WATCH_STATEMACHINE 0 /* Watch the statemachine to finish in a specific time */
#define SK_TIMER_NEW_GAUGING 1 /* Start a new gauging when timer expires */
/*
* Defines for the individual Thresholds
*/
/* Temperature sensor */
#define SK_SEN_TEMP_HIGH_ERR 800 /* Temperature High Err Threshold */
#define SK_SEN_TEMP_HIGH_WARN 700 /* Temperature High Warn Threshold */
#define SK_SEN_TEMP_LOW_WARN 100 /* Temperature Low Warn Threshold */
#define SK_SEN_TEMP_LOW_ERR 0 /* Temperature Low Err Threshold */
/* VCC which should be 5 V */
#define SK_SEN_PCI_5V_HIGH_ERR 5588 /* Voltage PCI High Err Threshold */
#define SK_SEN_PCI_5V_HIGH_WARN 5346 /* Voltage PCI High Warn Threshold */
#define SK_SEN_PCI_5V_LOW_WARN 4664 /* Voltage PCI Low Warn Threshold */
#define SK_SEN_PCI_5V_LOW_ERR 4422 /* Voltage PCI Low Err Threshold */
/*
* VIO may be 5 V or 3.3 V. Initialization takes two parts:
* 1. Initialize lowest lower limit and highest higher limit.
* 2. After the first value is read correct the upper or the lower limit to
* the appropriate C constant.
*
* Warning limits are +-5% of the exepected voltage.
* Error limits are +-10% of the expected voltage.
*/
/* Bug fix AF: 16.Aug.2001: Correct the init base of LM80 sensor */
#define SK_SEN_PCI_IO_5V_HIGH_ERR 5566 /* + 10% V PCI-IO High Err Threshold */
#define SK_SEN_PCI_IO_5V_HIGH_WARN 5324 /* + 5% V PCI-IO High Warn Threshold */
/* 5000 mVolt */
#define SK_SEN_PCI_IO_5V_LOW_WARN 4686 /* - 5% V PCI-IO Low Warn Threshold */
#define SK_SEN_PCI_IO_5V_LOW_ERR 4444 /* - 10% V PCI-IO Low Err Threshold */
#define SK_SEN_PCI_IO_RANGE_LIMITER 4000 /* 4000 mV range delimiter */
/* correction values for the second pass */
#define SK_SEN_PCI_IO_3V3_HIGH_ERR 3850 /* + 15% V PCI-IO High Err Threshold */
#define SK_SEN_PCI_IO_3V3_HIGH_WARN 3674 /* + 10% V PCI-IO High Warn Threshold */
/* 3300 mVolt */
#define SK_SEN_PCI_IO_3V3_LOW_WARN 2926 /* - 10% V PCI-IO Low Warn Threshold */
#define SK_SEN_PCI_IO_3V3_LOW_ERR 2772 /* - 15% V PCI-IO Low Err Threshold */
/*
* VDD voltage
*/
#define SK_SEN_VDD_HIGH_ERR 3630 /* Voltage ASIC High Err Threshold */
#define SK_SEN_VDD_HIGH_WARN 3476 /* Voltage ASIC High Warn Threshold */
#define SK_SEN_VDD_LOW_WARN 3146 /* Voltage ASIC Low Warn Threshold */
#define SK_SEN_VDD_LOW_ERR 2970 /* Voltage ASIC Low Err Threshold */
/*
* PHY PLL 3V3 voltage
*/
#define SK_SEN_PLL_3V3_HIGH_ERR 3630 /* Voltage PMA High Err Threshold */
#define SK_SEN_PLL_3V3_HIGH_WARN 3476 /* Voltage PMA High Warn Threshold */
#define SK_SEN_PLL_3V3_LOW_WARN 3146 /* Voltage PMA Low Warn Threshold */
#define SK_SEN_PLL_3V3_LOW_ERR 2970 /* Voltage PMA Low Err Threshold */
/*
* VAUX (YUKON only)
*/
#define SK_SEN_VAUX_3V3_HIGH_ERR 3630 /* Voltage VAUX High Err Threshold */
#define SK_SEN_VAUX_3V3_HIGH_WARN 3476 /* Voltage VAUX High Warn Threshold */
#define SK_SEN_VAUX_3V3_LOW_WARN 3146 /* Voltage VAUX Low Warn Threshold */
#define SK_SEN_VAUX_3V3_LOW_ERR 2970 /* Voltage VAUX Low Err Threshold */
#define SK_SEN_VAUX_0V_WARN_ERR 0 /* if VAUX not present */
#define SK_SEN_VAUX_RANGE_LIMITER 1000 /* 1000 mV range delimiter */
/*
* PHY 2V5 voltage
*/
#define SK_SEN_PHY_2V5_HIGH_ERR 2750 /* Voltage PHY High Err Threshold */
#define SK_SEN_PHY_2V5_HIGH_WARN 2640 /* Voltage PHY High Warn Threshold */
#define SK_SEN_PHY_2V5_LOW_WARN 2376 /* Voltage PHY Low Warn Threshold */
#define SK_SEN_PHY_2V5_LOW_ERR 2222 /* Voltage PHY Low Err Threshold */
/*
* ASIC Core 1V5 voltage (YUKON only)
*/
#define SK_SEN_CORE_1V5_HIGH_ERR 1650 /* Voltage ASIC Core High Err Threshold */
#define SK_SEN_CORE_1V5_HIGH_WARN 1575 /* Voltage ASIC Core High Warn Threshold */
#define SK_SEN_CORE_1V5_LOW_WARN 1425 /* Voltage ASIC Core Low Warn Threshold */
#define SK_SEN_CORE_1V5_LOW_ERR 1350 /* Voltage ASIC Core Low Err Threshold */
/*
* FAN 1 speed
*/
/* assuming: 6500rpm +-15%, 4 pulses,
* warning at: 80 %
* error at: 70 %
* no upper limit
*/
#define SK_SEN_FAN_HIGH_ERR 20000 /* FAN Speed High Err Threshold */
#define SK_SEN_FAN_HIGH_WARN 20000 /* FAN Speed High Warn Threshold */
#define SK_SEN_FAN_LOW_WARN 5200 /* FAN Speed Low Warn Threshold */
#define SK_SEN_FAN_LOW_ERR 4550 /* FAN Speed Low Err Threshold */
/*
* Some Voltages need dynamic thresholds
*/
#define SK_SEN_DYN_INIT_NONE 0 /* No dynamic init of thresholds */
#define SK_SEN_DYN_INIT_PCI_IO 10 /* Init PCI-IO with new thresholds */
#define SK_SEN_DYN_INIT_VAUX 11 /* Init VAUX with new thresholds */
extern int SkLm80ReadSensor(SK_AC *pAC, SK_IOC IoC, SK_SENSOR *pSen);
#endif /* n_INC_SKGEI2C_H */
drivers/net/sk98lin/h/skgeinit.h 已删除 100644 → 0
浏览文件 @ ca02f6f8
此差异已折叠。
drivers/net/sk98lin/h/skgepnm2.h 已删除 100644 → 0
浏览文件 @ ca02f6f8
/*****************************************************************************
*
* Name: skgepnm2.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.34 $
* Date: $Date: 2002/12/16 09:05:18 $
* Purpose: Defines for Private Network Management Interface
*
****************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2001 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/*****************************************************************************
*
* History:
*
* $Log: skgepnm2.h,v $
* Revision 1.34 2002/12/16 09:05:18 tschilli
* Code for VCT handling added.
*
* Revision 1.33 2002/09/10 09:00:03 rwahl
* Adapted boolean definitions according sktypes.
*
* Revision 1.32 2002/08/09 09:47:01 rwahl
* Added write-only flag to oid access defines.
* Editorial changes.
*
* Revision 1.31 2002/07/17 19:23:18 rwahl
* - Replaced MAC counter definitions by enumeration.
* - Added definition SK_PNMI_MAC_TYPES.
* - Added chipset defnition for Yukon.
*
* Revision 1.30 2001/02/06 10:03:41 mkunz
* - Pnmi V4 dual net support added. Interface functions and macros extended
* - Vpd bug fixed
* - OID_SKGE_MTU added
*
* Revision 1.29 2001/01/22 13:41:37 rassmann
* Supporting two nets on dual-port adapters.
*
* Revision 1.28 2000/08/03 15:12:48 rwahl
* - Additional comment for MAC statistic data structure.
*
* Revision 1.27 2000/08/01 16:10:18 rwahl
* - Added mac statistic data structure for StatRxLongFrame counter.
*
* Revision 1.26 2000/03/31 13:51:34 rwahl
* Added SK_UPTR cast to offset calculation for PNMI struct fields;
* missing cast caused compiler warnings by Win64 compiler.
*
* Revision 1.25 1999/11/22 13:57:41 cgoos
* Changed license header to GPL.
* Allowing overwrite for SK_PNMI_STORE/_READ defines.
*
* Revision 1.24 1999/04/13 15:11:11 mhaveman
* Changed copyright.
*
* Revision 1.23 1999/01/28 15:07:12 mhaveman
* Changed default threshold for port switches per hour from 10
* to 240 which means 4 switches per minute. This fits better
* the granularity of 32 for the port switch estimate
* counter.
*
* Revision 1.22 1999/01/05 12:52:30 mhaveman
* Removed macro SK_PNMI_MICRO_SEC.
*
* Revision 1.21 1999/01/05 12:50:34 mhaveman
* Enlarged macro definition SK_PNMI_HUNDREDS_SEC() so that no 64-bit
* arithmetic is necessary if SK_TICKS_PER_SEC is 100.
*
* Revision 1.20 1998/12/09 14:02:53 mhaveman
* Defined macro SK_PNMI_DEF_RLMT_CHG_THRES for default port switch
* threshold.
*
* Revision 1.19 1998/12/03 11:28:41 mhaveman
* Removed SK_PNMI_CHECKPTR macro.
*
* Revision 1.18 1998/12/03 11:21:00 mhaveman
* -Added pointer check macro SK_PNMI_CHECKPTR
* -Added macros SK_PNMI_VPD_ARR_SIZE and SK_PNMI_VPD_STR_SIZE for
* VPD key evaluation.
*
* Revision 1.17 1998/11/20 13:20:33 mhaveman
* Fixed bug in SK_PNMI_SET_STAT macro. ErrorStatus was not correctly set.
*
* Revision 1.16 1998/11/20 08:08:49 mhaveman
* Macro SK_PNMI_CHECKFLAGS has got a if clause.
*
* Revision 1.15 1998/11/03 13:53:40 mhaveman
* Fixed alignment problem in macor SK_PNMI_SET_STAT macro.
*
* Revision 1.14 1998/10/30 15:50:13 mhaveman
* Added macro SK_PNMI_MICRO_SEC()
*
* Revision 1.13 1998/10/30 12:32:20 mhaveman
* Added forgotten cast in SK_PNMI_READ_U32 macro.
*
* Revision 1.12 1998/10/29 15:40:26 mhaveman
* -Changed SK_PNMI_TRAP_SENSOR_LEN because SensorDescr has now
* variable string length.
* -Defined SK_PNMI_CHECKFLAGS macro
*
* Revision 1.11 1998/10/29 08:53:34 mhaveman
* Removed SK_PNMI_RLM_XXX table indexed because these counters need
* not been saved over XMAC resets.
*
* Revision 1.10 1998/10/28 08:48:20 mhaveman
* -Added macros for storage according to alignment
* -Changed type of Instance to SK_U32 because of VPD
* -Removed trap structures. Not needed because of alignment problem
* -Changed type of Action form SK_U8 to int
*
* Revision 1.9 1998/10/21 13:34:45 mhaveman
* Shit, mismatched calculation of SK_PNMI_HUNDREDS_SEC. Corrected.
*
* Revision 1.8 1998/10/21 13:24:58 mhaveman
* Changed calculation of hundreds of seconds.
*
* Revision 1.7 1998/10/20 07:31:41 mhaveman
* Made type changes to unsigned int where possible.
*
* Revision 1.6 1998/09/04 17:04:05 mhaveman
* Added Sync counters to offset storage to provided settled values on
* port switch.
*
* Revision 1.5 1998/09/04 12:45:35 mhaveman
* Removed dummies for SK_DRIVER_ macros. They should be added by driver
* writer in skdrv2nd.h.
*
* Revision 1.4 1998/09/04 11:59:50 mhaveman
* Everything compiles now. Driver Macros for counting still missing.
*
* Revision 1.3 1998/08/24 12:01:35 mhaveman
* Intermediate state.
*
* Revision 1.2 1998/08/17 07:51:40 mhaveman
* Intermediate state.
*
* Revision 1.1 1998/08/11 09:08:40 mhaveman
* Intermediate state.
*
****************************************************************************/
#ifndef _SKGEPNM2_H_
#define _SKGEPNM2_H_
/*
* General definitions
*/
#define SK_PNMI_CHIPSET_XMAC 1 /* XMAC11800FP */
#define SK_PNMI_CHIPSET_YUKON 2 /* YUKON */
#define SK_PNMI_BUS_PCI 1 /* PCI bus*/
/*
* Actions
*/
#define SK_PNMI_ACT_IDLE 1
#define SK_PNMI_ACT_RESET 2
#define SK_PNMI_ACT_SELFTEST 3
#define SK_PNMI_ACT_RESETCNT 4
/*
* VPD releated defines
*/
#define SK_PNMI_VPD_RW 1
#define SK_PNMI_VPD_RO 2
#define SK_PNMI_VPD_OK 0
#define SK_PNMI_VPD_NOTFOUND 1
#define SK_PNMI_VPD_CUT 2
#define SK_PNMI_VPD_TIMEOUT 3
#define SK_PNMI_VPD_FULL 4
#define SK_PNMI_VPD_NOWRITE 5
#define SK_PNMI_VPD_FATAL 6
#define SK_PNMI_VPD_IGNORE 0
#define SK_PNMI_VPD_CREATE 1
#define SK_PNMI_VPD_DELETE 2
/*
* RLMT related defines
*/
#define SK_PNMI_DEF_RLMT_CHG_THRES 240 /* 4 changes per minute */
/*
* VCT internal status values
*/
#define SK_PNMI_VCT_PENDING 32
#define SK_PNMI_VCT_TEST_DONE 64
#define SK_PNMI_VCT_LINK 128
/*
* Internal table definitions
*/
#define SK_PNMI_GET 0
#define SK_PNMI_PRESET 1
#define SK_PNMI_SET 2
#define SK_PNMI_RO 0
#define SK_PNMI_RW 1
#define SK_PNMI_WO 2
typedef struct s_OidTabEntry {
SK_U32 Id;
SK_U32 InstanceNo;
unsigned int StructSize;
unsigned int Offset;
int Access;
int (* Func)(SK_AC *pAc, SK_IOC pIo, int action,
SK_U32 Id, char* pBuf, unsigned int* pLen,
SK_U32 Instance, unsigned int TableIndex,
SK_U32 NetNumber);
SK_U16 Param;
} SK_PNMI_TAB_ENTRY;
/*
* Trap lengths
*/
#define SK_PNMI_TRAP_SIMPLE_LEN 17
#define SK_PNMI_TRAP_SENSOR_LEN_BASE 46
#define SK_PNMI_TRAP_RLMT_CHANGE_LEN 23
#define SK_PNMI_TRAP_RLMT_PORT_LEN 23
/*
* Number of MAC types supported
*/
#define SK_PNMI_MAC_TYPES (SK_MAC_GMAC + 1)
/*
* MAC statistic data list (overall set for MAC types used)
*/
enum SK_MACSTATS {
SK_PNMI_HTX = 0,
SK_PNMI_HTX_OCTET,
SK_PNMI_HTX_OCTETHIGH = SK_PNMI_HTX_OCTET,
SK_PNMI_HTX_OCTETLOW,
SK_PNMI_HTX_BROADCAST,
SK_PNMI_HTX_MULTICAST,
SK_PNMI_HTX_UNICAST,
SK_PNMI_HTX_BURST,
SK_PNMI_HTX_PMACC,
SK_PNMI_HTX_MACC,
SK_PNMI_HTX_COL,
SK_PNMI_HTX_SINGLE_COL,
SK_PNMI_HTX_MULTI_COL,
SK_PNMI_HTX_EXCESS_COL,
SK_PNMI_HTX_LATE_COL,
SK_PNMI_HTX_DEFFERAL,
SK_PNMI_HTX_EXCESS_DEF,
SK_PNMI_HTX_UNDERRUN,
SK_PNMI_HTX_CARRIER,
SK_PNMI_HTX_UTILUNDER,
SK_PNMI_HTX_UTILOVER,
SK_PNMI_HTX_64,
SK_PNMI_HTX_127,
SK_PNMI_HTX_255,
SK_PNMI_HTX_511,
SK_PNMI_HTX_1023,
SK_PNMI_HTX_MAX,
SK_PNMI_HTX_LONGFRAMES,
SK_PNMI_HTX_SYNC,
SK_PNMI_HTX_SYNC_OCTET,
SK_PNMI_HTX_RESERVED,
SK_PNMI_HRX,
SK_PNMI_HRX_OCTET,
SK_PNMI_HRX_OCTETHIGH = SK_PNMI_HRX_OCTET,
SK_PNMI_HRX_OCTETLOW,
SK_PNMI_HRX_BADOCTET,
SK_PNMI_HRX_BADOCTETHIGH = SK_PNMI_HRX_BADOCTET,
SK_PNMI_HRX_BADOCTETLOW,
SK_PNMI_HRX_BROADCAST,
SK_PNMI_HRX_MULTICAST,
SK_PNMI_HRX_UNICAST,
SK_PNMI_HRX_PMACC,
SK_PNMI_HRX_MACC,
SK_PNMI_HRX_PMACC_ERR,
SK_PNMI_HRX_MACC_UNKWN,
SK_PNMI_HRX_BURST,
SK_PNMI_HRX_MISSED,
SK_PNMI_HRX_FRAMING,
SK_PNMI_HRX_UNDERSIZE,
SK_PNMI_HRX_OVERFLOW,
SK_PNMI_HRX_JABBER,
SK_PNMI_HRX_CARRIER,
SK_PNMI_HRX_IRLENGTH,
SK_PNMI_HRX_SYMBOL,
SK_PNMI_HRX_SHORTS,
SK_PNMI_HRX_RUNT,
SK_PNMI_HRX_TOO_LONG,
SK_PNMI_HRX_FCS,
SK_PNMI_HRX_CEXT,
SK_PNMI_HRX_UTILUNDER,
SK_PNMI_HRX_UTILOVER,
SK_PNMI_HRX_64,
SK_PNMI_HRX_127,
SK_PNMI_HRX_255,
SK_PNMI_HRX_511,
SK_PNMI_HRX_1023,
SK_PNMI_HRX_MAX,
SK_PNMI_HRX_LONGFRAMES,
SK_PNMI_HRX_RESERVED,
SK_PNMI_MAX_IDX /* NOTE: Ensure SK_PNMI_CNT_NO is set to this value */
};
/*
* MAC specific data
*/
typedef struct s_PnmiStatAddr {
SK_U16 Reg; /* MAC register containing the value */
SK_BOOL GetOffset; /* TRUE: Offset managed by PNMI (call GetStatVal())*/
} SK_PNMI_STATADDR;
/*
* SK_PNMI_STRUCT_DATA copy offset evaluation macros
*/
#define SK_PNMI_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_STRUCT_DATA *)0)->e))
#define SK_PNMI_MAI_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_STRUCT_DATA *)0)->e))
#define SK_PNMI_VPD_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_VPD *)0)->e))
#define SK_PNMI_SEN_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_SENSOR *)0)->e))
#define SK_PNMI_CHK_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_CHECKSUM *)0)->e))
#define SK_PNMI_STA_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_STAT *)0)->e))
#define SK_PNMI_CNF_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_CONF *)0)->e))
#define SK_PNMI_RLM_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_RLMT *)0)->e))
#define SK_PNMI_MON_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_RLMT_MONITOR *)0)->e))
#define SK_PNMI_TRP_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_TRAP *)0)->e))
#define SK_PNMI_SET_STAT(b,s,o) {SK_U32 Val32; char *pVal; \
Val32 = (s); \
pVal = (char *)(b) + ((SK_U32)(SK_UPTR) \
&(((SK_PNMI_STRUCT_DATA *)0)-> \
ReturnStatus.ErrorStatus)); \
SK_PNMI_STORE_U32(pVal, Val32); \
Val32 = (o); \
pVal = (char *)(b) + ((SK_U32)(SK_UPTR) \
&(((SK_PNMI_STRUCT_DATA *)0)-> \
ReturnStatus.ErrorOffset)); \
SK_PNMI_STORE_U32(pVal, Val32);}
/*
* Time macros
*/
#if SK_TICKS_PER_SEC == 100
#define SK_PNMI_HUNDREDS_SEC(t) (t)
#else
#define SK_PNMI_HUNDREDS_SEC(t) (((t) * 100) / (SK_TICKS_PER_SEC))
#endif
/*
* Macros to work around alignment problems
*/
#ifndef SK_PNMI_STORE_U16
#define SK_PNMI_STORE_U16(p,v) {*(char *)(p) = *((char *)&(v)); \
*((char *)(p) + 1) = \
*(((char *)&(v)) + 1);}
#endif
#ifndef SK_PNMI_STORE_U32
#define SK_PNMI_STORE_U32(p,v) {*(char *)(p) = *((char *)&(v)); \
*((char *)(p) + 1) = \
*(((char *)&(v)) + 1); \
*((char *)(p) + 2) = \
*(((char *)&(v)) + 2); \
*((char *)(p) + 3) = \
*(((char *)&(v)) + 3);}
#endif
#ifndef SK_PNMI_STORE_U64
#define SK_PNMI_STORE_U64(p,v) {*(char *)(p) = *((char *)&(v)); \
*((char *)(p) + 1) = \
*(((char *)&(v)) + 1); \
*((char *)(p) + 2) = \
*(((char *)&(v)) + 2); \
*((char *)(p) + 3) = \
*(((char *)&(v)) + 3); \
*((char *)(p) + 4) = \
*(((char *)&(v)) + 4); \
*((char *)(p) + 5) = \
*(((char *)&(v)) + 5); \
*((char *)(p) + 6) = \
*(((char *)&(v)) + 6); \
*((char *)(p) + 7) = \
*(((char *)&(v)) + 7);}
#endif
#ifndef SK_PNMI_READ_U16
#define SK_PNMI_READ_U16(p,v) {*((char *)&(v)) = *(char *)(p); \
*(((char *)&(v)) + 1) = \
*((char *)(p) + 1);}
#endif
#ifndef SK_PNMI_READ_U32
#define SK_PNMI_READ_U32(p,v) {*((char *)&(v)) = *(char *)(p); \
*(((char *)&(v)) + 1) = \
*((char *)(p) + 1); \
*(((char *)&(v)) + 2) = \
*((char *)(p) + 2); \
*(((char *)&(v)) + 3) = \
*((char *)(p) + 3);}
#endif
#ifndef SK_PNMI_READ_U64
#define SK_PNMI_READ_U64(p,v) {*((char *)&(v)) = *(char *)(p); \
*(((char *)&(v)) + 1) = \
*((char *)(p) + 1); \
*(((char *)&(v)) + 2) = \
*((char *)(p) + 2); \
*(((char *)&(v)) + 3) = \
*((char *)(p) + 3); \
*(((char *)&(v)) + 4) = \
*((char *)(p) + 4); \
*(((char *)&(v)) + 5) = \
*((char *)(p) + 5); \
*(((char *)&(v)) + 6) = \
*((char *)(p) + 6); \
*(((char *)&(v)) + 7) = \
*((char *)(p) + 7);}
#endif
/*
* Macros for Debug
*/
#ifdef DEBUG
#define SK_PNMI_CHECKFLAGS(vSt) {if (pAC->Pnmi.MacUpdatedFlag > 0 || \
pAC->Pnmi.RlmtUpdatedFlag > 0 || \
pAC->Pnmi.SirqUpdatedFlag > 0) { \
SK_DBG_MSG(pAC, \
SK_DBGMOD_PNMI, \
SK_DBGCAT_CTRL, \
("PNMI: ERR: %s MacUFlag=%d, RlmtUFlag=%d, SirqUFlag=%d\n", \
vSt, \
pAC->Pnmi.MacUpdatedFlag, \
pAC->Pnmi.RlmtUpdatedFlag, \
pAC->Pnmi.SirqUpdatedFlag))}}
#else /* !DEBUG */
#define SK_PNMI_CHECKFLAGS(vSt) /* Nothing */
#endif /* !DEBUG */
#endif /* _SKGEPNM2_H_ */
drivers/net/sk98lin/h/skgepnmi.h 已删除 100644 → 0
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drivers/net/sk98lin/h/skgesirq.h 已删除 100644 → 0
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/******************************************************************************
*
* Name: skgesirq.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.26 $
* Date: $Date: 2002/10/14 09:52:36 $
* Purpose: SK specific Gigabit Ethernet special IRQ functions
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/******************************************************************************
*
* History:
* $Log: skgesirq.h,v $
* Revision 1.26 2002/10/14 09:52:36 rschmidt
* Added SKERR_SIRQ_E023 and SKERR_SIRQ_E023 for GPHY (Yukon)
* Editorial changes
*
* Revision 1.25 2002/07/15 18:15:52 rwahl
* Editorial changes.
*
* Revision 1.24 2002/07/15 15:39:21 rschmidt
* Corrected define for SKERR_SIRQ_E022
* Editorial changes
*
* Revision 1.23 2002/04/25 11:09:45 rschmidt
* Removed declarations for SkXmInitPhy(), SkXmRxTxEnable()
* Editorial changes
*
* Revision 1.22 2000/11/09 11:30:10 rassmann
* WA: Waiting after releasing reset until BCom chip is accessible.
*
* Revision 1.21 2000/10/18 12:22:40 cgoos
* Added workaround for half duplex hangup.
*
* Revision 1.20 1999/12/06 10:00:44 cgoos
* Added SET event for role.
*
* Revision 1.19 1999/11/22 13:58:26 cgoos
* Changed license header to GPL.
*
* Revision 1.18 1999/05/19 07:32:59 cgoos
* Changes for 1000Base-T.
*
* Revision 1.17 1999/03/12 13:29:31 malthoff
* Move Autonegotiation Error Codes to skgeinit.h.
*
* Revision 1.16 1999/03/08 10:11:28 gklug
* add: AutoNegDone return codes
*
* Revision 1.15 1998/11/18 13:20:53 gklug
* add: different timeouts for active and non-active links
*
* Revision 1.14 1998/11/04 07:18:14 cgoos
* Added prototype for SkXmRxTxEnable.
*
* Revision 1.13 1998/10/21 05:52:23 gklug
* add: parameter DoLoop to InitPhy function
*
* Revision 1.12 1998/10/19 06:45:03 cgoos
* Added prototype for SkXmInitPhy.
*
* Revision 1.11 1998/10/15 14:34:10 gklug
* add: WA_TIME is 500 msec
*
* Revision 1.10 1998/10/14 14:49:41 malthoff
* Remove err log defines E021 and E022. They are
* defined in skgeinit.h now.
*
* Revision 1.9 1998/10/14 14:00:39 gklug
* add: error logs for init phys
*
* Revision 1.8 1998/10/14 05:44:05 gklug
* add: E020
*
* Revision 1.7 1998/10/02 06:24:58 gklug
* add: error messages
*
* Revision 1.6 1998/10/01 07:54:45 gklug
* add: PNMI debug module
*
* Revision 1.5 1998/09/28 13:36:31 malthoff
* Move the bit definitions for Autonegotiation
* and Flow Control to skgeinit.h.
*
* Revision 1.4 1998/09/15 12:29:34 gklug
* add: error logs
*
* Revision 1.3 1998/09/03 13:54:02 gklug
* add: function prototypes
*
* Revision 1.2 1998/09/03 10:24:36 gklug
* add: Events send by PNMI
* add: parameter definition for Flow Control etc.
*
* Revision 1.1 1998/08/27 11:50:27 gklug
* initial revision
*
*
******************************************************************************/
#ifndef _INC_SKGESIRQ_H_
#define _INC_SKGESIRQ_H_
/*
* Define the Event the special IRQ/INI module can handle
*/
#define SK_HWEV_WATIM 1 /* Timeout for WA errata #2 XMAC */
#define SK_HWEV_PORT_START 2 /* Port Start Event by RLMT */
#define SK_HWEV_PORT_STOP 3 /* Port Stop Event by RLMT */
#define SK_HWEV_CLEAR_STAT 4 /* Clear Statistics by PNMI */
#define SK_HWEV_UPDATE_STAT 5 /* Update Statistics by PNMI */
#define SK_HWEV_SET_LMODE 6 /* Set Link Mode by PNMI */
#define SK_HWEV_SET_FLOWMODE 7 /* Set Flow Control Mode by PNMI */
#define SK_HWEV_SET_ROLE 8 /* Set Master/Slave (Role) by PNMI */
#define SK_HWEV_SET_SPEED 9 /* Set Link Speed by PNMI */
#define SK_HWEV_HALFDUP_CHK 10 /* Half Duplex Hangup Workaround */
#define SK_WA_ACT_TIME (5000000L) /* 5 sec */
#define SK_WA_INA_TIME (100000L) /* 100 msec */
#define SK_HALFDUP_CHK_TIME (10000L) /* 10 msec */
/*
* Define the error numbers and messages
*/
#define SKERR_SIRQ_E001 (SK_ERRBASE_SIRQ+0)
#define SKERR_SIRQ_E001MSG "Unknown event"
#define SKERR_SIRQ_E002 (SKERR_SIRQ_E001+1)
#define SKERR_SIRQ_E002MSG "Packet timeout RX1"
#define SKERR_SIRQ_E003 (SKERR_SIRQ_E002+1)
#define SKERR_SIRQ_E003MSG "Packet timeout RX2"
#define SKERR_SIRQ_E004 (SKERR_SIRQ_E003+1)
#define SKERR_SIRQ_E004MSG "MAC 1 not correctly initialized"
#define SKERR_SIRQ_E005 (SKERR_SIRQ_E004+1)
#define SKERR_SIRQ_E005MSG "MAC 2 not correctly initialized"
#define SKERR_SIRQ_E006 (SKERR_SIRQ_E005+1)
#define SKERR_SIRQ_E006MSG "CHECK failure R1"
#define SKERR_SIRQ_E007 (SKERR_SIRQ_E006+1)
#define SKERR_SIRQ_E007MSG "CHECK failure R2"
#define SKERR_SIRQ_E008 (SKERR_SIRQ_E007+1)
#define SKERR_SIRQ_E008MSG "CHECK failure XS1"
#define SKERR_SIRQ_E009 (SKERR_SIRQ_E008+1)
#define SKERR_SIRQ_E009MSG "CHECK failure XA1"
#define SKERR_SIRQ_E010 (SKERR_SIRQ_E009+1)
#define SKERR_SIRQ_E010MSG "CHECK failure XS2"
#define SKERR_SIRQ_E011 (SKERR_SIRQ_E010+1)
#define SKERR_SIRQ_E011MSG "CHECK failure XA2"
#define SKERR_SIRQ_E012 (SKERR_SIRQ_E011+1)
#define SKERR_SIRQ_E012MSG "unexpected IRQ Master error"
#define SKERR_SIRQ_E013 (SKERR_SIRQ_E012+1)
#define SKERR_SIRQ_E013MSG "unexpected IRQ Status error"
#define SKERR_SIRQ_E014 (SKERR_SIRQ_E013+1)
#define SKERR_SIRQ_E014MSG "Parity error on RAM (read)"
#define SKERR_SIRQ_E015 (SKERR_SIRQ_E014+1)
#define SKERR_SIRQ_E015MSG "Parity error on RAM (write)"
#define SKERR_SIRQ_E016 (SKERR_SIRQ_E015+1)
#define SKERR_SIRQ_E016MSG "Parity error MAC 1"
#define SKERR_SIRQ_E017 (SKERR_SIRQ_E016+1)
#define SKERR_SIRQ_E017MSG "Parity error MAC 2"
#define SKERR_SIRQ_E018 (SKERR_SIRQ_E017+1)
#define SKERR_SIRQ_E018MSG "Parity error RX 1"
#define SKERR_SIRQ_E019 (SKERR_SIRQ_E018+1)
#define SKERR_SIRQ_E019MSG "Parity error RX 2"
#define SKERR_SIRQ_E020 (SKERR_SIRQ_E019+1)
#define SKERR_SIRQ_E020MSG "MAC transmit FIFO underrun"
#define SKERR_SIRQ_E021 (SKERR_SIRQ_E020+1)
#define SKERR_SIRQ_E021MSG "Spurious TWSI interrupt"
#define SKERR_SIRQ_E022 (SKERR_SIRQ_E021+1)
#define SKERR_SIRQ_E022MSG "Cable pair swap error"
#define SKERR_SIRQ_E023 (SKERR_SIRQ_E022+1)
#define SKERR_SIRQ_E023MSG "Auto-negotiation error"
#define SKERR_SIRQ_E024 (SKERR_SIRQ_E023+1)
#define SKERR_SIRQ_E024MSG "FIFO overflow error"
extern void SkGeSirqIsr(SK_AC *pAC, SK_IOC IoC, SK_U32 Istatus);
extern int SkGeSirqEvent(SK_AC *pAC, SK_IOC IoC, SK_U32 Event, SK_EVPARA Para);
extern void SkHWLinkUp(SK_AC *pAC, SK_IOC IoC, int Port);
extern void SkHWLinkDown(SK_AC *pAC, SK_IOC IoC, int Port);
#endif /* _INC_SKGESIRQ_H_ */
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/******************************************************************************
*
* Name: sktimer.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.9 $
* Date: $Date: 1999/11/22 14:00:29 $
* Purpose: Defines for the timer functions
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998,1999 SysKonnect,
* a business unit of Schneider & Koch & Co. Datensysteme GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/******************************************************************************
*
* History:
*
* $Log: sktimer.h,v $
* Revision 1.9 1999/11/22 14:00:29 cgoos
* Changed license header to GPL.
*
* Revision 1.8 1998/09/08 08:48:02 gklug
* add: init level handling
*
* Revision 1.7 1998/08/20 12:31:29 gklug
* fix: SK_TIMCTRL needs to be defined
*
* Revision 1.6 1998/08/19 09:51:00 gklug
* fix: remove struct keyword from c-code (see CCC) add typedefs
*
* Revision 1.5 1998/08/17 13:43:21 gklug
* chg: Parameter will be union of 64bit para, 2 times SK_U32 or SK_PTR
*
* Revision 1.4 1998/08/14 07:09:31 gklug
* fix: chg pAc -> pAC
*
* Revision 1.3 1998/08/07 12:54:24 gklug
* fix: first compiled version
*
* Revision 1.2 1998/08/07 09:35:29 gklug
* add: Timer control struct for Adapters context
* add: function prototypes
*
* Revision 1.1 1998/08/05 11:27:01 gklug
* First version: adapted from SMT
*
*
******************************************************************************/
/*
* SKTIMER.H contains all defines and types for the timer functions
*/
#ifndef _SKTIMER_H_
#define _SKTIMER_H_
#include "h/skqueue.h"
/*
* SK timer
* - needed wherever a timer is used. Put this in your data structure
* wherever you want.
*/
typedef struct s_Timer SK_TIMER;
struct s_Timer {
SK_TIMER *TmNext ; /* linked list */
SK_U32 TmClass ; /* Timer Event class */
SK_U32 TmEvent ; /* Timer Event value */
SK_EVPARA TmPara ; /* Timer Event parameter */
SK_U32 TmDelta ; /* delta time */
int TmActive ; /* flag : active/inactive */
} ;
/*
* Timer control struct.
* - use in Adapters context name pAC->Tim
*/
typedef struct s_TimCtrl {
SK_TIMER *StQueue ; /* Head of Timer queue */
} SK_TIMCTRL ;
extern void SkTimerInit(SK_AC *pAC,SK_IOC Ioc, int Level);
extern void SkTimerStop(SK_AC *pAC,SK_IOC Ioc,SK_TIMER *pTimer);
extern void SkTimerStart(SK_AC *pAC,SK_IOC Ioc,SK_TIMER *pTimer,
SK_U32 Time,SK_U32 Class,SK_U32 Event,SK_EVPARA Para);
extern void SkTimerDone(SK_AC *pAC,SK_IOC Ioc);
#endif /* _SKTIMER_H_ */
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