提交 8b73dda8 编写于 作者: D Dinh Nguyen 提交者: Marek Vasut

arm: socfpga: spl: update peripheral pll for dev kit

"commit 0d13a0051b2c arm: socfpga: Sync Cyclone V DK PLL configuration"
mistakenly changed CONFIG_HPS_MAINPLLGRP_VCO_NUMER to 39, the correct
value should be 79.
Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com>
上级 0ef44d11
......@@ -36,7 +36,7 @@
/* Peripheral PLL */
#define CONFIG_HPS_PERPLLGRP_VCO_DENOM (1)
#define CONFIG_HPS_PERPLLGRP_VCO_NUMER (39)
#define CONFIG_HPS_PERPLLGRP_VCO_NUMER (79)
/*
* To tell where is the VCOs source:
* 0 = EOSC1
......
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