提交 8af74edc 编写于 作者: Á Álvaro Fernández Rojas 提交者: Jagan Teki

drivers: spi: allow limiting reads

For some SPI controllers it's not possible to keep the CS active between
transfers and they are limited to a known number of bytes.
This splits spi_flash reads into different iterations in order to respect
the SPI controller limits.
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
上级 48263504
......@@ -516,6 +516,9 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
else
read_len = remain_len;
if (spi->max_read_size)
read_len = min(read_len, spi->max_read_size);
spi_flash_addr(read_addr, cmd);
ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
......
......@@ -86,6 +86,8 @@ struct dm_spi_slave_platdata {
* @cs: ID of the chip select connected to the slave.
* @mode: SPI mode to use for this slave (see SPI mode flags)
* @wordlen: Size of SPI word in number of bits
* @max_read_size: If non-zero, the maximum number of bytes which can
* be read at once.
* @max_write_size: If non-zero, the maximum number of bytes which can
* be written at once, excluding command bytes.
* @memory_map: Address of read-only SPI flash access.
......@@ -102,6 +104,7 @@ struct spi_slave {
#endif
uint mode;
unsigned int wordlen;
unsigned int max_read_size;
unsigned int max_write_size;
void *memory_map;
......
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